No description available.

No description available.

No description available.

Within recent years, interest in the installation of solar-based, wind-based, and various other renewable Distributed Energy Resources (DERs) and Energy Storage (ES) systems has risen; in part due to rising energy costs, demand for cleaner power generation, increased power quality demands, and the need for additional protection against brownouts and blackouts. A viable solution for these requirements consists of installation of small-scale DER and ES systems at the single-phase (1Φ) distribution level to provide ancillary services such as peak load shaving, Static-VAr Compensation (STATCOM), ES, and Uninterruptable Power Supply (UPS) capabilities through the creation of microgrid systems. To interconnect DER and ES systems, power electronic converters are needed with not only control systems that operate in multiple modes of operation, but with islanding detection and resynchronization capabilities for isolation from and reclosure to the grid. The proposed system includes control architecture capable of operating in multiple modes, and with the ability to smoothly transfer between modes. Phase-Locked Loops (PLLs), islanding detection schemes, and resynchronization protocols are developed to support the control functionality proposed. Stationary frame PLL developments proposed in this work improve upon existing methods by eliminating steady-state noise/ripple without using Low-Pass Filters (LPFs), increasing frequency/phase tracking speeds for a wide range of disturbances, and retaining robustness for weakly interconnected systems. An islanding detection scheme for the stationary frame control is achieved through the stability of the PLL system interaction with the converter control. The proposed detection method relies upon the conditional stability of the PLL controller which is sensitive to grid-disconnections. This method is advantageous over other methods of active islanding detection mainly due to the need for those methods to perturb the output to test for islanding conditions. The PLL stability method does not inject signal perturbations into the output of the converter, but instead is designed to be stable while grid-connected, but inherently unstable for grid-disconnections. Resynchronization and reclosure to the grid is an important control aspect for microgrid systems that have the ability to operate in stand-alone, backup modes while disconnected from the grid. The resynchronization method proposed utilizes a dual PLL tracking system which minimizes voltage transients during the resynchronization process; while a logic-based reclosure algorithm ensures minimal magnitude, frequency, and phase mismatches between the grid and an isolated microgrid system to prevent inrush currents between the grid and stand-alone microgrid system. / Ph. D.

M.S.

Networked wireless sensor systems have the potential to play a major role in critical applications including: environmental monitoring of chemical/biological attacks; condition-based maintenance of vehicles, ships and aircraft; real-time monitoring of civil infrastructure including roads, bridges etc.; security and surveillance for homeland defense systems; and battlefield surveillance and monitoring. Such wireless sensor networks can provide remote monitoring and control of operations of large-scale systems using low-power, low-cost, "throw-away" sensor nodes. This thesis focuses on two aspects of wireless sensor node development: (1) post-IC assembly of nanosensor devices onto prefabricated complementary-metal-oxide-semiconductor (CMOS) integrated circuits using a technique called dielectrophoretic (DEP) assembly; and (2) design of a low-power SiGe BiCMOS multi-band ultra-wideband (UWB) transmitter for wireless communications with other nodes and/or a central control unit in a wireless sensor network. For the first part of this work, a DEP assembly test chip was designed and fabricated using the five-metal core CMOS platform technology of Motorola's HiP6W low-voltage 0.18_m Si/SiGe BiCMOS process. The CMOS chip size was 2.5mm x 2.5 mm. The required AC signal for assembling nanowires is provided to the bottom electrodes defined in the Metal 4 (M4) layer of the IC process. This signal is then capacitively coupled to the top/assembly electrodes defined in the top metal (M5) layer that is also interconnected to appropriate readout circuitry. The placement and alignment of the nanowires on the top electrodes are defined by dielectrophoretic forces that act on the nanowires. For proof of concept purposes, metallic rhodium nanowires ((length = 5μm and diameter = 250 nm) were used in this thesis to demonstrate assembly onto the prefabricated CMOS chip. The rhodium nanowires were manufactured using a nanotemplated electroplating technique. In general, the DEP assembly technique can be used to manipulate a wider range of nanoscale devices (nanowire sensors, nanotubes, etc.), allowing their individual assembly onto prefabricated CMOS chips and can be extended to integrate diverse functionalized nanosensors with sensor readout, data conversion and data communication functionalities in a single-chip environment. In addition, this technique provides a highly-manufacturable platform for the development of multifunctional wireless sensor nodes based on assembled nano-sensor devices. The resistances of the assembled nanowires were measured to be on the order of 110 Ω consistent with prior prototype results. Several issues involved in achieving successful assembly of nanowires and good electrical continuity between the nanowires and metal layers of IC processes are addressed in this thesis. The importance of chemical/mechanical planarization (CMP) technique in modern IC processes and considerations for electrical isolation of readout circuit from the assembly sites are discussed. For the second part of this work, a multi-band hopping ultrawideband transmitter was designed to operate in three different frequency bands namely, 4.8 GHz, 6.4 GHz and 8.0 GHz. As a part of this effort, this thesis includes the design of a CMOS phase/frequency detector (PFD), a CMOS pseudo-random code generator and an on-chip passive loop filter, which were designed for the multi-band PLL frequency synthesizer. The CMOS PFD provided phase tracking over a range of -2π to +2π radians. The on-chip passive loop filter was designed for a 62_ phase margin, 250 μA-charge pump output current and 4 MHz-PLL loop-bandwidth. The CMOS pseudorandom code generator provided a two-bit output that helped switch the frequency bands of the UWB transmitter. With all these components, along with a BiCMOS VCO, a CMOS charge pump and a CMOS frequency divider, the simulated PLL frequency synthesizer locked within a relatively short time of 700ns in all three design frequency bands. The die area for the multi-band UWB transmitter as laid out was 1.5 mm x 1.0 mm. Future work proposed by this thesis includes sequential assembly of diverse functionalized gas/chemical nanosensor elements into arrays in order to realize highly sensitive "electronic noses". With integration of such diverse functionalized nano-scale sensors with low-power read-out and data communication system, a versatile and commercially viable low-power wireless sensor system can be realized. / Master of Science

After being theorized by Veselago in 1967, recent developments in metamaterials over the last two decades have allowed scientists and researchers to physically demonstrate that artificial composite media can be engineered to exhibit exotic material properties, such as negative refractive index, by exploiting features in arrays of sub-wavelength unit inclusions. These unconventional electromagnetic properties are realized through the coupling of the microscopic unit inclusions, which govern the macroscopic properties of the structure. After demonstrating that a periodic array of capacitively-loaded loop (CLL) inclusions paired with continuous wire results in negative refraction, this study performs numerical simulations to characterize random metamaterial structures. These structures consist of CLLs that are randomized in both position and orientation. In addition, this thesis introduces an innovative antenna enhancing structure consisting of capacitively-loaded loop (CLL) metamaterial elements loaded radially around a standard dipole antenna at an electrically small distance. As a result of this innovative arrangement, the dipole antenna is easily transformed into a directive mechanically scanned antenna with high realized gain. The desired directivity and gain can be tuned based on the number of radial CLL fins placed around the dipole. Interactions between the antenna and metamaterial elements result in significant enhancement of the maximum radiated field amplitude and front-to-back ratio. This innovative CLL-loaded dipole antenna is compared to the conventional Yagi-Uda antenna. The structures presented in this thesis are modeled using full-wave simulation, and one antenna structure is experimentally verified as a proof-of-concept. / Master of Science

No description available.

[pt] Atualmente, a maioria dos programas para computadores é obtida através da WEB. Como muitas vezes a procedência são fontes desconhecidas, é preciso se certificar de que o código se comporta como o esperado. A solução ideal seria verificar o código contra uma especificação de políticas de segurança ,contudo, isso pode consumir muito tempo.Uma outra alternativa é fazer com que o próprio código prove ser seguro. O conceito de proof-carryng code (PCC)é baseado nessa idéia : um programa carrega consigo uma prova de sua conformidade com certas políticas de segurança. Ou seja ,ele carrega uma prova a respeito de propriedades do próprio código. Portanto, os mesmos métodos froamsi usados para a verificação de programs podem se utilizados para esta tecnolgia. Considerando este fato,neste trabalho é estudado como cálculo de Hoare, em método formal para realizar a verificação de programas, aplicado a códigos-fonte escritos em uma linguagem de programação imperativa, pode ser útil á tecnica de PCC. Conseqüentemente, são pesquisados métodos para a geração de provas de correção de programas utilizando o método citado, para tornar possível a geração de provas de segurança para PCC utilizando o cálculo de Hoare. / [en] Nowdays most computer programs are obtained from the WEB. Since their source is usually unknown, it is necessary to be sure that the code of the program behaves as expected.The ideal solution would be verify the code against a specification of safety policies.However, this can take too much time.Another approach is making the code itself prove that it is safe. The concept os proof-carryng code (PCC) is based on this idea: a program carries a proof of its conformity with certain safety policies. That is , it carries a proof cencerning properties related to the code itself. Therefore, the same formal methods employed in formal verification of programs can be used in this tecnology. Due to this fact, in this work it is studied how Hoare logic applied to source codes written in an imperative programming language, which is a formal methods are researched to generate proofs of program correctness using the method explained, so that it can be possible to generate PCC safety programs with Hoare logic.

Thesis (MSc)--Stellenbosch University, 2013. / ENGLISH ABSTRACT: The search for non-terminating paths within a program is a crucial part of software verification, as the detection of anfinite path is often the only manner of falsifying program termination - the failure of a termination prover to verify termination does not necessarily imply that a program is non-terminating. This document describes the development and implementation of two focussed techniques for investigating the non-termination of affine loops. The developed techniques depend on the known non-termination concepts of recurrent sets and Jordan matrix decomposition respectively, and imply the decidability of single-variable and cyclic affine loops. Furthermore, the techniques prove to be practically capable methods for both the location of non-terminating paths, as well as the generation of preconditions for non-termination. / AFRIKAANSE OPSOMMING: Sagtewareveri kasie vereis of die bewys van die beeindiging van 'n program, of die deteksie van oneindige uitvoerings. In hierdie tesis ontwikkel en implementeer ons twee tegnieke om oor die oneindige eienskap van a ene lusse te beslis. Die tegnieke wat ontwikkel word is gebaseer op konsepte soos Jordan matriksdekomposisie en herhaalde groepe wat al in die verlede gebruik is om die beeindiging van lusse te ondersoek. Die tegnieke kan gebruik word om die uitvoerbaarheid van beide een-veranderlike en sikliese a ene lusse te bepaal. Feitlik alle nie-eindige a ene lusse kan ge denti seer word en die toestande waaronder hierdie oneindige eienskap verskyn kan beskryf word.