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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
31

Error correction techniques for ATM communications

Almulhem, Abdulaziz S. 24 August 2017 (has links)
Congestion in ATM communications is a significant issue as it can have a dramatic effect on critical or real-time data. Forward Error Correction (FEC) codes are one class of protocols to decrease this effect. Conventional FEC techniques have a uniform or constant error correction rate, which can result in poor bandwidth utilization. Therefore adaptive techniques are sought. The rationale is to have better bandwidth utilization when congestion occurs. In this thesis, we investigate the related work on FEC in ATM networks. Then we propose an adaptive FEC scheme based on RS codes. This proposed scheme is then studied in different types of environments, wireline and wireless. Simulations are also conducted to measure different performance issues concerning network resources and quality of service. Another crucial issue in ATM communications is security. The proposed FEC scheme has an added feature of being security ready. Moreover it has been shown that the security scheme is computationally secure. Such FEC scheme has significant impact on ATM network resources and switch capacity. This has been investigated further in this work. Switch architectures utilizing FEC schemes are also studied. / Graduate
32

AN ECOLOGICAL INVESTIGATION INTO THE EFFECTS OF INTERFACE ON ASYNCHRONOUS GROUP CONVERSATIONS

Venero, Peter 19 April 2012 (has links)
No description available.
33

Performance Analysis of Positive Systems and Optimization Algorithms with Time-delays

Feyzmahdavian, Hamid Reza January 2016 (has links)
Time-delay dynamical systems are used to model many real-world engineering systems, where the future evolution of a system depends not only on current states but also on the history of states. For this reason, the study of stability and control of time-delay systems is of theoretical and practical importance. In this thesis, we develop several stability analysis frameworks for dynamical systems in the presence of communication and computation time-delays, and apply our results to different challenging engineering problems. The thesis first considers delay-independent stability of positive monotone systems. We show that the asymptotic stability of positive monotone systems whose vector fields are homogeneous is independent of the magnitude and variation of time-varying delays. We present explicit expressions that allow us to give explicit estimates of the decay rate for various classes of time-varying delays. For positive linear systems, we demonstrate that the best decay rate that our results guarantee can be found via convex optimization. We also derive a set of necessary and sufficient conditions for asymptotic stability of general positive monotone (not necessarily homogeneous) systems with time-delays. As an application of our theoretical results, we discuss delay-independent stability of continuous-time power control algorithms in wireless networks. The thesis continues by studying the convergence of asynchronous fixed-point iterations involving maximum norm pseudo-contractions. We present a powerful approach for characterizing the rate of convergence of totally asynchronous iterations, where both the update intervals and communication delays may grow unbounded. When specialized to partially asynchronous iterations (where the update intervals and communication delays have a fixed upper bound), or to particular classes of unbounded delays and update intervals, our approach allows to quantify how the degree of asynchronism affects the convergence rate. In addition, we use our results to analyze the impact of asynchrony on the convergence rate of discrete-time power control algorithms in wireless networks. The thesis finally proposes an asynchronous parallel algorithm that exploits multiple processors to solve regularized stochastic optimization problems with smooth loss functions. The algorithm allows the processors to work at different rates, perform computations independently of each other, and update global decision variables using out-of-date gradients. We characterize the iteration complexity and the convergence rate of the proposed algorithm, and show that these compare favourably with the state of the art. Furthermore, we demonstrate that the impact of asynchrony on the convergence rate of the algorithm is asymptotically negligible, and a near-linear speedup in the number of processors can be expected. / Tidsfördröjningar uppstår ofta i tekniska system: det tar tid för två ämnen attblandas, det tar tid för en vätska att rinna från ett kärl till ett annat, och det tar tid att överföra information mellan delsystem. Dessa tidsfördröjningar lederofta till försämrad systemprestanda och ibland även till instabilitet. Det är därförviktigt att utveckla teori och ingenjörsmetodik som gör det möjligt att bedöma hur tidsfördröjningar påverkar dynamiska system. I den här avhandlingen presenteras flera bidrag till detta forskningsområde. Fokusligger på att karaktärisera hur tidsfördröjningar påverkar konvergenshastigheten hos olinjära dynamiska system. I kapitel 3 och 4 behandlar vi olinjära system varstillstånd alltid är positiva. Vi visar att stabiliteten av dessa positiva system är oberoende av tidsfördröjningar och karaktäriserar hur konvergenshastigheten hos olinjära positiva system beror på tidsfördröjningarnas storlek. I kapitel 5 betraktar vi iterationer som är kontraktionsavbildningar, och analyserar hur deras konvergens påverkas av begränsade och obegränsade tidsfördröjningar. I avhandlingens sistakapitel föreslår vi en asynkron algoritm för stokastisk optimering vars asymptotiska konvergenshastighet är oberoende av tidsfördröjningar i beräkningar och i kommunikation mellan beräkningselement. / <p>QC 20151204</p>
34

Supporting the MASCOT method with Petri net techniques for real-time systems development

Xia, Fei January 2000 (has links)
No description available.
35

Petri nets approach for the analysis of MASCOT interprocess communications

Jiffry, Mustafa Abdulrahman January 2000 (has links)
No description available.
36

Extending Controller Area Networks : CAN/CAN cut-through bridging, CAN over ATM, and CAN based ATM FieldBus

Tenruh, Mahmut January 2001 (has links)
No description available.
37

ATM networks : traffic control, interworking with CAN, and end station NIC architecture

Stipidis, Elias January 1998 (has links)
No description available.
38

A dynamic interactive protocol for distributed multimedia over ATM networks.

Ghinea, Gheorghita. January 1996 (has links)
A research report subuutted to the Faculty of Science, University of the Witwatersrand, Johannesburg, in partial fulfilment of the requirements for the degree of Master of Science. Degree awarded with distinction / This report describes a dynamic Quality of Service (QoS) - based call admission protocol tor distributed multimedia over ATM networks. The protocol incorporates the innovative idea of an extended QoS. This is a composite term which takes account of not only classic QoS multimedia measures, but also of the human aspect of the interaction through human receptivity. For this scenario, different QoS negotiation strategies have been formulated and then simulated with a view towards the establishment of a protocol knowledge base. Separately, a session pricing policy has been elaborated and its effect on user behaviour and network resource allocation studied. / Andrew Chakane 2018
39

Multiple access and coding method for wireless ATM.

January 1999 (has links)
by Cheng Siu Lung. / Thesis (M.Phil.)--Chinese University of Hong Kong, 1999. / Includes bibliographical references (leaves 81-86). / Abstracts in English and Chinese. / ABBREVIATION --- p.3 / INTRODUCTION --- p.9 / Chapter 1.1 --- Wireless ATM for multimedia application --- p.9 / Chapter 1.2 --- Challenges in Wireless ATM --- p.11 / Chapter 1.3 --- Outline of thesis --- p.14 / PREDICTIVE QUEUING MULTIPLE ACCESS --- p.17 / Chapter 2.1 --- Introduction --- p.17 / Chapter 2.2 --- Protocol for Mobile to Base --- p.20 / Chapter 2.3 --- Scheduling Protocol at the Base Station --- p.23 / Chapter 2.4 --- Rate Compatible Punctured Turbo code --- p.27 / Chapter 2.5 --- FEC and ARQ methodologies --- p.30 / Chapter 2.6 --- Experimental Results --- p.32 / Chapter 2.7 --- Conclusion --- p.34 / FUNDAMENTALS OF THE WIRELESS COMMUNICATION MEDIUM --- p.36 / Chapter 3.1 --- Introduction --- p.36 / Chapter 3.2 --- Error control and channel capacity --- p.38 / Chapter 3.3 --- Capacity of fading channel --- p.39 / ITERATIVE CHANNEL ESTIMATION FOR TURBO CODE FOR FREQUENCY HOPPED MULTIPLE ACCESSING --- p.45 / Chapter 4.1 --- Introduction --- p.45 / Chapter 4.2. --- Turbo code structures --- p.47 / Chapter 4.3 --- System Model --- p.49 / Chapter 4.4 --- Iterative Channel Estimator --- p.53 / Chapter 4.5 --- Turbo decoding with iterative channel estimation --- p.56 / Chapter 4.6 --- Simulation Results --- p.58 / Chapter 4.7 --- Conclusion --- p.63 / DUMMY BITS INSERTED TURBO CODE --- p.64 / Chapter 5.1 --- Introduction --- p.64 / Chapter 5.2 --- Weight Distribution of turbo codes --- p.66 / Chapter 5.3 --- Encoding with dummy bit insertion --- p.69 / Chapter 5.3.1 --- Dummy bit insertion methodology --- p.69 / Chapter 5.3.2 --- Hybrid Periodic Random Interleaver --- p.70 / Chapter 5.3.3 --- Dummy bit removal before transmission --- p.71 / Chapter 5.4 --- Decoding with dummy signal enhancement --- p.73 / Chapter 5.5 --- Weight distribution of dummy bit inserted turbo coding --- p.76 / Chapter 5.6 --- Simulation results --- p.77 / Chapter 5.7 --- Summary --- p.79 / REFERENCES --- p.81
40

Efficient arithmetic using self-timing

Ramachandran, Ravichandran 02 September 1994 (has links)
The recent advances in VLSI technology have facilitated feature shrinking and hence a rapid increase in the levels of integration at the chip level. This increase in the level of integration has brought along with it a host of other constraints, the most crucial being timing management and increased power dissipation. Such constraints potentially prevent the full exploitation of the increased processing power made possible by technological advances. Timing in complex digital systems has traditionally been managed by using a global clock, controlled by which all the actions take place in lock-step. An alternative means of managing timing, called self-timing, simplifies the problems of timing management and results in a reduced power dissipation of complex digital systems. Systems designed using this self-timed or asynchronous protocol, work on a principle of handshaking, running at their own speed, governed by local timers and the availability of data on which to work. However, this hand-shaking introduces an overhead both in terms of hardware and computational speed. The work presented here examines the implementation of an adder, called a Parallel Half-Adder (PHA), which gains its speed by exploiting the power of asynchrony to calculate the sum. The adder has been implemented in the form of a tunable micropipeline and compared to traditional adders in terms of hardware complexity and speed. Comparable results have been obtained, implying that the overhead due to hand shaking is justified and the performance improvements due to self-timing can be fully exploited. The design of an array divider using the PHA has also been presented. / Graduation date: 1995

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