Η ενσωμάτωση των κωδίκων Turbo σε ένα ευρύ φάσμα εφαρμογών λόγω της εκπληκτικής αποδόσεώς τους που προσεγγίζει το θεμελιώδες όριο του Shannon, απαιτεί αποδοτικές αρχιτεκτονικές και υλοποιήσεις υψηλού ρυθμού διεκπεραίωσης και χαμηλής κατανάλωσης ενέργειας όσον αφορά την εξαιρετικά πολύπλοκη και χρονοβόρα επαναληπτική αποκωδικοποίησή τους. Η παρούσα διδακτορική διατριβή μελετά την χρήση της τεχνολογίας Πυριτίου-Γερμανίου (SiGe) BiCMOS σε αναλογικές αρχιτεκτονικές για την υλοποίηση αποκωδικοποιητών Turbo υψηλού ρυθμού διεκπεραίωσης και όσο το δυνατόν χαμηλής κατανάλωσης ισχύος. Η σχεδίαση βάσει των διπολικών τρανζίστορ ετεροεπαφής προσδίδει ιδιαίτερα υψηλή ταχύτητα στην απόκριση του αναλογικού συστήματος σε αντίθεση με τα συμβατικά διπολικά τρανζίστορ ή με τα τρανζίστορ πεδίου MOS, τα οποία λειτουργούν στην περιοχή υποκατωφλίου για τη διατήρηση της διαγραμμικής αρχής. Στα πλαίσια της διατριβής αυτής παρουσιάζεται μια γενική μεθοδολογία χρησιμοποιώντας τους γράφους παραγόντων για την προδιαγραφή συστημάτων ελέγχου λαθών. Έπειτα, πραγματοποιείται η σύζευξη της επιτευχθείσας προδιαγραφής με την κυκλωματική συμπεριφορά των τοπολογιών λαμβάνοντας υπ’ όψιν φυσικά τα χαρακτηριστικά της τεχνολογίας SiGe BiCMOS και καταλήγουμε στην αποδοτική σχεδίαση και ολοκλήρωση αποκωδικοποιητών διόρθωσης λαθών υψηλής ταχύτητας. Χρήσιμα συμπεράσματα, για την υιοθέτηση της προτεινόμενης μεθοδολογίας και τη χρήση της τεχνολογίας Πυριτίου-Γερμανίου, αναφέρονται με την παρουσίαση της πρώτης επιτυχούς υλοποίησης σε τεχνολογία 0.35μm AMS SiGe BiCMOS ενός αναλογικού Trellis αποκωδικοποιητή και των εξομοιωτικών αποτελεσμάτων του αντίστοιχου αποκωδικοποιητή Turbo, ο οποίος ενσωματώνει τον παραπάνω Trellis αποκωδικοποιητή. / The incorporation of Turbo codes into a wide range of applications due to their amazing performance close to the fundamental Shannon limit, demands efficient architectures and implementations of high-throughput and low energy consumption in the case of the extremely complex and time consuming procedure of iterative decoding. The present dissertation studies the use of SiGe BiCMOS technology in analog architectures for the implementation of high-throughput and moderate power consumption Turbo decoders. The design is based on Heterojunction Bipolar Transistors and leads to a significant increment of the analog system’s speed in contrast to the designs based on conventional bipolar transistors or MOS transistor, which operate in the subthreshold region in order to conform to the translinear principle. A generic methodology, using factor-graphs for the specification procedure of error control systems, is also presented. Furthermore, we map the derived specification onto the appropriate acircuit topology taking into account the characteristics of the SiGe BiCMOS technology. Finally, the methodology leads to an efficient design and consistent integration of high-speed analog decoders. We report useful conclusions for the adoption of the proposed methodology, and the use of Silicon-Germanium technology by presenting the first successful implementation of an analog Trellis decoder, and the simulation results of the relevant Turbo decoder in a 0.35μm AMS SiGe BiCMOS technology.

This dissertation thesis deals with design of new functional blocks usable in area of analogue signal processing, focusing on sensor signal processing. Versatility of these circuits will find applications in programmable analogue array structures that will be possible to control and configure via a digital signal. Hereby build-up array would be fully a reconfigurable digital control system for sensor signal processing and usable for a wide range of different sensors. It offers possibility to build-up a control code for each specific sensor system, with which it would be possible to achieve optimal results of the entire system and consequently place the system on a chip. The presented programmable array is designed from configurable analogue blocks. The current feedback circuits, which in a suitable configuration can operate in voltage or current mode, are used here. This allows to achieve very good results in the systems with very low power supply, which is closely associated with mobility and autonomous behavioral (that are very important and observed parameters today) of the entire sensor-based framework. The work deals in detail with particular blocks, which are described theoretically and evaluated for using in the programmable analogue array. Design of the structure of programmable analogue array as well the use of these circuits in the part of whole system (that will be realized on a chip) are presented at the end of this thesis.

<p>To facilitate indoor air quality (IAQ) monitoring, the research described herein develops and implements methods for the electronic integration of two types of gas sensor, each functionalized with a polymer blend tailored for CO₂ detection. A highly sensitive and tunable electronic chemiresistive sensor interface was developed and experimentally validated. This device achieved analog-to-digital conversion (ADC) through a pulse width modulated (PWM) signal, temporary data storage with an efficient data buffering system, and noise reduction and signal amplification utilizing an instrumentation amplifier integrator circuit. These techniques can used beyond CO₂-specific applications to compensate for certain undesirable chemiresistive sensor characteristics, such as low response magnitude and signal noise. Additionally, resonant mass sensing circuitry was combined with an on-chip field programmable gate array (FPGA) implemented frequency counter. Hz-level resolution was achieved with an Alorium Snō FPGA board and a Verilog data acquisition and communication program. This device can monitor up to 16 sensor channels simultaneously and has a straightforward interface with a controllable output. Furthermore, the functionality of each integrated sensor was experimentally validated. With additional work, these integrated designs have the potential to be inexpensive, low-power, highly sensitive devices that are suitable for practical use in IAQ monitoring applications.</p>

Made available in DSpace on 2016-08-17T14:53:07Z (GMT). No. of bitstreams: 1 Diomadson Belfort.pdf: 1540332 bytes, checksum: 3100ff3681a43294daea6ee8313b879e (MD5) Previous issue date: 2007-09-05 / In digital measurement systems, signal conditioning circuits have the main functionality of adjusting analog signals for digital conversion. For maximizing the application of a measurement circuit or system, yet considering its integration in a single chip, these circuits must be programmable, in order to serve to different kinds of sensors with diverse output signal characteristics. The main functions of the signal conditioning circuit, in this case, are the amplification and dc level shift of the analog signal. In this master s thesis, an architecture of a signal conditioning integrated circuit with programmable gain and dc level shift, optimized in number of discrete components, using the switched capacitor technique is proposed. The proposed architecture allows the circuit use in differential and single-ended modes, with unipolar and bipolar signals. The design of an integrated circuit is carried out for implementing the proposed architecture using 0.35 mm TSMC CMOS technology, available in the ASIC design kit (ADK) of the Mentor Graphics, IC Nanometer software package. / Em sistemas digitais de medição, circuitos de condicionamento de sinais têm como principal finalidade o ajuste dos sinais analógicos para realização da conversão digital. Para maximização da aplicação de um circuito ou sistema de medição, considerando ainda sua integração em uma única pastilha, esses circuitos têm que ser programáveis, de forma a atender a diversos tipos de sensores com características de sinais de saída diversas. As principais funções do circuito de condicionamento, neste caso, são a amplificação e o ajuste de nível cc do sinal analógico. Nesta dissertação, propõe-se uma arquitetura de um circuito de condicionamento integrado com ajuste de nível cc e ganho programáveis, otimizada em número de componentes discretos, usando a técnica de capacitores chaveados. A arquitetura proposta permite a utilização do circuito nos modos diferencial e de terminação única, unipolar ou bipolar. Um projeto de um circuito integrado é realizado implementando a arquitetura proposta em tecnologia CMOS 0,35 mm TSMC, disponível no ASIC design kit (ADK) do pacote de programas da Mentor Graphics, IC Nanometer.

This doctoral thesis is focused mainly on research of new current active elements and their applications in frequency filters suitable for current-mode. Work is focused on design of new filtering structures suitable for traditional single-ended signal processing and also on structures suitable for fully-differential applications. The thesis contains three designed general conceptions of KHN-type second-order filters. Adjustability of quality factor and pole frequency is provided by controllable current amplifiers that are placed properly in designed structures. Structures also contain second-generation current conveyors, multiple-output current followers, transconductance amplifiers and their fully-differential equivalents. There are lot of possible solutions that could be obtained from general structures, some of them are presented in the work. The thesis also presents several multifunctional and also single-purpose filtering structures of second-order and two variants of n-th order synthetic elements which are suitable to realize higher order filters both in single ended and fully differential type. In each case, functionality of new solutions is verified by simulations and in several cases also by real measurement.

Kmitočtové filtry jsou lineární elektrické obvody, které jsou využívány v různých oblastech elektroniky. Současně tvoří základní stavební bloky pro analogové zpracování signálů. V poslední dekádě bylo zavedeno množství aktivních stavebních bloků pro analogové zpracování signálů. Stále však existuje potřeba vývoje nových aktivních součástek, které by poskytovaly nové možnosti a lepší parametry. V práci jsou diskutovány různé aspekty obvodů pracujících v napěťovém, proudovém a smíšném módu. Práce reaguje na dnešní potřebu nízkovýkonových a nízkonapěťových aplikací pro přenosné přístroje a mobilní komunikační systémy a na problémy jejich návrhu. Potřeba těchto výkonných nízkonapěťových zařízení je výzvou návrhářů k hledání nových obvodových topologií a nových nízkonapěťových technik. V práci je popsána řada aktivních prvků, jako například operační transkonduktanční zesilovač (OTA), proudový konvejor II. generace (CCII) a CDTA (Current Differencing Transconductance Amplifier). Dále jsou navrženy nové prvky, jako jsou VDTA (Voltage Differencing Transconductance Amplifier) a VDVTA (Voltage Differencing Voltage Transconductance Amplifier). Všechny tyto prvky byly rovněž implementovány pomocí "bulk-driven" techniky CMOS s cílem realizace nízkonapěťových aplikací. Tato práce je rovněž zaměřena na náhrady klasických induktorů syntetickými induktory v pasivních LC příčkových filtrech. Tyto náhrady pak mohou vést k syntéze aktivních filtrů se zajímavými vlastnostmi.

Disertační práce se zabývá zaváděním nových struktur moderních aktivních prvků pracujících v napěťovém, proudovém a smíšeném režimu. Funkčnost a chování těchto prvků byly ověřeny prostřednictvím SPICE simulací. V této práci je zahrnuta řada simulací, které dokazují přesnost a dobré vlastnosti těchto prvků, přičemž velký důraz byl kladen na to, aby tyto prvky byly schopny pracovat při nízkém napájecím napětí, jelikož poptávka po přenosných elektronických zařízeních a implantabilních zdravotnických přístrojích stále roste. Tyto přístroje jsou napájeny bateriemi a k tomu, aby byla prodloužena jejich životnost, trend navrhování analogových obvodů směřuje k stále většímu snižování spotřeby a napájecího napětí. Hlavním přínosem této práce je návrh nových CMOS struktur: CCII (Current Conveyor Second Generation) na základě BD (Bulk Driven), FG (Floating Gate) a QFG (Quasi Floating Gate); DVCC (Differential Voltage Current Conveyor) na základě FG, transkonduktor na základě nové techniky BD_QFG (Bulk Driven_Quasi Floating Gate), CCCDBA (Current Controlled Current Differencing Buffered Amplifier) na základě GD (Gate Driven), VDBA (Voltage Differencing Buffered Amplifier) na základě GD a DBeTA (Differential_Input Buffered and External Transconductance Amplifier) na základě BD. Dále je uvedeno několik zajímavých aplikací užívajících výše jmenované prvky. Získané výsledky simulací odpovídají teoretickým předpokladům.

This doctoral thesis deals with a voltage conveyor as a new active element for an analog signal processing. Various types of the voltage conveyors have been defined as a dual active elements to current conveyors based on a duality principle. Conception of a new active element that can supply all types of the voltage conveyors have been proposed. The active element has been named an universal voltage conveyor – UVC. A voltage follower is a basic building block of the UVC. The well-known circuit realization of the voltage follower comes from four transconductance amplifiers with key parameters (voltage transfer and output resistance) derived from relative accuracy of used transconductance amplifiers has been used by UVC fabrication. A new circuit realization of the voltage follower comes from three transconductance amplifiers with key parameters also derived from relative accuracy of used transconductance amplifiers has been designed. Further the doctoral thesis deals with a frequency filter with the voltage conveyors design using signal flow graphs. Various graphs of the voltage conveyors comes from the various circuit analysis methods with non-regular active elements have been created. A basic graph of the voltage conveyor has been designed with help of a known controlled sources graphs. This graph have been used to design of multifunctional frequency filters, filters with high input and low output impedance and controlled frequency filters. A design procedure have been created so that in specific step of the frequency filter design the basic graph of the voltage conveyor could be extended to graph of any type of the voltage conveyor. Thereby a practical usage of various types of the voltage conveyors has been finding out. Further a new method of frequency filter design based on expanding of the signal flow has beenproposed.

The dissertation thesis deals with the synthesis and design of active frequency filters using current (CC) and voltage (VC) conveyors, or current active elements CMI (Current Mirror and Inverter), MCMI (Multi-output CMI) and PCA (Programmable Current Amplifier). As introduction, these active elements are described as suitable for the design of the circuits working in the voltage-, current,- ,and mixed-mode, or in pure current-mode speaking about the current active elements. The new frequency filter structures presented in this thesis using the above mentioned active elements were designed by the generalized autonomous circuit method, transformation cells and signal flow-graph theory. The generalized autonomous circuit method is based on full admittance network to which generalized active elements are connected. The described admittance networks can be used for other active elements. The next method is based on the transformation cells that subsequently are used for the design of synthetic elements with higher-order imittance. Original conditions for the design of such blocks are given that lead to maximal simplicity of the final structure with minimal number of passive and active elements. For effective usage of another method utilizing signal flow-graphs, new reduced graphs of chosen active elements are given. Their usage leads to direct function blocks synthesis with required properties. The functionality and behavior of chosen circuit solutions have been verified by analyses in simulation programs. The active elements were simulated by the universal current conveyor (UCC) or universal voltage conveyors (UVC) that were designed at the FEEC, BUT in cooperation with AMI Semiconductor Design Centre Brno with the CMOS 0.35 m technology. These active elements have been also used for the realization of chosen filter structures. The experimental measurements were performed in the in the frequency range 10 KHz to 100 MHz.

Kmitočtové filtry a sinusoidní oscilátory jsou lineární elektronické obvody, které jsou používány v široké oblasti elektroniky a jsou základními stavebními bloky v analogovém zpracování signálu. V poslední dekádě pro tento účel bylo prezentováno velké množství stavebních funkčních bloků. V letech 2000 a 2006 na Ústavu telekomunikací, VUT v Brně byly definovány univerzální proudový konvejor (UCC) a univerzální napět'ový konvejor (UVC) a vyrobeny ve spolupráci s firmou AMI Semiconductor Czech, Ltd. Ovšem, stále existuje požadavek na vývoj nových aktivních prvků, které nabízejí nové výhody. Hlavní přínos práce proto spočívá v definici dalších původních aktivních stavebních bloků jako jsou differential-input buffered and transconductance amplifier (DBTA), current follower transconductance amplifier (CFTA), z-copy current-controlled current inverting transconductance amplifier (ZC-CCCITA), generalized current follower differential input transconductance amplifier (GCFDITA), voltage gain-controlled modified current-feedback operational amplifier (VGC-MCFOA), a minus-type current-controlled third-generation voltage conveyor (CC-VCIII-). Pomocí navržených aktivních stavebních bloků byly prezentovány původní zapojení fázovacích článků prvního řádu, univerzální filtry druhého řádu, ekvivalenty obvodu typu KHN, inverzní filtry, aktivní simulátory uzemněného induktoru a kvadraturní sinusoidní oscilátory pracující v proudovém, napět'ovém a smíšeném módu. Chování navržených obvodů byla ověřena simulací v prostředí SPICE a ve vybraných případech experimentálním měřením.