The objective of this dissertation is the development of the necessary processing steps needed to manufacture infrared photodiodes on InAs1-xSbx material. Preliminary surface preparation steps were performed on both InAs and InSb material, thus covering both possible extremes of the antimony mole fraction. The first experiments endeavoured to characterise the effect of several possible etchants with regards to etch rate, repeatability, limitations for photolithographic patterning and the resultant surface roughness. The etchants investigated include a lactic acid based etchant, a sulphuric acid based etchant, an acetic acid based etchant, an ammonium based etchant, a hydrochloric acid based etchant as well as an organic rinse procedure. These cleaning and etching steps were evaluated at several temperatures. Measurements were performed on an Alpha Step stylus profiler as well as an atomic force microscope. Metal-insulator-semiconductor capacitor devices were manufactured, on both InAs and InSb material, in order to investigate the effects of the above-mentioned etchants combined with surface passivation techniques in terms of surface state densities. Capacitance-versus-bias voltage measurements were done to determine the resultant surface state densities and to compare these to the surface state density of an untreated reference sample. The surface passivation techniques included KOH, Na2S as well as (NH4)2S anodisation. Auger electron spectroscopy measurements were done on InAs and InSb material in order to examine possible surface contamination due to the etchants as well as combinations of these etching and anodisation procedures. The extent of surface coverage by contaminants as well as by the intrinsic elements was measured. The results of the cleaning and etching as well as the surface passivation studies were used to manufacture photovoltaic infrared diodes on an MOCVD (metal oxide chemical vapour deposition) grown p-InAs0.91Sb0.09/i- InAs0.91Sb0.09/n-GaSb structure. Current-versus-voltage and electro-optical measurements were performed on the these diodes in order to evaluate the effect of sulphuric acid based etching combined with KOH, Na2S or (NH4)2S anodisation on the detector performance. The results of surface passivated structures were compared to those of an unpassivated reference detector.

There is a need for monolithic devices capable of spatial resolution in imaging and ionizing radiation detection. In this thesis, a GaAs acoustic charge transport device (ACT) was studied for this purpose. A new method of charge injection has been demonstrated for the ACT. Using near-infrared optical pulses incident through thin semi-transparent chromium windows, electron-hole-pairs were separated by the electric field in a depleted n-type channel region of the device. For light penetration less than the depth of the electron potential minimum, and for small injection levels, calculations indicated that electrons and holes were separated at their saturation velocities. Holes moving toward the surface of the substrate could recombine with electrons at an evaporated Schottky metal plate. Electrons moving toward the channel centre were bunched and transported by the electric field coupled to a <110> propagating surface acoustic wave (SAW) on (100) cut GaAs. Quantum efficiency, defined as the number of electrons collected at the output per incident photon on the GaAs surface, was greater than 9% at an optical wavelength of 730 nm. When compensation was made for the loss and reflection due to the chromium windows, the quantum efficiency was in excess of 24%. Charge transfer efficiency was greater than 0.992 with the ACT clocked at 360 MHz. The demonstrated optical injection technique may be of use in future ACT imaging devices. / Applied Science, Faculty of / Electrical and Computer Engineering, Department of / Graduate

The object of the work described in this thesis was to develop GaAs integrated circuit modeling techniques based on a modified version of SPICE 2, then layout, fabricate, model and test ion implanted GaAs MESFET integrated sample and hold circuits. A large signal GaAs MESFET model was used in SPICE to evaluate the relative performance of inverted common drain logic (ICDL) digital integrated circuits compared to other circuit configurations. The integrated sample and hold subsequently referred to as an integrated sampling amplifier block(ISAB), uses a MESFET switch with either one or two guard gates to suppress strobe feedthrough. Performance guidelines suggested by the project sponsor indicate an optimal switch sampling pulse width capability of 25 ps with 5 ps rise and fall time. Guard gates are included in the switch layout to evaluate pulse feedthrough minimization. The project sponsor suggested -20 dB pulse feedthrough isolation and minimum sampling switch off isolation of -20 dB at 10 GHz as project guidelines. Simulations indicate that a 0.5 µm gate length process approaches the suggested performance guidelines. A mask layout was designed and modeled including both selective implant and refractory self aligned gate processes. The refractory self aligned gate process plasma etched t-gate structure produces a sub 0.5 µm gate length. / Applied Science, Faculty of / Electrical and Computer Engineering, Department of / Graduate

For VLSI applications, it is essential to have consistent device characteristics for devices fabricated on different fabrication runs, on different wafers, and especially across a single wafer. MESFETs fabricated on GaAs have been found to have an orientation dependence in their threshold voltage and other characteristics. For MESFETs with gate length less than 2 μm, changing the device orientation can so significantly alter the device characteristics that it must be considered during the transistor design stage. The causes for the orientation dependence in the device characteristics have been suggested to be the piezoelectric property of GaAs and stress in the substrate. Stress produced by the encapsulating dielectric film generates a polarization charge density in the substrate. If the magnitude of the polarization charge density is large enough to alter the channel doping profile, then the device characteristics are changed. In this thesis, the effects of stress on GaAs MESFET device characteristics were studied by modelling and experimental works. In the modelling part, polarization charge densities under the gate of an encapsulated MESFET were calculated by using the so called distributed force model and the edge concentrated model. The distributed force model is a much better model because it describes more realistically the stress distribution in the film and in the substrate. It should provide a much more accurate calculation of the induced polarization charge density. The results show that the polarizarition charge densities calculated by the two models have similar distribution pattern, but the magnitudes are very different. With an identical set of conditions, a much larger polarization charge density is predicted by the edge concentrated model. In addition, the distributed force model distinguishes different films by a "hardness" value, based on their elastic property, whereas the edge concentrated model does not. A film with a larger "hardness" value is predicted to generate a larger polarization charge density. Two types of film were considered, SiO₂ and Si₃N₄. Using bulk film characteristics, the calculations showed that Si0₂ film is "harder" than Si₃N₄ film. If an equal built-in stress value is assumed, then a larger polarization charge density is predicted for Si0₂ than for Si₃N₄ encapsulated substrates. In the experimental part, stress was applied to test devices by bending strips of GaAs wafers in a cantilever configuration. MESFETs tested were oriented in the [011] or the [011̅] direction. Both static stress and time-varying stress were applied. In the statics stress experiment, the changes in the barrier height and the C-V profile were measured. It was found that, with equal stress applied, Schottky barriers with a larger ideality factor showed a larger change in the barrier height. In the time-varying stress experiment, attempts were made to measure the effect of the polarization charge density on device characteristics by measuring changes in the drain-source current. / Applied Science, Faculty of / Electrical and Computer Engineering, Department of / Graduate

No description available.

No description available.

In the present investigation, a comprehensive photonic characterization and analysis of low energy Ar⁺ ion beam processed GaAs surfaces is presented. The purpose of this investigation was to evaluate the damage and amorphization introduced at the surface and sub-surface regions by ion bombardment. Ar⁺ ion beam etching was selected in order to rule out the possibility of producing any additional effects at the interface due to chemical reactions in the case of reactive ion etching. After a brief review of the concepts and underlying physics, several photonic structures are introduced. The basic theory governing the photovoltaic devices and photoconductive samples is discussed. The preparation and characterization techniques of ion beam processed GaAs samples are described. An automated photovoltaic materials and devices (PVMD) system was developed. Asyst, a Forth based scientific software was selected to write the source codes for data acquisition and reduction. The inherent fast execution times of the software allows data acquisition in real time, ensuring the quasi-steady state condition. The electrical and optical evaluation procedures developed and employed for the present investigation are discussed. One of the striking features of the ion beam bombardment on semi-insulating (SI) GaAs samples was the observation of persistent photoconductivity. A phenomenological model for optically generated ion beam induced metastable defect state formation was proposed to explain the persistent photoconductivity. Presence of two or more exponential curves in the relaxation mode indicates the distributed nature of the traps within the band gap. A conjectural flat-band energy diagram was introduced to elucidate the proposed model. The observed dark and photoconductivity response model was based on the distributed lumped electrical components analysis. Fundamental transport equations were employed in the analysis of the lumped electrical components model. Metal-Insulator-Semiconductor (MIS) type Schottky barrier diodes and photodiodes were fabricated employing both thermal and anodic oxides. Diode parameters were evaluated as a function of ion-beam energy. An increase in reverse saturation current density accompanied by an increase in the ideality factor was observed, indicating the presence of trap-assisted tunneling and a region of high recombination. The effective barrier height was generally lowered; however, no monotonic correlation with the ion energy was observed. It is proposed that the mechanisms described in previous studies (e.g. tunneling, stoichiometry effects, ion penetration depth) were dominated by the effect of Fermi level pinning at the electronic states of process-induced defects. Deep level transient spectroscopy (DLTS) indicated the presence of at least two distinct deep trap levels, at 0.32 eV and at 0.52 eV below the conduction band edge, as a consequence of ion beam etching. The EL2 peak was evident in the virgin sample and vanished in the ion beam etched samples and such observation is in agreement with our proposed model. The photovoltaic response was characterized using illuminated current-voltage (I-V) and spectral response measurements. The ratio of external quantum efficiencies of IBE devices to unetched device indicates the regions and relative extent of the damage. Since the damage has a impact on the band-bending due to excess carrier generation, the sub-bandgap photon absorption response reveals the degree of disorder. XPS results indicated an increased surface sensitivity and change in Ga/As ratio as a function of ion beam energy. The modelling of ion-beam-processed samples was considered and several computer programs which simulate their operation are described. The depth of amorphization was calculated using the Lindhard-Scharff-SchiΦtt (LSS) theory and the standard projected range and straggle parameters, and experimental parameters. A large difference was observed in the values calculated using LSS theory and experimentally measured values, using optical probes. The difference was explained in light of the Collision-Cascade model. / Ph. D.

The main objective of this study was to determine fundamental information related to ionbeam-induced damage to gallium arsenide (GaAs). The study covers experimental results concerning defect creation in GaAs versus parameters such as implantation energy, nature of GaAs substrate, crystalline orientation, and annealing. Transport and deep level transient spectroscopy (DLTS) results are presented for 50 keV Si-implanted and RTA (rapid thermal annealing) GaAs with (100) and (211) substrate orientations. Several electron traps are identified and their possible origins discussed. It is observed that (211) GaAs, after Si-implantation and RTA, has higher residual damage than (100) oriented GaAs. The electrical properties of active GaAs on Cr-doped and undoped GaAs substrates are compared. The DLTS response of active layers on Cr-doped GaAs is significantly different from those on undoped GaAs. A viable explanation that accounts for this difference is presented. The effects of furnace annealing on electrical properties of 50 keV, 4 x 10¹³ cm⁻² Si-implanted GaAs are addressed. A correlation between the structural recovery and electrical activation is established. The effects of 2 and 6 MeV Si implantation followed by RTA on the electrical characteristics of GaAs are investigated in detail. MeV Si-implantation and RTA generates active buried layers in GaAs. The buried layer quality is found to be at least comparable to a similarly processed keV Si-implanted active GaAs layer. The deep traps in MeV-implanted GaAs are identified and explained in terms of their probable origins. The deep level behavior of MeV Si-implanted and RTA GaAs is distinctly different from keV Si-implanted and RTA GaAs. This difference is largely due to the dynamic annealing occurring during MeV implantation. MESFETs formed on MBE-grown Al_.35Ga_.65As and low temperature MBE-grown GaAs buffer layers have shown peculiar characteristics (improved transconductance, sharper carrier profile, variability in threshold voltage, significant backgating, etc.). The effects of Al_.35Ga_.65As buffers and low temperature GaAs buffers on the electrical properties of the overlying active GaAs are investigated. Transport, DLTS, and SIMS (Secondary Ion Mass Spectroscopy) measurements are employed to explain the abnormalities in buffered MESFETs. Deep states and impurities are identified in buffers; they appear to migrate toward the channel-buffer interface during processing. The defects originating from the buffer are correlated to the performance of MESFETs formed on them. The effects of ion processing parameters, substrate chemistry, buffer layers, and annealing on the electrical characteristics of active GaAs layers are identified. An understanding of these effects is extremely critical to obtain reproducible devices with desirable characteristics. / Ph. D.

The development of microwave Gallium Arsenide Metal Semiconductor Field Effect Transistor (MESFET) devices has enabled the miniaturization of pagers, cellular phones, and other electronic devices. With these MESFET devices comes the need to model them. This thesis extracts a small signal equivalent circuit model from a Gallium Arsenide MESFET device. The approach taken in this thesis is to use measured S- parameters to extract a small signal equivalent circuit model by optimization. Small signal models and S-parameters are explained. The Simplex Method is used to optimize the small signal equivalent circuit model. A thorough analysis of the strengths and weaknesses of the Simplex method is performed. / Master of Science

An electrical analysis was done on A1 and Au Schottky diodes fabricated on n-type (100) GaAs which had been bombarded with low energy Ar ions. The purpose of this study was to quantify electrically damage caused by the Ion Beam Etching (IBE) as functions of energy and fluence. Electrical studies included Deep Level Transient Spectroscopy (DLTS), Current-Voltage (I-V), Capacitance-Voltage (C-V), ConductanceVoltage (G-V), Capacitance-Temperature (C-T), and Activation Energy Analysis. These electrical measurements were carried out on GaAs which had been exposed to a variety of treatments after IBE (such as chemical etch removal) to determine damage depth. At the lowest energy studied, 0.5keV, Schottky reverse saturation currents (I_sat) increased by over 4 orders of magnitude from the virgin case. The ideality factor, n, increased slightly while the breakdown voltage decreased. The most prominent changes occurred in the DLTS spectrum where it was observed that the native arsenic defect EL2 peak disappeared completely after ion etching. Concurrently a sharp increase in the diode conductivity with temperature was seen. It was found that chemical removal of 100Å of GaAs by chemical means could restore most of the diode parameters and the EL2 peak. It is proposed that the loss of EL2 is not related to a true physical reduction (i.e. an arsenic depletion) since calculations showed that the As loss would have extended beyond 3000Å for detectable DLTS changes. Also, the EL2 peak could be made to artificially disappear on a virgin sample with an external diode shunting resistor. The loss of the EL2 peak is, rather, attributed to a thin low resistivity surface layer having a partly amorphous nonstoichiometric crystal structure which can desensitize or mask the DLTS measurement. Surface chemical etch studies over the top of the Schottky diodes recovered 25% of the EL2 peak supporting this conclusion. Lower fluences had no effect at 0.5keV. Increasing ion bombardment energy showed a steady degradation in diode ideality factors. The reverse breakdown voltage increased past the unetched value and the DLTS spectrum began to show a very slight return of EL2. At 3keV the ideality factor was large, indicating the presence of a somewhat thicker high resistance layer. In fact recovery of diode parameters and EL2 did not occur until after 100Å removal. This was much deeper than expected at this energy, according to theory. Physical and lumped R-C electrical models are reported with an accompanying computer simulation of experimental DLTS results. The simulation used both thin low resistance and thick high resistance top layers to show that EL2 could be removed artificially. The models were also somewhat successful in explaining previously reported capacitance dispersion found in IBE GaAs. / Ph. D.