It is widely recognised that security is a concern in the design of a wide range of embedded systems. However, security for embedded systems remains an unsolved problem, which could create greater challenges in the future than security for mainstream computers today. The promise of universal connectivity for embedded systems creates increased possibilities for malicious users to gain unauthorised access to sensitive information. All modern security protocols use private-key and public-key algorithms. This thesis investigates three important cryptography algorithms (RC4, AES, and RSA) and their relevance to networked embedded systems. Limitations in processing power, battery life, communication bandwidth, memory and costs constrain the applicability of existing cryptography standards for small embedded devices. A mismatch between wide arithmetic for security (32 bit word operations) and embedded data bus widths (often only 8 or 16 bits) combined with a lack of certain operations (e. g., multi precision arithmetic) highlight a gap in the domain of networked embedded systems security. The aim of this thesis is to find feasible security solutions for networked embedded system applications. The above mentioned cryptography algorithms have been ported to three hardware platforms (Rabbit RCM3000, Xilinx Virtex 4 FPGA with MicroBlaze softcore, and a Linux desktop machine) in order to simulate several real world scenarios. Three applications – bidirectional transmission with encryption and decryption for various payload length, unidirectional transmission with very short payload, and encrypted data streaming – were developed to meet the simulation requirements. Several timing results were collected and used for calculating the achieved throughput. The Rabbit hardware platform, which represents the lower end in this thesis, was able to perform the RC4 crypto algorithm with a throughput of about 155 kbit/s. Thus the RC4 crypto algorithm was proven to outperform the AES crypto algorithm by a factor of 5, with AES achieving a throughput of about 32 kbit/s with the same hardware platform. The throughput was similar with the streaming application and UDP data transport. Without performing a cryto algorithm, the streaming application was able to process up to 1.5 Mbit/s. RSA was not implemented on the Rabbit hardware platform. The MicroBlaze hardware platform outperformed the Rabbit system by a factor of 5 – 10. It reached a throughput up to 1.5 Mbit/s with RC4 and up to 130 kbit/s with AES. The RSA algorithm reached up to 0.8 kbit/s on this hardware platform, showing that public-key ciphers are only suitable for short payload data, such as the exchange of a session key. The Linux machine was included in this test only to provide a reference to a non embedded system. The Linux performance was better than the MicroBlaze system by a factor of between 67 – 770, and better than the Rabbit platform by a factor of between 645 – 3125. Both the RC4 and the AES crypto algorithm reached a throughput of up to 100 Mbit/s on the Linux machine, with a throughput of up to 130 kbit/s reached with RSA. Hence, the Rabbit platform combined with the RC4 algorithm is suitable, for example, for MP3 streams with up to 150 kbit/s. The Rabbit platform with the AES algorithm could be used for low quality audio streams, for example for speech announcements. If a higher throughput is required, for example for video streams, the MicroBlaze could be an appropriate platform with throughput of up to 1.5 Mbit/s. Low cost embedded systems like Atmel AVR are not suitable for processing cipher algorithms developed in C. It is widely recommended that assembly language is used to develop such platforms.

Main topic of this thesis is Win32 application programming interface and symbolic instructions programming language. It can be divided into four parts. First part sums the basics of 32-bit programming in symbolic instructions language in Windows. Second part describes the Win32 resources for computer intercommunication. Third part presents, describes and comments selected problems in symbolic instructions language.Last part covers a creation of an example application. This application and its parts will be the content of computer exercises in VUT Brno FEEC subject Počítače a jejich periferie.

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L'utilisation des méthodes formelles est de plus en plus courante dans le développement logiciel, et les systèmes de types sont la méthode formelle qui a le plus de succès. L'avancement des méthodes formelles présente de nouveaux défis, ainsi que de nouvelles opportunités. L'un des défis est d'assurer qu'un compilateur préserve la sémantique des programmes, de sorte que les propriétés que l'on garantit à propos de son code source s'appliquent également au code exécutable. Cette thèse présente un compilateur qui traduit un langage fonctionnel d'ordre supérieur avec polymorphisme vers un langage assembleur typé, dont la propriété principale est que la préservation des types est vérifiée de manière automatisée, à l'aide d'annotations de types sur le code du compilateur. Notre compilateur implante les transformations de code essentielles pour un langage fonctionnel d'ordre supérieur, nommément une conversion CPS, une conversion des fermetures et une génération de code. Nous présentons les détails des représentation fortement typées des langages intermédiaires, et les contraintes qu'elles imposent sur l'implantation des transformations de code. Notre objectif est de garantir la préservation des types avec un minimum d'annotations, et sans compromettre les qualités générales de modularité et de lisibilité du code du compilateur. Cet objectif est atteint en grande partie dans le traitement des fonctionnalités de base du langage (les «types simples»), contrairement au traitement du polymorphisme qui demande encore un travail substantiel pour satisfaire la vérification de type. / Formal methods are rapidly improving and gaining ground in software. Type systems are the most successful and popular formal method used to develop software. As the technology of type systems progresses, new needs and new opportunities appear. One of those needs is to ensure the faithfulness of the translation from source code to machine code, so that the properties you prove about the code you write also apply to the code you run. This thesis presents a compiler from a polymorphic higher-order functional language to typed assembly language, whose main property is that type preservation is verified statically, through type annotations on the compiler's code. Our compiler implements the essential code transformations for a higher-order functional language, namely a CPS conversion and closure conversion as well as a code generation. The thesis presents the details of the strongly typed intermediate representations and the constraints they set on the implementation of code transformations. Our goal is to guarantee type preservation with a minimum of type annotations, and without compromising readability and modularity of the code. This goal is already a reality for simple types, and we discuss the problems remaining for polymorphism, which still requires substantial extra work to satisfy the type checker.

[pt] Esta dissertação investiga o uso de programação genética linear na síntese automática de programas em linguagem de montagem para microcontroladores, que implementem estratégias de controle de tempo ótimo ou sub-ótimo, do sistema a ser controlado, a partir da modelagem matemática por equações dinâmicas. Uma das dificuldades encontradas no projeto convencional de um sistema de controle ótimo é que soluções para este tipo de problema normalmente implicam em uma função altamente não-linear das variáveis de estado do sistema. Como resultado, várias vezes não é possível encontrar uma solução matemática exata. Já na implementação, surge a dificuldade de se ter que programar manualmente o microcontrolador para executar o controle desejado. O objetivo deste trabalho foi, portanto, contornar tais dificuldades através de uma metodologia que, a partir da modelagem matemática de uma planta, fornece como resultado um programa em linguagem de montagem. O trabalho consistiu no estudo sobre os possíveis tipos de representações para a manipulação genética de programas em linguagem de montagem, tendo sido concluído que a linear é a mais adequada, e na implementação de uma ferramenta para realizar os três estudos de caso: water bath, cart centering e pêndulo invertido. O desempenho de controle dos programas sintetizados foi comparado com o dos sistemas obtidos por outros métodos (redes neurais, lógica fuzzy, sistemas neurofuzzy e programação genética). Os programas sintetizados demonstraram, no mínimo, o mesmo desempenho, mas com a vantagem adicional de fornecerem a solução já no formato final da plataforma de implementação escolhida: um microcontrolador. / [en] This dissertation investigates the use of genetic programming in automatic synthesis of assembly language programs for microcontrollers, which implement time-optimal or sub-optimal control strategies of the system to be controlled, from the mathematical modeling by dynamic equations. One of the issues faced in conventional design of an optimal control system is that solutions for this kind of problem commonly involve a highly nonlinear function of the state variables of the system. As a result, frequently it is not possible to find an exact mathematical solution. On the implementation side, the difficulty comes when one has to manually program the microcontroller to run the desired control. Thus, the objective of this work was to overcome these difficulties applying a methodology that, starting from the mathematical modeling of a plant, provides as result an assembly language microcontroller program. The work included a study of the possible types of genetic representation for the manipulation of assembly language programs. In this regard, it has been concluded that the linear is the most suitable representation. The work also included the implementation of a tool to accomplish three study cases: water bath, cart centering and inverted pendulum. The performance of control of the synthesized programs was compared with the one obtained by other methods (neural networks, fuzzy logic, neurofuzzy systems and genetic programming). The synthesized programs achieved at least the same performance of the other systems, with the additional advantage of already providing the solution in the final format of the chosen implementation platform: a microcontroller.

<p>Computer architecture and assembly language programming microprocessor execution are basic courses taught in every computer science department. Generally, however, students have&nbsp / difficulties in mastering many of the concepts in the courses, particularly students whose first language is not English. In addition to their difficulties in understanding the purpose of given&nbsp / instructions, students struggle to mentally visualize the data movement, control and processing operations. To address this problem, this research proposed a graphical visualization approach&nbsp / and investigated the visual illustrations of such concepts and instruction execution by implementing a graphical visualization simulator as a teaching aid. The graphical simulator developed during the course of this research was applied in a computer architecture course at Kabul University, Afghanistan. Results obtained from student evaluation of the simulator show significant&nbsp / levels of success using the visual simulation teaching aid. The results showed that improved learning was achieved, suggesting that this approach could be useful in other computer science departments in Afghanistan, and elsewhere where similar challenges are experienced.</p>

L'utilisation des méthodes formelles est de plus en plus courante dans le développement logiciel, et les systèmes de types sont la méthode formelle qui a le plus de succès. L'avancement des méthodes formelles présente de nouveaux défis, ainsi que de nouvelles opportunités. L'un des défis est d'assurer qu'un compilateur préserve la sémantique des programmes, de sorte que les propriétés que l'on garantit à propos de son code source s'appliquent également au code exécutable. Cette thèse présente un compilateur qui traduit un langage fonctionnel d'ordre supérieur avec polymorphisme vers un langage assembleur typé, dont la propriété principale est que la préservation des types est vérifiée de manière automatisée, à l'aide d'annotations de types sur le code du compilateur. Notre compilateur implante les transformations de code essentielles pour un langage fonctionnel d'ordre supérieur, nommément une conversion CPS, une conversion des fermetures et une génération de code. Nous présentons les détails des représentation fortement typées des langages intermédiaires, et les contraintes qu'elles imposent sur l'implantation des transformations de code. Notre objectif est de garantir la préservation des types avec un minimum d'annotations, et sans compromettre les qualités générales de modularité et de lisibilité du code du compilateur. Cet objectif est atteint en grande partie dans le traitement des fonctionnalités de base du langage (les «types simples»), contrairement au traitement du polymorphisme qui demande encore un travail substantiel pour satisfaire la vérification de type. / Formal methods are rapidly improving and gaining ground in software. Type systems are the most successful and popular formal method used to develop software. As the technology of type systems progresses, new needs and new opportunities appear. One of those needs is to ensure the faithfulness of the translation from source code to machine code, so that the properties you prove about the code you write also apply to the code you run. This thesis presents a compiler from a polymorphic higher-order functional language to typed assembly language, whose main property is that type preservation is verified statically, through type annotations on the compiler's code. Our compiler implements the essential code transformations for a higher-order functional language, namely a CPS conversion and closure conversion as well as a code generation. The thesis presents the details of the strongly typed intermediate representations and the constraints they set on the implementation of code transformations. Our goal is to guarantee type preservation with a minimum of type annotations, and without compromising readability and modularity of the code. This goal is already a reality for simple types, and we discuss the problems remaining for polymorphism, which still requires substantial extra work to satisfy the type checker.

<p>Computer architecture and assembly language programming microprocessor execution are basic courses taught in every computer science department. Generally, however, students have&nbsp / difficulties in mastering many of the concepts in the courses, particularly students whose first language is not English. In addition to their difficulties in understanding the purpose of given&nbsp / instructions, students struggle to mentally visualize the data movement, control and processing operations. To address this problem, this research proposed a graphical visualization approach&nbsp / and investigated the visual illustrations of such concepts and instruction execution by implementing a graphical visualization simulator as a teaching aid. The graphical simulator developed during the course of this research was applied in a computer architecture course at Kabul University, Afghanistan. Results obtained from student evaluation of the simulator show significant&nbsp / levels of success using the visual simulation teaching aid. The results showed that improved learning was achieved, suggesting that this approach could be useful in other computer science departments in Afghanistan, and elsewhere where similar challenges are experienced.</p>

This work explores two methods for practical cryptography on mobile devices. The first method is a quantum-resistant key-exchange protocol proposed by Jao et al.. As the use of mobile devices increases, the deployment of practical cryptographic protocols designed for use on these devices is of increasing importance. Furthermore, we are faced with the possible development of a large-scale quantum computer in the near future and must take steps to prepare for this possibility. We describe the key-exchange protocol of Jao et al. and discuss their original implementation. We then describe our modifications to their scheme that make it suitable for use in mobile devices. Our code is between 18-26% faster (depending on the security level). The second is an highly optimized implementation of Miller's algorithm that efficiently computes the Optimal Ate pairing over Barreto-Naehrig curves proposed by Grewal et al.. We give an introduction to cryptographic pairings and describe the Tate pairing and its variants. We then proceed to describe Grewal et al.'s implementation of Miller's algorithm, along with their optimizations. We describe our use of hand-optimized assembly code to increase the performance of their implementation. For the Optimal Ate pairing over the BN-446 curve, our code is between 7-8% faster depending on whether the pairing uses affine or projective coordinates.

Orientador: Paulo Cesar Centoducatte / Dissertação (mestrado) - Universidade Estadual de Campinas, Instituto de Computação / Made available in DSpace on 2018-08-05T00:50:23Z (GMT). No. of bitstreams: 1 Baldassin_Alexandro_M.pdf: 957897 bytes, checksum: 02ca08a95301bf7e9262564a9672c8b4 (MD5) Previous issue date: 2005 / Resumo: Projetistas de sistemas dedicados enfrentam atualmente novos desafios em todas as fases do projeto. A difusão da tecnologia conhecida como SoC (System on a Chip) requer novos paradigmas para a especificação, implementação e verificação do projeto. A alta complexidade de tais sistemas e a grande variedade de configurações disponíveis podem tornar a escolha do sistema ideal demorada, prolongando o tempo de projeto e conseqüentemente seu ingresso no mercado. Em especial, no processo de escolha de um certo processador, o projetista necessita de um conjunto básico de ferramentas que lhe permitam analisar questões como desempenho, potência consumida, ou ainda área de silício ocupada. Exemplos de ferramentas importantes nessa fase de avaliação do projeto incluem compiladores, montadores e simuladores de instruções. Nesse contexto, o uso de uma linguagem para descrição de arquitetura (Architecture Description Language, ADL) permite que processadores sejam modelados em níveis altos de abstração, e que um conjunto de ferramentas específicas para o modelo descrito seja gerado automaticamente. ArchC é uma ADL em desenvolvimento no Laboratório de Sistemas de Computação (IC-UNICAMP), e já é capaz de gerar ferramentas de simulação de instruções automaticamente. Desenvolvemos neste trabalho uma ferramenta para geração automática de montadores a partir de modelos descritos em ArchC, denominada acasm 2. O desenvolvimento de acasm nos levou a incorporar novas construções a ArchC para a modelagem da linguagem de montagem e da codificação das instruções. Nossa ferramenta gera um conjunto de arquivos dependentes de arquitetura para o redirecionamento do montador GNU Assembler (gas). Usamos acasm para gerar montadores a partir de modelos, em ArchC, das arquiteturas MIPS-I e SPARC-V8, e comparamos os arquivos objetos obtidos com os gerados pelo montador gas nativo para ambas arquiteturas. Os resultados mostraram que os arquivos gerados pelo nosso montador foram idênticos aos gerados pelo montador nativo para ambas arquiteturas / Abstract: Nowadays, embedded systems designers are facing new challenges at all stages of the design process. The growing of the system-on-chip (SoC) technology is creating new paradigms in the specification, implementation and verification phases of a design. The increasing complexity and the myriad of available configurations make it hard to choose the ideal system, therefore lengthening the design time, as well as time to market. Specially, customization of the processor architecture requires a software toolkit in order to estimate factors such as performance, power dissipation and chip area. Examples of these tools may include compilers, assemblers and instruction level simulators. In this context, the use of an architecture description language (ADL) allows one to model processors using different levels of abstraction. Based on the model, a software toolkit can be automatically generated. ArchC is an ADL being developed by the Computer Systems Laboratory (IC-UNICAMP) and can automatically generate instruction level simulators at its current stage. In this work, we have created a tool to automatically generate assemblers from ArchC models, named acasm 3. While developing acasm we have introduced new language constructions to ArchC in order to describe the assembly language syntax and the instruction encoding scheme. Our tool retargets the GNU assembler (gas) to different architectures by generating a set of architecture depedent files based on ArchC models. We used acasm to generate assemblers to the MIPS-I and SPARC-V8 architectures based on our ArchC models. We then compared the object files created by our assemblers with the ones created by the native gas and no difference between each pair of files was noticed, for both architectures / Mestrado / Mestre em Ciência da Computação