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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

A 30 Gb/s High-Swing, Open-Collector Modulator Driver in 250 nm SiGe BiCMOS

Giuglea, Alexandru, Belfiore, Guido, Khafaji, Mahdi, Henker, Ronny, Ellinger, Frank 24 April 2019 (has links)
This paper presents a modulator driver realized as a breakdown voltage doubler which can provide a high output swing of 7.6 Vpp,diff for load impedances as low as 30 Ω, thus overcoming the limitation imposed by the collector-emitter breakdown voltage. The open-collector design gives an important degree of freedom regarding the modulator load to be driven, while significantly reducing the circuit's power consumption. The driver is capable of running at 30 Gb/s while dissipating 1 W of DC power. Thanks to the inductorless design, the active area occupied by the circuit is only 0.28 mm × 0.23 mm. The driver was realized in a 250 nm SiGe BiCMOS technology.
2

Improving linearity utilising adaptive predistortion for power amplifiers at mm-wave frequencies

Valliarampath, J.T. (Joe) January 2014 (has links)
The large unlicensed 3 GHz overlapping bandwidth that is available worldwide at 60 GHz has resulted in renewed interest in 60 GHz technology. This frequency band has made it attractive for short-range gigabit wireless communication. The power amplifier (PA) directly influences the performance and quality of this entire communication chain, as it is one of the final subsystems in the transmitter. Spectral efficient modulation schemes used at 60 GHz pose challenging requirements for the linearity of the PA. To improve the linearity, several external linearisation techniques currently exist, such as feedback, feedforward, envelope elimination and restoration, linear amplification with non-linear components and predistortion. This thesis is aimed at investigating and characterising the distortion components found in PAs at mm-wave frequencies and evaluating whether an adaptive predistortion (APD) linearisation technique is suitable to reduce these distortion components. After a thorough literature study and mathematical analysis, it was found that the third-order intermodulation distortion (IMD3) components were the most severe distortion components. Predistortion was identified as the most effective linearisation technique in terms of minimising these IMD3 components and was therefore proposed in this research. It does not introduce additional complexity and can easily be integrated with the PA. Furthermore, the approach is stable and has lower power consumption when compared to the aforementioned linearisation techniques. The proposed predistortion technique was developed compositely through this research by making it a function of the PA’s output power that was measured using a power detector. A comparator was used with the detected output power and the reference voltages to control the dynamic bias circuit of the variable gain amplifier. This provided control and flexibility on when to apply the predistortion to the PA and therefore allowing the linearity of the PA to be optimised. Three-stage non-linear and linear PAs were also designed at 60 GHz and implemented to compare the performance of the APD technique and form part of the hypothesis verification process. The 130 nm silicon-germanium (SiGe) bipolar and complementary metal oxide semiconductor (BiCMOS) technology from IBM was used for the simulation of the entire APD and PA design and for the fabrication of the prototype integrated circuits (ICs). This technology has the advantage of integrating the high performance, low power intensive SiGe heterojunction bipolar transistors (HBTs) with the CMOS technology. The SiGe HBTs have a high cut-off frequency ( > 200 GHz), which is ideal for mm-wave PA applications and the CMOS components were integrated in the control logic of the digital circuitry. The simulations and IC layout were accomplished with Cadence Virtuoso. The implemented IC occupies an area of 1.8 mm by 2.0 mm. The non-linear PA achieves a of 11.97 dBm and an of -10 dBm. With the APD technique applied, the linearity of the PA is significantly improved with an of -6 dBm and an optimum IMD3 reduction of 10 dB. Based on the findings and results of the applied APD technique, APD reduced intermodulation distortion (especially the IMD3) and is thus suitable to improve the linearity of PAs at mm-wave frequencies. To the knowledge of this author, no APD technique has been applied for PAs at 60 GHz, therefore the contribution of this research will assist future PA designers to characterise and optimise the reduction of the IMD3 components. This will result in improved linear output power from the PA and the use of complex modulation schemes at 60 GHz. ## Die groot ongelisensieerde oorvleuelde bandwydte van 3 GHz wat wêreldwyd by 60 GHz beskikbaar is, het hernude belangstelling in 60 GHz-tegnologie tot gevolg gehad. Hierdie frekwensieband het dit aantreklik gemaak vir kortafstand-gigabis draadlose kommunikasie. Aangesien die drywingsversterker een van die finale subsisteme in die seintoestel is, het dit ’n direkte invloed op die werkverrigting en kwaliteit van die hele kommunikasieketting. Spektraaldoeltreffende modulasieskemas wat by 60 GHz gebruik word, stel uitdagende vereistes vir die lineariteit van die drywingsversterker. Om die lineariteit te verbeter, is daar tans verskeie eksterne linearisasietegnieke beskikbaar, soos terugvoer, vooruitvoer, omhullende eliminasie en -restorasie, lineêre versterking met nie-lineêre komponente en predistorsie. Hierdie tesis het ten doel om die distorsiekomponente wat by millimetergolffrekwensies in drywingsversterkers gevind word, te ondersoek en te karakteriseer en om te bepaal of ’n aanpassende predistorsielinearisasietegniek geskik is om hierdie distorsiekomponente te verminder. Na ’n deeglike literatuurstudie en wiskundige analise is gevind dat die derde-orde-intermodulasiedistorsiekomponente (IMD3) die ergste distorsiekomponente was. Predistorsie is geïdentifiseer as die mees effektiewe linearisasietegniek om hierdie IMD3-komponente te minimeer en die gebruik daarvan is gevolglik in hierdie navorsing voorgestel. Dit bring nie addisionele kompleksiteit mee nie en kan maklik met die drywingsversterker geïntegreer word. Daarbenewens is die benadering stabiel, met laer kragverbruik in vergelyking met die linearisasietegnieke wat voorheen genoem is. Die voorgestelde predistorsietegniek is in hierdie navorsing ontwikkel deur dit ’n funksie van die drywingsversterker se uitsetkrag te maak, wat gemeet is deur ’n kragdetektor te gebruik. ’n Vergelyker is saam met die gemete uitsetkrag en die verwysingspannings gebruik om die dinamiese voorspanningsbaan van die veranderlike winsversterker te beheer. Dit het toegelaat vir beheer en buigsaamheid in die aanwending van die predistorsie op die drywingsversterker en gevolglik vir die optimering van die lineêriteit van die drywingsversterker. Driefase- nie-lineêre en lineêre drywingsversterkers is ook by 60 GHz ontwerp en geïmplementeer om die werkverrigting van die aanpassende predistorsietegniek te vergelyk en dit vorm deel van die verifikasieproses van die hipotese. Die 130 nm-silikon-germanium (SiGe) bipolêre en metaaloksiedhalfgeleier- (BiCMOS) tegnologie van IBM is gebruik vir die simulasie van die hele aanpassende predistorsietegniek- en drywingsversterkerontwerp en vir die vervaardiging van die prototipe- geïntegreerde stroombane. Hierdie tegnologie het die voordeel dat dit die hoë werkverrigting en lae krag-intensiewe SiGe-heterovoegvlak-bipolêre transistors (HBTs) met die CMOS-tegnologie integreer. Die SiGe-HBTs het ’n hoë afsnyfrekwensie ( > 200 GHz), wat ideaal is vir mm-golfdrywingsversterkeraanwendings en die CMOS-komponente is in die beheer-logika van die digitale stroombaan geïntegreer. Die geïntegreerde stroombaan beslaan ’n area van 1.8 mm by 2.0 mm. Die nie-lineêre drywingsversterker behaal ’n van 11.97 dBm en ’n van -10 dBm. As die APD-tegniek toegepas word, word die lineariteit van die drywingsversterker beduidend verbeter tot ’n van -6 dBm en ’n optimum-IMD3-vermindering van 10 dB. Volgens die bevindings en resultate van die APD-tegniek wat toegepas is, verminder APD intermodulasiedistorsie (veral die IMD3) en is gevolglik geskik om die lineariteit van drywingsversterkers by mm-golffrekwensies te verbeter. Na die wete van hierdie skrywer is daar nie voorheen enige APD tegniek toegepas vir drywingsversterkers by 60 GHz nie, gevolglik sal die bydrae van hierdie navorsing toekomstige drywingsversterkerontwerpers help om die vermindering van die IMD3-komponente te karakteriseer en optimeer. Dit sal verbeterde lineêre uitsetkrag van die drywingsversterker tot gevolg hê, asook meer komplekse modulasieskemas by 60 GHz toelaat. / Thesis (PhD)--University of Pretoria, 2014. / lk2014 / Electrical, Electronic and Computer Engineering / PhD / unrestricted
3

Spurious free dynamic range enhancement of high-speed integrated digital to analogue converters using bicmos technology

Reddy, Reeshen January 2015 (has links)
High-speed digital to analogue converters (DAC), which are optimised for large bandwidth signal synthesis applications, are a fundamental building block and enabling technology in industrial instrumentation, military, communication and medical applications. The spurious free dynamic range (SFDR) is a key specification of high-speed DACs, as unwanted spurious signals generated by the DAC degrades the performance and effectiveness of wideband systems. The focus of this work is to enhance the SFDR performance of high-speed DACs. As bandwidth requirements increase, meeting the desired SFDR performance is further complicated by the increase in dynamic non-linearity. The most widely used architecture in high-speed applications is the current-steering DAC fabricated on CMOS technology. The current source finite output impedance, switch distortion and clock feedthrough are the greatest contributors to dynamic non-linearity and are difficult to improve with the use of MOS devices alone. This research proposes the use of BiCMOS technology that offers high performance, using heterojunction bipolar transistors (HBT) that, when combined with MOS devices, are able to improve on the linearity of the current-steering DAC and hence improve the SFDR. A design methodology is introduced based on BiCMOS fabrication technology to improve SFDR performance and places emphasis on the constraints of modern fabrication processes. A six-bit current-steering application-specific integrated circuit DAC is designed based on the proposed design methodology, which optimises the SFDR performance of high-speed binary weighted architectures by lowering current switch distortion and reducing the clock feedthrough effect to verify the hypothesis experimentally. A novel current source cell is implemented that comprises HBT current switches, negative channel metal-oxide semiconductor (NMOS) cascode and NMOS current source to overcome distortion by specifically enhancing the SFDR for high-speed DACs. A switch driver and low-voltage differential signalling receiver to achieve high-speed DAC performance and their influence on the SFDR performance are designed and discussed. The DAC is implemented using the International Business Machines Corporation (IBM) 8HP silicon germanium (SiGe) BiCMOS 130 nm technology. The DAC achieves a better than 21.96 dBc SFDR across the Nyquist band for a sampling rate of 500 MS/s with a core size of 0.1 mm2 and dissipates just 4 mW compared to other BiCMOS DACs that achieve similar SFDR performance with higher output voltages, resulting in much larger power dissipation. / Dissertation (MEng)--University of Pretoria, 2015. / Electrical, Electronic and Computer Engineering / MEng / Unrestricted
4

Improving linearity utilising adaptive predistortion for power amplifiers at mm-wave frequencies

Valliarampath, J.T. (Joe) 29 July 2014 (has links)
The large unlicensed 3 GHz overlapping bandwidth that is available worldwide at 60 GHz has resulted in renewed interest in 60 GHz technology. This frequency band has made it attractive for short-range gigabit wireless communication. The power amplifier (PA) directly influences the performance and quality of this entire communication chain, as it is one of the final subsystems in the transmitter. Spectral efficient modulation schemes used at 60 GHz pose challenging requirements for the linearity of the PA. To improve the linearity, several external linearisation techniques currently exist, such as feedback, feedforward, envelope elimination and restoration, linear amplification with non-linear components and predistortion. This thesis is aimed at investigating and characterising the distortion components found in PAs at mm-wave frequencies and evaluating whether an adaptive predistortion (APD) linearisation technique is suitable to reduce these distortion components. After a thorough literature study and mathematical analysis, it was found that the third-order intermodulation distortion (IMD3) components were the most severe distortion components. Predistortion was identified as the most effective linearisation technique in terms of minimising these IMD3 components and was therefore proposed in this research. It does not introduce additional complexity and can easily be integrated with the PA. Furthermore, the approach is stable and has lower power consumption when compared to the aforementioned linearisation techniques. The proposed predistortion technique was developed compositely through this research by making it a function of the PA’s output power that was measured using a power detector. A comparator was used with the detected output power and the reference voltages to control the dynamic bias circuit of the variable gain amplifier. This provided control and flexibility on when to apply the predistortion to the PA and therefore allowing the linearity of the PA to be optimised. Three-stage non-linear and linear PAs were also designed at 60 GHz and implemented to compare the performance of the APD technique and form part of the hypothesis verification process. The 130 nm silicon-germanium (SiGe) bipolar and complementary metal oxide semiconductor (BiCMOS) technology from IBM was used for the simulation of the entire APD and PA design and for the fabrication of the prototype integrated circuits (ICs). This technology has the advantage of integrating the high performance, low power intensive SiGe heterojunction bipolar transistors (HBTs) with the CMOS technology. The SiGe HBTs have a high cut-off frequency (fT > 200 GHz), which is ideal for mm-wave PA applications and the CMOS components were integrated in the control logic of the digital circuitry. The simulations and IC layout were accomplished with Cadence Virtuoso. The implemented IC occupies an area of 1.8 mm by 2.0 mm. The non-linear PA achieves a Psat of 11.97 dBm and an IP1dB of -10 dBm. With the APD technique applied, the linearity of the PA is significantly improved with an IP1dB of -6 dBm and an optimum IMD3 reduction of 10 dB. Based on the findings and results of the applied APD technique, APD reduced intermodulation distortion (especially the IMD3) and is thus suitable to improve the linearity of PAs at mm-wave frequencies. To the knowledge of this author, no APD technique has been applied for PAs at 60 GHz, therefore the contribution of this research will assist future PA designers to characterise and optimise the reduction of the IMD3 components. This will result in improved linear output power from the PA and the use of complex modulation schemes at 60 GHz. / Thesis (PhD)--University of Pretoria, 2014. / Electrical, Electronic and Computer Engineering / PhD
5

Capacitively-Coupled, Pseudo Return-to-Zero Input, Latched-Bias Data Receiver

Mathieu, Brandon Lee January 2018 (has links)
No description available.
6

Comparison of Segmented and Traveling-Wave Electro-Optical Transmitters Based on Silicon Photonics Mach-Zehnder Modulators

Giuglea, Alexandru, Belfiore, Guido, Khafaji, Mahdi, Henker, Ronny, Petousi, Despoina, Winzer, Georg, Zimmermann, Lars, Ellinger, Frank 17 September 2019 (has links)
This paper presents a brief study of the two most commonly used topologies - segmented and traveling-wave - for realizing monolithically integrated electro-optical transmitters consisting of Si-photonics Mach-Zehnder modulators and their electrical drivers. To this end, two new transmitters employing high swing breakdown voltage doubler drivers were designed in the aforementioned topologies and compared with regard to their extinction ratio and DC power consumption at the data rate of 30 Gb/s. It is shown that for the targeted data rate and extinction ratio, a considerably lower power consumption can be achieved with the traveling-wave topology than with its segmented counterpart. The transmitters were realized in a 250 nm SiGe BiCMOS electronic-photonic integrated technology.
7

Design of a 24 GHz FMCW radar system based on sub-harmonic generation

El Agroudy, Naglaa, El-Shennawy, Mohammed, Joram, Niko, Ellinger, Frank 15 May 2019 (has links)
This study presents a novel frequency modulated continuous wave (FMCW) radar system based on sub-harmonic generation, where a 24 GHz frequency divider-by-10 is used as an active reflector tag. A practical prototype is designed and fabricated on a GF45nm-Silicon on Insulator (SOI) technology for the 24 GHz building blocks, while a GF0.18 μm 7WL Bipolar Complementary Metal Oxide Semiconductor (BiCMOS) technology was used for the 2.4 GHz receiver and baseband. System measurement results show that as opposed to conventional primary radars, the proposed system is immune to strong multi-path interferences resulting from direct reflections of the interrogating signal. The system achieves a ranging precision of 3.7 mm with loop measurements. Moreover, when measured in an indoor environment, the ranging results show a ranging precision and accuracy of 5.8 and 22.3 cm, respectively, which outperform other FMCW radars in the literature.

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