In the 2010, targets of National Science and Technology Program - Energy¡¥s project plan had mentioned about the development of power line communication (PLC). This shows the importance of PLC. The data transmission occur burst errors easily by the noise interference from the environment. In order to reduce the error rate, we design a modulation/demodulation chip with error correctable and high error detected ability for power line communication in this thesis. The proposed design consists of Cyclic Redundancy Check (CRC), Pulse Width Modulation (PWM), Frequency Shift Keying (FSK), Forward Error Correction (i.e. binary BCH code), and interleaving techniques. The CRC can detect the errors occurred in the digital communication. The probability of finding error is 99.997%. The BCH code is capable of correcting any combination of 3 or fewer errors in block. The function of PWM is to generate the digital pulses that exhibit the changeable pulse width according to the swing of the input voltage. In the telecommunication, FSK is a frequency modulation scheme such that the digital information can be transmitted through the discrete frequency changes of the carrier. Interleaving can make burst errors look like random errors. The design is implemented TSMC 0.18£gm process. The fabricated chip area is 1.16 millimeter square with 3.3V/1.8V supply voltages. The measured data shows that the proposed design is fully functional and consumes 55.5 £gW.

In recent years, the development of power line communication and relational application is gradually attracted much attention. The use of power line system is able to achieve home network automation, automatic meter reading, and demand supply management, so it can be a great help for the current emphasis on energy conservation ideas. Therefore, many international organizations and national programs involve in researches. The signal is vulnerable to the environment causing data error in the power line transmission, so that we reduce the use of power line communication. For making great application of power line system, the main purpose of the thesis is to study that ensure the data accuracy, integrity and security through power line transmission. Therefore, we designed the digital chip for power line communication. We achieve the signal transmission with the half-duplex ability through power line by digital chip designing and solve error problems about transmitting data. By designing the modules of digital circuit, the chip can encrypt/decrypt data, correct error-bits of data, detect accuracy of data, process control signals, and modulate/demodulate signals. The purpose is for increasing data accuracy in PLC transmission. The chip design adopts TSMC 0.18£gm process as full digital circuits and applies to the energy meter management.

Στην εργασία αυτή μελετώνται τεχνικές διόρθωσης λαθών BCH κωδικοποίησης και η υλοποίηση τους με αρχιτεκτονικές VLSI. Στην αρχή γίνεται μία εισαγωγή στα Συστήματα Ψηφιακής Επικοινωνίας. Αυτή ακολουθείται από μία περιγραφή των μαθηματικών θεωρημάτων και ορισμών που χρησιμοποιούνται για την Διόρθωση Λαθών. Επίσης, παρουσιάζονται οι βασικές Τεχνικές Κωδικοποίησης, δίνοντας ιδιαίτερη έμφαση στην BCH Κωδικοποίηση. Στην συνέχεια παρουσιάζεται η πλατφόρμα εξομοίωσης στο MatLab, και οι συναρτήσεις που την υλοποιούν, για την μέτρηση BER διαφόρων BCH Κωδικών. Κάνοντας χρήση αυτής της πλατφόρμας γίνεται η σύγκριση μεταξύ non-binary και binary BCH Κωδίκων ίδιου code rate καθώς και non-binary BCH Κωδίκων διαφορετικών μηκών και code rate. Στο τελευταίο μέρος της εργασίας, προτείνεται μία γενική αρχιτεκτονική ενός non-binary BCH αποκωδικοποιητή. Βάσει αυτής της προτεινόμενης αρχιτεκτονικής περιγράφεται λεπτομερώς η υλοποίηση ενός αποκωδικοποιητή οκταδικού BCH Κώδικα μήκους 63 συμβόλων και διάστασης 48 συμβόλων με απόσταση σχεδίασης 4 συμβόλων. Τέλος, μετά την παρουσίαση των αποτελεσμάτων της υλοποίησης του συγκεκριμένου αποκωδικοποιητή σε FPGA πλατφόρμα ανάπτυξης, συνοψίζονται τα συμπεράσματα που προέκυψαν από την παραπάνω διαδικασία. / This dissertation refers to BCH error correction coding techniques and their implementation with VLSI architectures. At first, an introduction in the Digital Communications Systems takes place. This is followed by a description of mathematical theorems and definitions used for the error correction coding. In addition, basic coding techniques are presented emphasising in BCH Codes. The dissertation continues with the presentation of the MatLab simulation platform, as well as the functions that implement this, for the BER measurement of various BCH codes. Using this platform, a comparison is made between non binary and binary BCH codes of the same code rate as well as non binary BCH codes of different lengths and code rates. In the last part, a general architecture of a non binary BCH decoder is proposed. According to this architecture, an implementation of an octal BCH 63 symbols length, 48 symbol dimension and 4 symbols design distance code decoder, is described in depth. Finally, after the presentation of the implementation results of the described decoder in FPGA board, the conclusions that came up from the above procedure, are summarised.

During the race towards the4th generation (4G) cellular-based digital communication systems, a growth in the demand for high capacity, multi-media capable, improved Quality-of-Service (QoS) mobile communication systems have caused the developing mobile communications world to turn towards betterMultiple Access (MA) techniques, like Code Division Multiple Access (CDMA) [5]. The demand for higher throughput and better QoS in future 4G systems have also given rise to a scheme that is becoming ever more popular for use in these so-called ‘bandwidth-on-demand’ systems. This scheme is known as adaptive channel coding, and gives a system the ability to firstly sense changes in conditions, and secondly, to adapt to these changes, exploiting the fact that under good channel conditions, a very simple or even no channel coding scheme can be used for Forward Error Correction(FEC). This will ultimately result in better system throughput utilization. One such scheme, known as incremental redundancy, is already implemented in the Enhanced Data Rates for GSM Evolution (EDGE) standard. This study presents an extensive simulation study of a Multi-User (MU), adaptive channel coded Direct Sequence Spread Spectrum Multiple Access (DS/SSMA) communication system. This study firstly presents and utilizes a complex Base Band(BB) DS/SSMA transmitter model, aimed at user data diversity [6] in order to realize the MU input data to the system. This transmitter employs sophisticated double-sideband (DSB)Constant-Envelope Linearly Interpolated Root-of-Unity (CE-LI-RU) filtered General Chirp-Like (GCL) sequences [34, 37, 38] to band limit and spread user data. It then utilizes a fully user-definable, complex Multipath Fading Channel Simulator(MFCS), first presented by Staphorst [3], which is capable of reproducing all of the physical attributes of realistic mobile fading channels. Next, this study presents a matching DS/SSMA receiver structure that aims to optimally recover user data from the channel, ensuring the achievement of data diversity. In order to provide the basic channel coding functionality needed by the system of this study, three simple, but well-known channel coding schemes are investigated and employed. These are: binary Hamming (7,4,3) block code, (15,7,5) binary Bose-Chadhuri-Hocquenghem (BCH) block code and a rate 1/3 <i.Non-Systematic (NS) binary convolutional code [6]. The first step towards the realization of any adaptive channel coded system is the ability to measure channel conditions as fast as possible, without the loss of accuracy or inclusion of known data. In 1965, Gooding presented a paper in which he described a technique that measures communication conditions at the receiving end of a system through a device called a Performance Monitoring Unit (PMU) [12, 13]. This device accelerates the system’sBit Error Rate (BER) to a so-called Pseudo Error Rate(PER) through a process known as threshold modification. It then uses a simple PER extrapolation algorithm to estimate the system’s true BER with moderate accuracy and without the need for known data. This study extends the work of Gooding by applying his technique to the DS/SSMA system that utilizes a generic Soft-Output Viterbi Algorithm(SOVA) decoder [39] structure for the trellis decoding of the binary linear block codes [3, 41-50], as well as binary convolutional codes mentioned, over realistic MU frequency selective channel conditions. This application will grant the system the ability to sense changes in communication conditions through real-time BER measurement and, ultimately, to adapt to these changes by switching to different channel codes. Because no previous literature exists on this application, this work is considered novel. Extensive simulation results also investigate the linearity of the PER vs. modified threshold relationship for uncoded, as well as all coded cases. These simulations are all done for single, as well as multiple user systems. This study also provides extensive simulation results that investigate the calculation accuracy and speed advantages that Gooding’s technique possesses over that of the classic Monte-Carlo technique for BER estimation. These simulations also consider uncoded and coded cases, as well as single and multiple users. Finally, this study investigates the experimental real-time performance of the fully functional MU, adaptive coded, DS/SSMA communication system over varying channel conditions. During this part of the study, the channel conditions are varied over time, and the system’s adaptation (channel code switching) performance is observed through a real-time observation of the system’s estimated BER. This study also extends into cases with multiple system users. Since the adaptive coded system of this study does not require known data sequences (training sequences), inclusion of Gooding’s technique for real-time BER estimation through threshold modification and PER extrapolation in future 4G adaptive systems will enable better Quality-of-Service (QoS) management without sacrificing throughput. Furthermore, this study proves that when Gooding’s technique is applied to a coded system with a soft-output, it can be an effective technique for QoS monitoring, and should be considered in 4G systems of the future. / Dissertation (MEng (Computer Engineering))--University of Pretoria, 2007. / Electrical, Electronic and Computer Engineering / MEng / unrestricted