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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
321

Friction Bit Joining of Dissimilar Combinations of GADP 1180 Steel and AA 7085 – T76 Aluminum

Atwood, Lorne Steele 01 June 2016 (has links)
Friction Bit Joining (FBJ) is a method used to join lightweight metals to advanced high-strength steels (AHSS). The automotive industry is experiencing pressure to improve fuel efficiency in their vehicles. The use of AHSS and aluminum will reduce vehicle weight which will assist in reducing fuel consumption. Previous research achieved joint strengths well above that which was required in three out of the four standard joint strength tests using DP980 AHSS and 7075 aluminum. The joints were mechanically tested and passed the lap-shear tension, cross-tension, and fatigue cycling tests. The t-peel test configuration never passed the minimum requirements. The purpose of continuing research was to increase the joint strength using FBJ to join the aluminum and AHSS the automotive industry desires to use specifically in the t-peel test. In this study FBJ was used to join 7085 aluminum and GADP1180 AHSS. The galvanic coating on the AHSS and its increased strength with the different aluminum alloy required that all the tests be re-evaluated and proven to pass the standard tests. FBJ is a two-step process that uses a consumable bit. In the first step the welding machine spins the bit to cut through the aluminum, and the second step applies pressure to the bit as it comes in contact with the AHSS to create a friction weld.
322

Peer to peer multicast overlay for smart content delivery

Graça, Afonso da Rocha January 2012 (has links)
Tese de Mestrado Integrado. Engenharia Informática e Computação. Faculdade de Engenharia. Universidade do Porto. 2012
323

利用可變速率方法賦予網路電話壅塞控制能力 / Congestion Control Enabled VoIP by Flexible Bit-rate

丁諭祺, Ting, Yu Chi Unknown Date (has links)
近年來,一個具有壅塞控制機制的傳輸協議DCCP被提出,期能取代UDP成為不可靠傳輸的主流協議。我們以NS-2網路模擬器和實際網路進行實驗,發現DCCP無法與其他傳輸協議公平分享頻寬,因此現行DCCP的設計,尚無法完全取代UDP。此外,目前DCCP以調整封包間隔的方式進行壅塞控制,也不適用於講求時效性的網路服務。 本研究首先以實驗證明,當網路情況不佳時,DCCP無法與其他傳輸協議公平的分享頻寬;當使用DCCP傳輸越洋長距離網路電話,如遇頻寬不足時,會因頻寬競爭力較弱而無法維持通話品質。本研究提出可變速率方法(Flexible Bit-rate)調整時效性網路服務的封包大小來進行壅塞控制,在維持一定服務品質之前提下,促進網路的和諧。我們在一個實際網路的實驗環境中評估以UDP、DCCP及可變速率三種方式傳輸網路電話封包的效能,結果顯示透過可變速率方法,能有效降低網路電話的封包遺失率,維持通話品質。 / With congestion-control ability, Datagram Congestion Control Protocol (DCCP) is expected to replace UDP as a mainstream unreliable transport protocol. But our study found that DCCP is not able to get a fair share of bandwidth under the competition of others transport protocols no matter in NS-2 simulation or real world networking environments. Furthermore, any congestion control protocol that postpones the transmission of packets may not be adequate to support time-sensitive network services. To maintain the quality of time-sensitive network services as well as to be TCP-friendly when facing network bandwidth fluctuation, we propose a Flexible Bit-rate congestion control mechanism for VoIP to adjust their data rate. Our experiments show that Flexible Bit-rate congestion control method could effectively reduce the packet loss rate and to maintain VoIP quality as compared with UDP and DCCP. Furthermore, it can have a much better bandwidth efficiency and adjust better to network fluctuation.
324

Cooper pair box circuits : two‐qubit gate, single‐shot readout, and current to frequency conversion

Nguyen, Francois 15 December 2008 (has links) (PDF)
During this thesis, we have used superconducting circuits with Josephson junctions, derived from the Cooper pair box, in order to implement quantum bits (qubits). <br />To implement two-qubit gates, we have developed a new circuit, the quantroswap, which consists in two capacitively coupled Cooper pair box, each of them being manipulated and read separately. We have demonstrated coherent exchange of energy between them, but we have also observed a problem of qubit instability.<br />In order to avoid this spurious effect, we have implemented another circuit based on a charge insensitive split Cooper pair box coupled to a non-linear resonator for readout-out purpose. We have measured large coherence time, and obtained large readout fidelity (90%) using the bifurcation phenomenon. <br />For metrological purpose, microwave reflectometry measurement on a quantronium also allowed us to relate an applied current I to the frequency f=I/2e of induced Bloch oscillations.
325

Design Considerations for Wide Bandwidth Continuous-Time Low-Pass Delta-Sigma Analog-to-Digital Converters

Padyana, Aravind 1983- 14 March 2013 (has links)
Continuous-time (CT) delta-sigma (ΔΣ) analog-to-digital converters (ADC) have emerged as the popular choice to achieve high resolution and large bandwidth due to their low cost, power efficiency, inherent anti-alias filtering and digital post processing capabilities. This work presents a detailed system-level design methodology for a low-power CT ΔΣ ADC. Design considerations and trade-offs at the system-level are presented. A novel technique to reduce the sensitivity of the proposed ADC to clock jitter-induced feedback charge variations by employing a hybrid digital-to-analog converter (DAC) based on switched-capacitor circuits is also presented. The proposed technique provides a clock jitter tolerance of up to 5ps (rms). The system is implemented using a 5th order active-RC loop filter, 9-level quantizer and DAC, achieving 74dB SNDR over 20MHz signal bandwidth, at 400MHz sampling frequency in a 1.2V, 90 nm CMOS technology. A novel technique to improve the linearity of the feedback digital-to-analog converters (DAC) in a target 11-bits resolution, 100MHz bandwidth, 2GHz sampling frequency CT ΔΣ ADC is also presented in this work. DAC linearity is improved by combining dynamic element matching and automatic background calibration to achieve up to 18dB improvement in the SNR. Transistor-level circuit implementation of the proposed technique was done in a 1.8V, 0.18μm BiCMOS process.
326

Bits quantiques supraconducteurs et résonateurs : test de l'intégralité de Legget-Garg et lecture en un coup

Palacios-Laloy, Agustin 23 September 2010 (has links) (PDF)
Cette thèse présente un ensemble d'expériences de QED en circuit (cQED), dans lesquelles des atomes artificiels basés sur des circuits supraconducteurs sont couplés au champ électromagnétique d'un résonateur micro-ondes. Ce résonateur agit comme appareil de mesure pour l'atome, permettant d'illustrer des aspects fondamentaux de la physique quantique et de développer des briques de base pour un processeur quantique. Dans une première expérience nous suivons continuement l'évolution de l'atome tout en variant l'intensité de la mesure. Nous observons la transition du régime de mesure faible à celui de mesure forte, puis le gel de la dynamique du a l'effet Zénon quantique. Dans le régime de mesure faible nous testons si l'atome artificiel est en accord avec les hypothèses du réalisme macroscopique, à partir desquelles Leggett et Garg ont déduit une inégalité de Bell en temps. La violation de cette inégalité confirme que l'atome artificiel, bien que macroscopique, est un objet quantique. En ce qui concerne l'information quantique, nous avons enrichi l'architecture cQED en démontrant un système de lecture haute fidélité en un coup pour le qubit, un élément crucial pour un processeur quantique. Notre circuit utilise la transition dynamique d'un résonateur non-linéaire. Le système couplé formé par le qubit et le résonateur non linéaire permet en plus d'étudier l'interaction entre couplage fort et effets non linéaires -amplification paramétrique, sqeezing- ouvrant un nouveau sujet : le cQED non linéaire. Finalement, nous avons mis au point un circuit qui servirait d'intermédiaire pour que deux qubits arbitraires interagissent : un résonateur micro-ondes a fréquence accordable.
327

Berechnung und Simulation der Bitfehlerwahrscheinlichkeit von Energiedetektoren bei der Datenübertragung in ultra-breitbandigen (UWB)-Kanälen

Moorfeld, Rainer 23 August 2012 (has links) (PDF)
Die extrem große Bandbreite, die UWB-Systeme zur Übertragung von Daten nutzen können, ermöglicht theoretisch eine sehr hohe Datenrate. Eine mögliche Umsetzung der UWB-Technologie ist die sogenannte Multiband-Impuls-Radio-Architektur (MIRA). Dieses UWB-System basiert auf der Übertragung von Daten mittels kurzer Impulse parallel in mehreren Frequenzbändern. Als Empfänger kommen einfache Energiedetektoren zum Einsatz. Diese Komponenten haben entscheidenden Einfluss auf die Leistungsfähigkeit des gesamten Systems. Deshalb liegt der Schwerpunkt dieser Arbeit auf der Untersuchung der Leistungsfähigkeit und im speziellen der Herleitung der Bitfehlerwahrscheinlichkeiten für Energiedetektoren in unterschiedlichen UWB-Kanälen. Aufgrund des sehr einfachen Aufbaus eines Energiedetektors wird dieser auch in vielen anderen Bereichen eingesetzt. So werden Energiedetektoren zur Detektion von freien Bereichen im Übertragungsspektrum bei Cognitive Radio und für weitere unterschiedliche Übertragungssysteme wie z.B. Sensorsysteme mit geringer Datenrate und Übertragungssysteme die zusätzlich Ortung ermöglichen, genutzt.
328

Comparison Of Decoding Algorithms For Low-density Parity-check Codes

Kolayli, Mert 01 September 2006 (has links) (PDF)
Low-density parity-check (LDPC) codes are a subclass of linear block codes. These codes have parity-check matrices in which the ratio of the non-zero elements to all elements is low. This property is exploited in defining low complexity decoding algorithms. Low-density parity-check codes have good distance properties and error correction capability near Shannon limits. In this thesis, the sum-product and the bit-flip decoding algorithms for low-density parity-check codes are implemented on Intel Pentium M 1,86 GHz processor using the software called MATLAB. Simulations for the two decoding algorithms are made over additive white gaussian noise (AWGN) channel changing the code parameters like the information rate, the blocklength of the code and the column weight of the parity-check matrix. Performance comparison of the two decoding algorithms are made according to these simulation results. As expected, the sum-product algorithm, which is based on soft-decision decoding, outperforms the bit-flip algorithm, which depends on hard-decision decoding. Our simulations show that the performance of LDPC codes improves with increasing blocklength and number of iterations for both decoding algorithms. Since the sum-product algorithm has lower error-floor characteristics, increasing the number of iterations is more effective for the sum-product decoder compared to the bit-flip decoder. By having better BER performance for lower information rates, the bit-flip algorithm performs according to the expectations / however, the performance of the sum-product decoder deteriorates for information rates below 0.5 instead of improving. By irregular construction of LDPC codes, a performance improvement is observed especially for low SNR values.
329

8.BIT.BROS

Salinas, Rogelio Manuel 03 February 2012 (has links)
The following report describes the pre-production, production, and post-production of the short film, 8.BIT.BROS, designed from its inception to fully exploit the years-developed, cumulative and varied skills of its director. The fantastical narrative focuses on the strained emotional dynamic between two adult brothers that have yet to come to terms with having witnessed their father’s death as children. Their trauma is dramatized and encapsulated in the videogame-themed psychotic hallucinations of the film’s protagonist. The director’s specialized skill-set was put to practical use in both the creation of animatronic creature effect, “Commander Gorgo,” and during the post-production phase of the film, wherein green screen compositing, animation, and motion graphics were used at length to bring the narrative life. / text
330

Evaluation des technologies optiques pour les réseaux domestiques à très haut débit

Al Hajjar, Hani 14 March 2013 (has links) (PDF)
Over the last ten years, the number of laptop computers, personal digital assistants (PDAs) and other mobile terminals has massively increased. This evolution has led to a huge demand of wireless communications, in the purpose of avoiding wires and connectors to supply mobility in various places such as offices, homes, rail stations or airports. To date, this mobility is mainly offered by radiofrequency (RF) communications using Wi-Fi channels, with a maximum bitrate of 300 Mbps. However, new indoor applications such as non-compressed high-definition (HD) video transfer or remote hard-disk backup require much higher bandwidths (> 2Gbps). Such a bitrate can be transmitted using an optical wireless communications OWC system. In this thesis, a new architecture of OWC has been proposed and studied according to the GROWTH criteria (GReen Optical Wireless InTo Home network). This architecture is based on distributed free-space optical pico-cells in each room of the home interconnected by optical fibers and offering bitrates that exceed 1 Gbps. The work is divided into four parts: dimensioning of the systems and the selection of associated opto-electronics technologies, simulation of the hybrid optical channel (fiber optics + free-space) using the VPI Transmission Maker and Matlab softwares, choice of the wavelength and finally the experimental measurements to validate the performance of the system.

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