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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
191

A 20-GHz bipolar varactor-tuned VCO using switched capacitors to add tuning range /

Stewart, Malcolm D., January 1900 (has links)
Thesis (M. App. Sc.)--Carleton University, 2003. / Includes bibliographical references (p. 140-143). Also available in electronic format on the Internet.
192

A comparative study of capacitor voltage balancing techniques for flying capacitor multi-level power electronic converters

Yadhati, Vennela, January 2010 (has links) (PDF)
Thesis (M.S.)--Missouri University of Science and Technology, 2010. / Vita. The entire thesis text is included in file. Title from title screen of thesis/dissertation PDF file (viewed July 26, 2010) Includes bibliographical references (p. 96-102).
193

Fuse holder damage investigation

Wacharasindhu, Tongtawee. January 2006 (has links)
Thesis (M.S.) University of Missouri-Columbia, 2006. / The entire dissertation/thesis text is included in the research.pdf file; the official abstract appears in the short.pdf file (which also appears in the research.pdf); a non-technical general description, or public abstract, appears in the public.pdf file. Title from title screen of research.pdf file (viewed on August 29, 2007) Includes bibliographical references.
194

System for wireless, automated and continuous monitoring of resonant frequency of an inductor - capacitor circuit

Sajeeda. January 2004 (has links) (PDF)
Thesis (M.S.)--Montana State University--Bozeman, 2004. / Typescript. Chairperson, Graduate Committee: Todd J. Kaiser. Includes bibliographical references (leaves 169-171).
195

Etude et optimisation de capacités MIM 3D à haute densité d'énergie fortement intégrées sur silicium / Study and optimization of 3D MIM capacitors highly integrated on silicon substrate with high energy storage

Madassamy, Sandrine 24 June 2016 (has links)
Le stockage de l’énergie reste une problématique majeure pour le développement d’objets embarqués (Internet of Things) à faible facteur de forme. En effet, pour le stockage et la restitution d’énergie électrique, les dispositifs les plus couramment utilisés sont les batteries, les supercondensateurs et les condensateurs électrochimiques ou céramiques. Toutefois, le contexte de la miniaturisation nécessite de fabriquer des systèmes de stockage à forte densité d’intégration, compatibles avec des techniques d’intégration de type SIP (System in Package) et ultimement SoC (System on Chip). Or, les technologies connues dans l’art antérieur produisent des composants à forte épaisseur, via des filières technologiques exotiques, incompatibles avec une co-intégration directe sur des composants silicium. Pour répondre à ces exigences, nous proposons une nouvelle approche pour l’intégration de condensateurs de très faible épaisseur sur silicium. Ces condensateurs présentent une meilleure fiabilité et de meilleures performances en linéarité que les condensateurs céramiques et peuvent stocker une densité énergétique proche de celle d’un condensateur électrochimique.Cette thèse est axée sur la conception, le développement, la réalisation, la caractérisation électrique et fiabilité de capacités MIM (Métal/Isolant/Métal) à forte densité d’intégration et présentant une forte densité énergétique. Ces condensateurs sont modelés dans une nanostructure poreuse ordonnée et développée par un procédé électrochimique. Cette nanostructure 3D permet de décupler la surface spécifique développée, par rapport à une structure planaire simple ou une microstructure 3D telle qu’actuellement exploitée par la société IPDIA. Ce nanocomposant MIM comportant un isolant à base d’alumine, déposé par ALD (Atomic Layer Deposition) d’une épaisseur variant entre 15nm et 21nm. Pour cette gamme d’épaisseur, une densité de capacité de l’ordre de 200nF/mm² à 300nF/mm² est obtenue sur une simple structure MIM, avec un champ de claquage de l’ordre de 7MV/cm et une densité d’énergie volumique maximale de 1.3mWh/cm3. Cette dernière valeur est supérieure d’une décade aux technologies actuellement exploitées par la société IPDIA. Une attention particulière a été apportée à la réduction des parasites de la structure, et lui permettant ainsi de répondre à des transitions rapide en courant. Pour cela, la résistance série de ces structures a été optimisée par l’amélioration du contact entre les nanostructures MIM et les électrodes externes. La stabilité de la capacité MIM en température et en tension est comparable aux performances des technologies de référence IPDIA (respectivement avec un coefficient thermique de 193ppm/°C et un coefficient de tension de 489 ppm/V2), lesquelles sont basées sur une structure composite de type ONO (multicouche oxyde-nitrure). Elle est par ailleurs meilleure que celle observée pour les condensateurs céramiques multicouches disponibles sur le marché. Notre capacité présente également, une excellente robustesse en température et a été utilisée jusqu’à 375°C. Les performances démontrées sur les prototypes réalisés au cours de ce travail, permettent d’envisager un vaste domaine d’applications, incluant des applications de stockage, de filtrage de rails d’alimentation, de mise en forme de signaux analogiques et de puissance. Le niveau de maturité atteint sur les premiers démonstrateurs permet d’envisager un transfert industriel dans les mois à venir. / The energy storage components remain one of the limiting features for scaling of the Internet of Things objects. Indeed, the storage devices nowadays available as batteries, supercapacitors and electrochemical or ceramic capacitors are still quite bulky and remain incompatible with reduced aspect ratio, while roadmap toward miniaturization requires concept with high integration density compatible with integration techniques like SiP ((System in Package) and on longer term SoC (System on Chip). However, technologies known from the prior art, produce components with too large thickness, inflexible shape (mostly circular or rectangular), through exotic technologies that are incompatible with direct co-integration on silicon components. To overcome those limitations, we have proposed a novel approach for the integration of very low thickness capacitors. Those capacitors have better reliability and stability performances than ceramic capacitors and are able to store energy density approaching electrochemical capacitor.This thesis is focused on the development of the capacitive structure, the processing steps, its electrical and reliability characterization and finally the electrical optimization of MIM (Metal/Isolator/Metal) capacitors. Those capacitive structures are based on a porous and self-arranged nano-template obtained by an electrochemical process. Those nanostructures allow to increase the specific surface density with respect to conventional planar or microstructures that are currently exploited by IPDIA. The MIM structure consists of alumina dielectric, deposited by ALD (Atomic Layer Deposition) with a thickness between 15nm and 21nm. For this thickness, capacitance density is obtained in the range of 200nF/mm² and 300nF/mm² for a simple MIM nanostructure, with a breakdown field about 7 MV/cm and a maximum volumetric energy density of about 1.3mWh/cm3. This last value corresponds to a decade higher with respect to current IPDIA technologies. A specific optimization has been conducted to reduce structure parasitic, and thus enable faster current transition on switching events. For that, a technic to reduce the serial resistance between the MIM nanostructure and the external electrodes has been investigated. The temperature and voltage linearity of this MIM capacitor is on par with actual IPDIA reference technologies (respectively thermal coefficient of 193ppm/°C and quadratic voltage coefficient of 489 ppm/V²), which are based on an ONO composite dielectric (multi-layer nitride oxide). This performance is outperforming the Multi-Layer Ceramic Capacitors that are currently used for equivalent application. Furthermore, demonstration of operation up to 375°C has been demonstrated for this structure. With these capacitors it is envisioned to address a large span of applications, ranging from energy storage, to filtering of power rails, or analogic and power signal conditioning. The maturity obtained on demonstrators allows to envisage an industrial transfer in the coming months.
196

Desenvolvimento de traçador de curvas I-V portátil para arranjos fotovoltaicos

Oliveira, Fernando Schuck de January 2015 (has links)
O presente trabalho apresenta o desenvolvimento de um traçador de curvas I-V para aplicação em arranjos fotovoltaicos a serem medidos em campo. Este sistema utiliza a carga capacitiva como método de polarização do gerador fotovoltaico sendo o chaveamento realizado por transistores bipolares de porta isolada (IGBT). Para controle do chaveamento dos IGBTs e aquisição dos pontos I-V, a placa Arduino foi aplicada demostrando-se adequada para a proposta. Para tanto foi escrito, em uma variação da linguagem de programação C++, o programa de controle desta placa. Foram construídos circuitos auxiliares de amplificação de sinal para realizar as medidas de corrente e de irradiância, sendo nestes casos, usados como sensores um resistor shunt e uma célula de referência calibrada, respectivamente. Para medida da temperatura foi aplicado o sensor de temperatura LM35 que apresentou resultados satisfatórios. Os dados adquiridos pela placa Arduino são salvos em um cartão de memória para posterior análise. A análise de incertezas foi realizada usando métodos estatísticos, onde foram determinados os erros sistemáticos e aleatórios para cada canal de medição. O protótipo construído foi aplicado no levantamento da curva I-V de um gerador fotovoltaico composto de uma série de 3 módulos instalada no terraço do prédio que abriga o simulador solar do Laboratório de Energia Solar da Universidade Federal do Rio Grande do Sul (LABSOL) e o seu resultado foi comparado com o sistema traçador de curvas do laboratório. O resultado, de maneira geral, foi satisfatório quando comparado com a medida a 2 fios pelo sistema do LABSOL, mas apresentou um erro maior quando comparado à medida a 4 fios. Este protótipo também foi submetido a um teste para avaliar sua capacidade de apresentar a curva I-V de forma adequada quando são provocados defeitos na série de módulos. O resultado apresentado pelo protótipo se mostrou bastante semelhante ao do apresentado pelo sistema do LABSOL. De maneira geral, pode-se afirmar que o protótipo, baseado em seus resultados, mostrou-se adequado para aplicação em medidas em campo de curvas I-V de arranjos fotovoltaicos. / This work presents the development of an IV tracer for in field measurement of PV arrays. This system uses a capacitive load as a method for polarizing the photovoltaic generator, with the switching being performed by insulated gate bipolar transistors (IGBT). To control switching of the IGBTs and acquisition of the IV curve, an Arduino board was applied, and was proved to be adequate for this purpose. The Arduino board control program was written in a variation of C++ language. Auxiliary circuits for amplifying the signal were built to measure electric current and irradiance, being in such cases used as sensors a shunt resistor and a calibrated reference solar cell, respectively. For obtaining the temperature, the LM35 temperature sensor was employed, presenting satisfactory results. The data acquired by the Arduino board are saved on a memory stick for later analysis. The uncertainty analysis was performed by using statistical methods, in which the systematic and random errors for each measurement channel were determined. The assembled prototype was applied for measuring the IV curve of a photovoltaic generator composed of a string of 3 modules located on the roof of one of the buildings from Solar Energy Laboratory of the Federal University of Rio Grande do Sul (LABSOL) and its result was compared with the IV tracer used on the laboratory. The result was, generally, satisfactory when compared with the two-wire measurement by the laboratory’s system, but showed a larger error when compared with the four-wire measurement. This prototype was also submitted to a test to evaluate its capacity of adequately presenting the IV curve when defects are induced on the string. The result presented by the prototype was quite similar to that obtained from LABSOL’s system. In general, it is possible to affirm that the prototype, based on its results, proved to be adequate for in field measurement of photovoltaic arrays.
197

Influência dos parâmetros do processo de serramento no corte de capacitores de filme metalizado ultrafino

Mello, Tiago Chaves January 2015 (has links)
Visando determinar os valores ótimos para o processo de serramento de anéis bobinados de filme metalizado ultrafino de alumínio com dielétrico de poliéster a partir das condições atuais do processo de fabricação de capacitores pela empresa Epcos do Brasil, realizou-se a avaliação de diferentes tipos de serras circulares variando-se a velocidade de rotação (n) e o tempo de corte (tc). Desenvolvido projeto de experimento desses três fatores a fim de obter o resultado das interações entre eles quanto à resistência de isolamento (Riso) das peças cortadas. A serra de 160 dentes de metal-duro com revestimento de filme de carbono tipo diamante (DLC) apresentou os melhores resultados quanto à “Riso” acima de 0,378 G e quanto ao número de peças com valor abaixo deste. Constatou-se que “n” não influencia significativamente para a distribuição de “Riso”; porém, gera menos peças abaixo do especificado. Já “tc” não influencia significativamente o processo. Quanto ao tipo de dente, o perfil reto obteve melhor resultado para lâminas de serra com 80 dentes e perfil curvo para lâminas com 160 dentes. Já a espessura da lâmina não influenciou de forma expressiva o processo. A lâmina de aço-rápido apresentou adesão de alumínio na lateral do corpo da serra e, consequentemente, adesão de material na superfície de corte. As lâminas de metal-duro sem revestimento apresentaram falhas no filme metalizado por causa do atrito gerado entre a superfície de corte e a lateral da lâmina; esse inconveniente é eliminado quando ela é revestida com filme DLC apresentando melhorias quanto à “Riso” das peças para “n” menores. Também houve adesão de alumínio na parte inferior do dente devido a uma delaminação da camada de filme DLC. / In order to determine the optimal values for the sawing process of wound rings of metalized ultra-thin film with dielectric of polyester from current conditions of capacitor manufacturing process by Epcos company in Brazil, it was performed the evaluation of different types of circular saws varying the rotational speed (n) and the cutting time (tc). Developed experiment design methodology for these three factors in order to get the result of the interactions between them regarding to the insulation resistance (Riso) of cut parts. Through the analysis of the main effects, the cemented carbide saw with 160 teeth and diamond-like carbon (DLC) film coating showed the best results in terms of "Riso" above 0,378 G and regarding to the number of parts with value below the specified. It was found that "n" does not influence significantly the distribution of "Riso"; however, generates fewer parts below the specified. Now "tc" does not significantly influence the process. Regarding the tooth type, straight profile obtained better results for saw blades with 80 teeth and curved profile for blades with 160 teeth. However the thickness of the blade did not influence significantly the process. The high speed steel blade presented adhesion of aluminum on the side of the saw body and, consequently, adhesion of material on the cutting surface. The cemented carbide blades uncoated presented failures on metalized film because of the friction generated between the cutting surface and the side of the blade; this drawback is eliminated when it is coated with DLC film presenting improvements to the parts "Riso" for lower "n". There was also aluminum adhesion on the bottom of the tooth due to a delamination of the DLC film layer.
198

ELECTROCHEMICAL CHARACTERIZATION OF EXFOLIATED GRAPHENE

Wasala, KWM Milinda Prabath 01 May 2014 (has links)
In this research we have investigated electrochemical and impedance characteristics of liquid phase exfoliated graphene electrodes. The exfoliated graphene electrodes were characterized in Electrochemical Double Layer Capacitors (EDLCs) geometry. Liquid phase exfoliation was performed on bulk graphite powder in order to produces few layer graphene flakes in large quantities. The exfoliation processes produced few layer graphene based materials with increased specific surface area and were found to have suitable electrochemical charge storage capacities. Electrochemical evaluation and performance of exfoliated graphene electrodes were tested with Cyclic Voltammetry, constant current charging discharging and Electrochemical Impedance Spectroscopy (EIS) at ambient conditions. We have used several electrolytes in order to evaluate the effect of electrolyte in charge storage capacities. Specific capacitance value of ~ 47F/g and ~ 262F/g was measured for aqueous and ionic electrolytes respectively. These values are at least an order of magnitude higher than those obtained by using EDLC's electrodes fabricated with the bulk graphite powder. In addition these EDLC electrodes give consistently good performance over a wide range of scan rates and voltage windows. These encouraging results illustrate the exciting potential for high performance electrical energy storage devices based on liquid phase exfoliated graphene electrodes.
199

High efficiency MPPT switched capacitor DC-DC converter for photovoltaic energy harvesting aiming for IoT applications / Conversor DC - DC de Alta Eficiência baseado em Capacitores Chaveados usando MPPT com o Objetivo de Coletar Energia Fotovoltaica com Foco em Aplicações IoT

Zamparette, Roger Luis Brito January 2017 (has links)
Este trabalho apresenta um conversor CC - CC baseado em Capacitores Chaveados de 6 fases e tempos intercalados com o objetivo de coletar energia fotovoltaica projetado em tecnologia CMOS de 130 nm para ser usado em aplicações em Internet das Coisas e Nós Sensores. Ele rastreia o máximo ponto de entrega de energia de um painel fotovoltaico policristalino de 3 cm x 3 cm através de modulação da frequência de chaveamento com o objetivo de carregar baterias. A razão da tensão de circuito aberto foi a estratégia de rastreio escolhida. O conversor foi projetado em uma tecnologia CMOS de 130 nm e alcança uma eficiência de 90 % para potencias de entrada maiores do que 30 mW e pode operar com tensões que vão de 1.25 até 1.8 V, resultando em saídas que vão de 2.5 até 3.6, respectivamente. Os circuitos periféricos também incluem uma proteção contra sobre tensão na saída de 3.6 V e circuitos para controle, que consomem um total máximo de potência estática de 850 A em 3.3 V de alimentação. O layout completo ocupa uma área de 300 x 700 m2 de silício. Os únicos componentes não integrados são 6x100 nF capacitores.
200

Microwave performance of thin-film technologies on LTCC

Fund, Andrew January 1900 (has links)
Master of Science / Electrical and Computer Engineering / William B. Kuhn / At RF frequencies and beyond, metallic circuit interconnects no longer behave as lumped-element wires; instead they exhibit distributed-element behavior and are classified as transmission lines. Power losses on transmission lines are of great concern to RF and microwave engineers and great care is taken to minimize power losses while still maintaining application-based robustness. The combination of low-temperature co-fire ceramics (LTCCs) and thin-film transmission line fabrication allows application-specific robustness and excellent microwave and millimeter wave performance to be achieved. LTCC technology provides a low-loss microwave substrate and allows for thin-film metal and insulator depositions to form precision transmission-line geometries and surface-applique capacitors. In the field of thin-film metals however, concern over excess power losses at high frequencies has arisen due to the necessity of a high-resistance metallic adhesion layer which is required for the mechanical adhesion of the transmission lines to the LTCC substrate. This is especially worrisome in a microstrip configuration where the current density is concentrated at the substrate-metal interface; exactly where the high-loss metal is situated. This thesis shows that if the high-resistance adhesion layer is limited to a thickness which is a fraction of its skin depth, with more conductive metals layered above, then those excessive resistive losses can be avoided. Issues with decreasing the total thickness of the thin-film layered metals are also investigated to achieve better interconnect line-and-space resolution, which is required for electronics operating at millimeter-wave bandwidths. Several test cases show that thinning of the metal layers has minimal impact on electrical performance. However, poor signal integrity is observed when the finished thickness of the metal stack up is reduced below 1μm. Further testing reveals that surface roughness leads to manufacturing issues when trying to produce thin-films with thicknesses in the sub-micron range. Finally, a novel bypass and coupling capacitor topology is proposed and investigated. The capacitors are simple thin-film metal-insulator-metal constructions designed for use in a flip-chip mounting environment. Testing shows the capacitors exhibit a very low impedance through 20 GHz making them an ideal board-level bypass solution. This technology has the potential to replace all but the large bulk charge storage capacitors in electronic designs, increasing performance and mechanical robustness, while simultaneously decreasing bill of material cost and PCB assembly times.

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