The objective of this thesis is to introduce an alternative temperature sensor in CMOS technology with small area, low power consumption, and high resolution that can be easily interfaced. A novel temperature sensor utilizing the interface–trap charge pumping phenomenon and the temperature sensitivity of generation current is proposed. This thesis presents the design and characterization of the proposed temperature sensor fabricated in 0.18µm CMOS technology. The prototype sensor is characterized for the temperature range of 27oC–120oC. It has frequency output and exhibits linear transfer characteristics, high sensitivity, and high resolution. This temperature sensor is proposed for microprocessor thermal management applications.

During this research, the concepts of Systems Engineering were applied to embedded system design. The objective was to apply the Systems Engineering methodology to the design of a particular embedded system. A Video Surveillancesystem was chosen as the particular embedded system. Systems Engineering concepts provide the foundation for an optimized design process and for the coordination between system modules. The functionality of the Video Surveillance system was achieved through the partitioning of the overall system functionality into three separate modules. The three modules were Image Capture, Image Processing and Image Transmission. The methodology employed resulted in a system that was flexible and portable. The three modules were designed using their own set of specifications and with completely defined linking interfaces. Following a concrete set of specifications resulted in a system, which can be modified at any later stage without the necessity of changing the whole architecture. The Video Surveillance system fulfilled the overall system requirements as well as those imposed by the subsystems. The partitioning of functionality resulted in ease of implementation and better upgradeability. Design based on Systems Engineering concepts provides for ease of integration. In addition, for modules that follow the same protocol, the existence of well defined interfaces enables connectivity to a variety of external units.

Since early 1960s, ultrasound has become one of the most widely used medical imaging device as a diagnostic tool or an image guider for surgical intervention because of its high portability, non-ionization, non-invasiveness and low cost. Although continuous improvements in commercial equipments have been underway for many years, almost all systems are developed with pulse-echo geometry. In this research, a newly invented ultrasound sensor array was incorporated into the developments of a projection imaging system. Three C-scan prototypes, which included prototypes #1, #2 and an ultrasound mammography system, were constructed. Systematic and Evaluative studies included ultrasound CT, 3-D ultrasound, and multi-modality investigations were also performed. Furthermore, a new analytical method to model ultrasound forward scattering distribution (FSD) was developed by employing a specific annular apparatus. After applying this method, the scattering-corrected C-scan images revealed more detail structures as compared to unprocessed images. This new analytical modelling approach is believed to be effective for most imaging systems operating in projection geometry. In summary, while awaiting additional clinical validation, the C-scan ultrasound prototypes with the state-of-the-art PE-CMOS sensor arrays can provide veritable value and holds real and imminent promise in medical diagnostic imaging. Potential future uses of C-scan ultrasound include but not limit to computerized tomography, biopsy guidance, therapeutic device placing, foreign object detection, pediatric imaging, breast imaging, prostate imaging, human extremities imaging and live animal imaging. With continuous research and development, we believe that C-scan ultrasound has the potential to make a significant impact in the field of medical ultrasound imaging. / Ph. D.

Η παρούσα ειδική ερευνητική εργασία υλοποιήθηκε στα πλαίσια του Μεταπτυχιακού Προγράμματος “Ηλεκτρονική και Η/Υ” του τμήματος Φυσικής του Πανεπιστημίου Πατρών. Σκοπός της εργασίας αυτής είναι η ανάπτυξη ενός συστήματος βασισμένου σε τεχνολογία FPGA [1-2]. Το σύστημα αυτό έχει τη δυνατότητα να λαμβάνει εικόνες, και αφού τις επεξεργαστεί κατάλληλα, τις αποθηκεύει στη μνήμη του και στη συνέχεια τις απεικονίζει σε μία LCD οθόνη αφής [3-4,8]. Τέλος, η διαχείριση των λειτουργιών που ενσωματώνει το σύστημα γίνεται μέσω της οθόνης αυτής [5]. Στο πρώτο κεφάλαιο πραγματοποιείται σύντομη περιγραφή του συστήματος, της βασικής αναπτυξιακής πλατφόρμας, DE2 της Altera [6], καθώς και του περιβάλλοντος ανάπτυξης Quartus II [12]. Tο δεύτερο κεφάλαιο χωρίζεται σε δύο μέρη. Στο πρώτο μέρος γίνεται παρουσίαση της TRDB-D5M CMOS Camera της Altera [9], των γενικών χαρακτηριστικών της και των απαραίτητων καταχωρητών για τη σωστή ρύθμισή της. Στο δεύτερο μέρος παρουσιάζεται η οθόνη TRDB_LTM LCD Touch Panel της Altera [7], η οποία επιλέχθηκε τόσο για την απεικόνιση των εικόνων όσο και για τον έλεγχο του συστήματος μέσω αυτής. Στο τρίτο κεφάλαιο πραγματοποιείται η πλήρης περιγραφή του συστήματος, που υλοποιήθηκε μέσω της γλώσσας ανάπτυξης υλικού Verilog HDL και ενσωματώθηκε στο FPGA [10-11], με σκοπό τη διαχείριση των δεδομένων που λαμβάνονται από την Camera. Στο τέταρτο κεφάλαιο παρουσιάζονται τα αποτελέσματα της εργασίας αυτής, τα συμπεράσματα που προέκυψαν, καθώς επίσης και προτάσεις για μελλοντική ανάπτυξη του συστήματος. Τέλος, στο παράρτημα Α παρουσιάζεται ο συνολικός κώδικας που υλοποιήθηκε και ενσωματώθηκε στο FPGA. / The present inquiring master thesis was realized as part of the postgraduate program “Electronics and Computer Science” of the department of Physics of University of Patras. The aim of this master thesis is the development of an FPGA technology based system [1-2] that has the ability to receive images, save them on its memory after appropriate processing and finally project them on an LCD touch panel [3-4,8]. The management of the system operations is realized through this touch panel [5]. Within the first chapter, we briefly describe the system, the basic development board of Altera [6], used to develop it, and finally the environment Quartus II [12]. We separated the second chapter in two parts. The first part presents the TRDB-D5M CMOS Camera of Altera [9], with its basic characteristics and the necessary registers for its appropriate regulation. The second part presents the TRDB-LTM LCD touch panel of Altera [7], which was chosen to portray images and allow the system control. The third chapter describes the system itself, realized in Verilog HDL, and incorporated in the FPGA [10-11], in order to manage the data received by the camera. The fourth chapter presents the results of this master thesis along with important conclusions and suggestions to further research. Finally, in appendix A we present the total code that was realized and incorporated in the FPGA.

L'illumination par la face arrière amincie des imageurs CMOS est une des voies étudiées pour accroître le rapport signal à bruit et ainsi la sensibilité de ce capteur. Or cette configuration est adaptée à la détection des électrons dans la gamme d'énergie [[1 ; 12 keV]. L'électron incident crée, par multiplication, plusieurs centaines d'électrons secondaires, proche de la surface. Une couche de passivation par surdopage P++ de la face arrière est nécessaire afin de réduire le nombre de recombinaisons de surface des électrons. Par effet de champ électrique, la couche de passivation augmente le nombre de charges collectées, et ainsi le gain de collection du capteur. L'objectif de cette thèse est de développer des moyens de caractérisation pour déterminer in situ les performances sur le gain de collection de six procédés de passivation. Préalablement, le profil de dépôt d'énergie de l'électron incident est étudié au moyen d'une simulation Monte-Carlo puis d'un modèle analytique. Un modèle associé du gain de collection indique qu'à forte énergie, l'effet miroir de la passivation est déterminant tandis qu'à faible énergie, l'épaisseur de la passivation est un facteur clef. Une première expérience d'irradiation de diodes étendues P++=N permet de dégager l'influence du procédé de passivation sur les recombinaisons de surface. Grâce à une seconde caractérisation de type < événement unique >, directement sur capteur CMOS aminci, les passivations sont discriminées quant à leur effet miroir et l'étalement de la charge qu'elles induisent. Le recuit laser d'activation des dopants peut s'avérer une source d'inhomogénéités du gain sur la surface de la matrice / Backside illuminated thinned CMOS imaging system is a technology developed to increase the signal to noise ratio and the sensibility of such sensors. This configuration is adapted to the electrons detection from the energy range of [1 - 12 keV]. The impinging electron creates by multiplication several hundreds of secondary electrons close to the surface. A P++ highly-doped passivation layer of the rear face is required to reduce the secondary electron surface recombination rate. Thanks to the potential barrier induced by the P++ layer, the passivation layer increases the collected charges number and so the sensor collection gain. The goal of this study is to develop some experimental methods in order to determine the effect of six different passivation processes on the collection gain. Beforehand, the energy profile deposited by an incident electron is studied with the combination of Monte-Carlo simulations and some analytical calculations. The final collection gain model shows that the mirror effect from the passivation layer is a key factor at high energies whereas the passivation layer has to be as thin as possible at low energies. A first experimental setup which consists in irradiating P++=N large diodes allows to study the passivation process impacts on the surface recombinations. Thanks to a second setup based on a single event upset directly on thinned CMOS sensor, passivation techniques are discriminated in term of mirror effect and the implied spreading charges. The doping atoms activation laser annealing is turn out to be a multiplication gain inhomogeneity source impacting directly the matrix uniformity

This diploma thesis deals with the development, disign and manufacturing inspection device that is able to detect the presence of components in the assembly of the plastic molding. Evaluation of information are indicated by the operator device and sent for further processing. Rechecked product will be marked with a uniquemark.

Prévue pour 2024, une série d’améliorations doit être apportée au grand collisionneur d’hadrons du CERN (LHC) de manière à élargir son potentiel de découverte de nouvelle physique. Cette thèse se situe dans la perspective des études d’amélioration du détecteur ATLAS dans ce nouvel environnement, et concerne une nouvelle technologie monolithique HV/HR CMOS qui pourrait être utilisée pour les détecteurs de traces centraux pixélisés. Cette technologie a le potentiel de permettre la réduction de l’épaisseur des détecteurs, d'augmenter la granularité ainsi que de réduire les couts de production.Au sein de la collaboration HV/HR CMOS d’ATLAS, divers prototypes ont été développés en utilisant les technologies de différents partenaires industriels : GlobalFoundries (GF) BCDlite 130 nm et LFoundry (LF) 150 nm entre autres. Pour comprendre le comportement électrique et la capacité de détection de telles technologies, des simulations TCAD -Technology Computer Aided Design- en 2D et 3D ont été réalisées pour extraire le profil de la zone déplétée, la tension de claquage, la capacitance ainsi que la collection de charges ionisées des prototypes. Le développement de systèmes de test complexes et la caractérisation des prototypes HV/HR CMOS ont aussi été une partie du travail fourni pour cette thèse. Les programmes d’acquisition, en particulier pour ce qui concerne les tests sous protons ou auprès d’irradiateurs à rayons X, ainsi que les programmes de réglages de seuil ont été implémenté dans divers systèmes de test. Plusieurs versions des prototypes développés dans 3 technologies HV/HR CMOS différentes (AMS 0.18 μm HV, GF BCDlite 130nm et LF 150nm) ont été caractérisées. / A major upgrade to the Large Hadron Collider (LHC), scheduled for 2024 will be brought to the machine so as to extend its discovery potential. This PhD is part of the ATLAS program and aims at studying a new monolithic technology in the framework of the design of an upgraded ATLAS inner tracker. This new type of sensor is based on a HV/HR CMOS technology, which would potentially offer lower material budget, reduced pixel pitch and lower cost with respect to the traditional hybrid pixel detector concept.Various prototypes have been developed using different HV/HR CMOS technologies from several industrial partners, within the ATLAS HV/HR collaboration, for instance Global Foundry (GF) BCDlite 130 nm and LFoundry (LF) 150 nm. In order to understand the electric behavior and the detection capabilities of these technologies, 3D and 2D Technology Computer Aided Design (TCAD) simulations have been performed to extract the depletion zone profile, the breakdown voltage, the leakage current, the capacitance as well as the charge collection of the prototypes. Test setup developments and characterizations of the HV/HR CMOS prototypes were also part of this thesis. The data acquisition programs, in particular dedicated to the proton test beams, X-ray sources and threshold tuning, have been implemented into various test setups. Several HV/HR CMOS prototypes developed in three HV/HR technologies, AMS 0.18 µm HV, GF BCDlite 130 nm and LF 150 nm, have been characterized.

Le projet PLUME développe des échelles ultra-légères inspirées par le cahier des charges du détecteur de vertex pour le futur e+e- International Linear Collider (ILC). Nos travaux montrent que, pour une énergie de 350 GeV et une luminosité de 250 fb-1, l’ILC donnera accès à des états finals comme Hνν. Les modules PLUME exploitent le concept d’échelles double-face recouvertes de capteurs CMOS afin d’atteindre un budget de matière de 0,35 % en longueurs de radiation. Les tests effectués ont montré que les performances électriques des 12 capteurs intégrés sur ces échelles ne sont pas dégradées. La surface des échelles présente des déformations, mais nous avons mis au point un algorithme spécifique qui permet de corriger leurs effets lors du traitement des données. Finalement, une mesure de la longueur de radiation d’un prototype moins avancé a été réalisée avec un faisceau test au DESY. La valeur obtenue de 0,47±0,02 % en longueurs de radiation correspond au budget attendu. / The PLUME project develops ultra-light pixelated layers with specifications driven by the design of a vertex detector at the future e+e- International Linear Collider (ILC). The ILC will give access to final states like Hνν, as this work demonstrates for centre-of-mass energy 350GeV and a luminosity of 250 fb-1. PLUME devices exploit the concept of double-sided ladder spaved with thinned CMOS pixel sensors in order to reach a material budget of 0.35 % of radiation length. The present study validated that simultaneous operation of the 12 CMOS sensors integrated on such light ladders do not impact their electrical behaviour. Surface deformations were observed but a specific algorithm during the off- line analysis was proposed and successfully tested to preserve the native sensor spatial resolution. Finally, a measurement of the material budget of a less advanced ladder prototype has been performedat DESY test beam and yield 0.47±0.02 % of radiation length, matching the expected value.

The thesis composes conventional and modern methods for digital scene capturing. The target of the thesis is a comparison of CMOS with Bayer mask and Foveon X3 Merrill sensors followed by a design of algorithms for image fusion which can combine advantages of the both sensor types. The thesis starts with an introduction and a description of methods and processes leading to scene capturing. The next part deals with capturing a gallery of test images and with a comparison of both sensors based on the gallery images. Further there are algorithms designed for image fusion which can combine advantages of the selected sensors. The last part of the thesis is devoted to an evaluation of results and of the used algorithms.