System integration and miniaturization demands are driving integrated thin film capacitor technologies with ultra-high capacitance densities for power supply integrity and efficient power management. The emerging need for voltage conversion and noise-free power supply in bioelectronics and portable consumer products require ultra high-density capacitance of above 100 μF/cm2 with BDV 16-32 V ,independent capacitor array terminals and non-polar dielectrics. The aim of this research,therefore, is to explore a new silicon- compatible thin film nanoelectrode capacitor technology that can meet all these demands. The nanoelectrode capacitor paradigm has two unique advances. The first advance is to achieve ultra-high surface area thin film electrodes by sintering metallic particles directly on a silicon substrate at CMOS- compatible temperatures. The second advance of this study is to conformally- deposit medium permittivity dielectrics over such particulate nanoelectrodes using Atomic Layer Deposition (ALD) process. Thin film copper particle nanoelectrode with open-porous structure was achieved by choosing a suitable phosphate-ester dispersant, solvent and a sacrificial polymer for partial sintering of copper particles to provide a continuous high surface area electrode. Capacitors with conformal ALD alumina as the dielectric and Polyethylene dioxythiophene (PEDT) as the top electrode showed 30X enhancement in capacitance density for a 20-30 micron copper particulate bottom electrode and 150X enhancement of capacitance density for a 75 micron electrode. These samples were tested for their mechanical and electrical properties by using characterization techniques such as SEM, EDS, I-V and C-V plots. A capacitance density of 30 μF/cm2 was demonstrated using this approach. The technology is extensible to much higher capacitance densities with better porosity control, reduction in particle size and higher permittivity dielectrics.

The continuous trend towards mega-functional, high-performance and ultra-miniaturized system has been driving the need for advances in novel materials with superior properties leading to thin components, high-density interconnect substrates and interconnections. Power supply and management is becoming a critical bottleneck for the advances in such mega-functional systems because power components do not scale down with the rest of the system resulting in bulky and stand-alone power modules. Amongst the power components, thin film capacitors are considered the most challenging to integrate because of several manufacturability concerns. The challenges are related to process compatibility of high permittivity dielectrics with substrates and high surface area electrodes, yield, leakage and losses. This thesis focuses on novel thin film capacitor technologies that address some of these critical challenges. / Thesis advisor has approved the addition of errata to this item. The abstract text in the metadata record has been modified to match the document text.

published_or_final_version / Physics / Doctoral / Doctor of Philosophy

The aluminum electrolytic capacitor is used extensively in the electric utility industry. A factor limiting the storage of spare capacitors is the integrity of the aluminum oxide dielectric, which over time breaks down contributing to a shelf life currently estimated at one nuclear power electric generating station to be approximately five years. This project examined the electrical characteristics of naturally aged capacitors of several different styles to determine if design parameters were still within limits. Additionally, the effectiveness of a technique known as “Reforming” was examined to determine its impact on those characteristics.

Electric weapons, such as the railgun, require a pulse power supply capable of providing reliable highcurrent, high-energy pulses of many megawatts. Pulsed alternators potentially have the same maintenance issues as other motor-generator sets, so a solid-state system would be desirable, but high voltage capacitor systems are not robust enough for the field. We propose here a Low Voltage Electrolytic Capacitor Pulse Forming Inductive Network (LVEC PFIN) which stores power in a relatively low voltage capacitor bank and provides weapon power pulses by first draining the capacitors into a power inductor and then interrupting the flow of current via a switch counterpulsing technique in order to achieve railgun-appropriate voltages. For this thesis, a 13 kJ LVEC PFIN was constructed, using solid-state semiconductor switches to redirect 25 kA of current into a 1 m. load, and the redirection of larger currents is clearly feasible. This technique may be a viable alternative once the energy densities and equivalent series resistances of low voltage capacitors and ultracapacitors reach the necessary levels.

M.Ing. (Electrical and Electronic) / Please refer to full text to view abstract

The objective of this research is to implement monolithic analog phase shifters based on barium strontium titanate (BST) coated sapphire substrates for IEEE 802.11b wireless local area network (WLAN) applications. It has been known that several BST thin film properties such as high relative permittivity, electric field dependence, fast polarization response, relatively low loss, and high breakdown field, allow for miniaturization and high performance of analog phase shifters. Before attempting to implement BST phase shifters, coplanar waveguides (CPWs) and interdigital capacitors (IDCs) based on various BST compositions and thicknesses have been developed and characterized to capitalize on the electrical properties of BST thin films. Based on the characteristics of BST thin films, two design topologies have been studied to implement phase shifters. The first topology is a reflection-type structure. The reflection-type phase shifter composed of a 3-dB coupler and two identical reflective terminations has provided a large phase shift with a relatively low insertion loss. The second topology is an all-pass network structure. The all-pass network phase shifter consists of only lumped elements so that one can shrink in size of devices. The total chip area of the all-pass network phase shifter is only 2.6 mm * 2.2 mm with a loss figure-of-merit (FOM) of more than 69 deg/dB at 2.4 GHz. This is the smallest size and the best performance obtained to date for BST phase shifters in the 2.4 GHz band and comparable or even better than the state of the GaAs MMIC phase shifters. The nonlinear response of the all-pass network phase shifter also was investigated with two-tone intermodulation distortion (IMD) measurement. Furthermore, the all-pass network phase shifter was studied to ascertain a design to ensure minimum performance variation over a range of temperature and to determine which BST composition performed best in the face of temperature variations. Compact beamforming networks (BFNs) for WLAN systems using client-based smart antennas have been demonstrated to validate the feasibility of BST technology for WLAN applications. The two-element BFNs have been shown to increase throughput and network capacity by rejecting interference.

In a typical printed circuit board assembly, over 70 percent of the electronic components are passives such as resistors, inductors, and capacitors, and these passives could take up to 50 percent of the entire printed circuit board area. By embedding the passive components within the substrate instead of being mounted on the surface, the embedded passives could reduce the system real estate, eliminate the need for surface-mounted discrete components, eliminate lead based interconnects, enhance electrical performance and reliability, and potentially reduce the overall cost. Even with these advantages, embedded passive technology, especially for organic substrates, is at an early stage of development, and thus a comprehensive experimental and theoretical modeling study is needed to understand the fabrication and reliability of embedded passives before they can be widely used. This thesis aims to fabricate embedded passives in a multilayered organic substrate, perform extensive electrical and mechanical reliability tests, and develop physics-based models to predict the thermo-mechanical reliability of embedded capacitors. Embedded capacitors and resistors with different geometric shapes, planar dimensions, and thus different electrical characteristics have been fabricated on two different test vehicles. Capacitors are made with polymer/ceramic nanocomposite materials and have a capacitance in the range of 50 pF to 1.5 nF. Resistors are carbon ink based Polymer Thick Film (PTF) and NiCrAlSi and have a resistance in the range of 25 to 400 k. High frequency measurements have been done using Vector Network Analyzer (VNA) with 2 port signal-ground (S-G) probes. Accelerated thermal cycling (-55 to 125oC) and constant temperature and humidity tests (85oC/85RH) based on JEDEC and MIL standards have been performed. Furthermore, physics-based numerical models have been developed and validated using the experimental data. By focusing on the design and fabrication as well as the experimental and theoretical reliability assessments, this thesis aims to contribute to the overall development of embedded passive technology for Digital and Radio Frequency (RF) applications.

A new modified-T equivalent-circuit model for the embedded inductors in LTCC is first introduced in this thesis. The model can predict the parallel, series, and ground resonant frequencies successfully. For the embedded capacitors in LTCC, a £k-equivalent circuit that can include first two resonant frequencies has been used. One example for each model has been established to illustrate the broadband features of the models. Finally, a parameter table is given to evaluate the performance of these embedded LTCC inductors and capacitors.

The objectives of this research are to accomplish Multilayer Ceramic Capacitors, MLCCs used Temperature compensated type Ceramic powder and different design and size to confer its characteristic. The first to speak about Taiwan capacitors property development to point Multilayer Ceramic Capacitors from 1960 to recently.The manufacture procedure from Normal Metal Electronic procedure change to Base Metal Electronic procedure. The second to quote the relation document to explain Temperature compensated type Multilayer Ceramic Capacitors characteristics and main electric characteristics and the related factors such as Frequency, Test Signal Level, DC Bias, Temperature, Time, Insulation resistance and Break down voltage. The last from sample manufacture flow and structure analysis to electric characteristic measure analysis and result to discuss opposite factor characteristics. To bring up develop direction and reference material.