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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
21

Phase Synthesis Using Coupled Phase-Locked Loops

Iyer, S.P. Anand 01 January 2008 (has links) (PDF)
Phase Synthesis is a fundamental operation in Smart Antennas and other Phased Array systems based on beamforming. There are increasing commercial applications for Integrated Phased Arrays due to their low cost, size and power and also because the RF and digital signal processing can be performed on the same chip. These low cost beamforming applications have augmented interest in Coupled Phase Locked Loop (CPLL) systems for Phase Synthesis. Previous work on the implementation of Phase Synthesis systems using Coupled PLLs for low cost beamforming had the constraint of a limited phase range of ±90°. The idea behind the thesis is that this phase synthesis range can be increased to ±180° through the use of PLLs employing Phase Frequency Detectors(PFDs), which is a significant improvement over conventional coupled-PLL systems. This work presents the detailed design and measurement results for a phase synthesizer using Coupled PLLs for achieving phase shift in the range of ±180°. Several Coupled PLL architectures are investigated and their advantages and limitations are evaluated in terms of frequency controllability, phase difference synthesis control and phase noise of the systems. A two-PLL system implementation using off the shelf components is presented, which generates a steady-state phase difference in the range ±180° using an adjustable DC control current. This is the proof of concept for doing an IC design for a Coupled Phase Locked Loop system. Commercial applications in the Wireless Medical Telemetry Service (WMTS) band motivate the design of a CPLL system in the 608-614 MHz band. The design methodology is presented which shows the flowchart of the IC design process from the system design specifications to the transistor level design. MATLAB simulations are presented to model the system performance quickly. VerilogA modeling of the CPLL system is performed followed by the IC design of the system and each block is simulated under different process and temperature corners. The transistor level design is then evaluated for its performance in terms of phase difference synthesis and phase noise and compared with the initial MATLAB analysis and improved iteratively. The CPLL system is implemented in IBM 130nm CMOS process and consumes 40mW of power from a 1.2V supply with a phase noise performance of -88 dBc/Hz for 177° phase generation.
22

Analog Artificial Neurons and Digital Amplifiers: Challenging the Roles of Analog and Digital Circuit Architectures in Modern CMOS Processes

Barton, Taylor S. 09 November 2023 (has links) (PDF)
As complimentary metal-oxide semiconductor (CMOS) technologies scale and field-effect transistor (FET) architectures change, the factors in deciding to utilize analog or digital transistor behaviors evolve. This thesis examines three case studies where traditionally analog or digital circuitry has dominated published works but I show that the opposite regime has significant benefits in scaled CMOS technologies. I present a highly digital operational amplifier (traditionally analog) and two artificial neurons (traditionally digital). In Chapters 2 and 3 I present a highly-digital five-stage zero-crossing-based amplifier which breaks the trade-off between slew rate and settling accuracy. I investigate the optimal charge pump design by analyzing the effects of the current scaling factor, number of current sources, maximum current value, and input amplitude on the settling performance including overshoot and settling time. I find that there exists an optimal number of stages that yields the fastest settling for a given total current and load capacitance. The proposed amplifier achieves a signal-to-noise ratio of 57 dB at a sampling rate of 40 MHz and consumes 1.45 mW under a 1V supply. In Chapters 4 and 5, I propose two novel analog artificial spiking neurons, operating in the voltage domain and phase domain respectively. The voltage domain neuron presented in Chapter 4 implements a novel fine-tuning method called neuromodulatory tuning which reduced the number of parameters to be tuned by four orders of magnitude as compared with traditional fine-tuning methods. Chapter 5 presents the design of a novel phase-domain neuron. Voltage domain neurons mimic biological neurons by integrating charge on a capacitor. I instead integrate phase in a voltage-controlled ring oscillator (VCO). I also propose a novel bidirectional switched-capacitor synapse which saves significant area compared to bidirectional current based synapses. The proposed neuron, synapse and weight memory occupy only 21x27um, and consume 134fJ/spike under a 0.35V supply.
23

Summer-Less Dual Charge Pump Based PLL With Wide Lock Range Using Analog Frequency Detector

Raghavendra, R G 10 1900 (has links)
Phase Locked Loop (PLL) is an integral component of clock generation circuits. A third order Charge Pump PLL (CPPLL) is most widely employed PLL architecture due to its zero steady state phase error. A monolithic implementation of such a CPPLL presents numerous challenges to PLL designers, the number of such challenges vary depending on the process technology employed and the end application. One such challenge that is worth mentioning is the on-chip integration of the second order passive loop filter. The area occupied by the second order passive loop filter is mainly determined by the zero determining capacitance (CZ). A low loop bandwidth CPPLL has a higher CZ value, and hence consumes a larger die area than a large loop bandwidth CPPLL. Literature survey shows that the problem of higher CZ value in low loop bandwidth CPPLL is addressed by using some form of emulation techniques. A relatively simpler emulation technique is the use of dual charge pump based loop filter. Existing dual charge pump based loop filter consume extra elements (such as summer that need opamps to realize the summer function) for achieving low CZ value. These extra elements consume extra area and additional power. We present two types of Summer-Less Dual Charge Pump (SDCP) based loop filter designs that do not need extra elements and still achieves low CZ value and this is achieved by using a second charge pump in an appropriate way. A test chip was implemented in 0.13µm UMC MMRFCMOS process to verify the presented circuits. The presented SDCP based loop filter circuits are particularly useful in designs employing multiple CPPLL’s and design employing low loop bandwidth CPPLL’s. Another challenge worth-mentioning is the frequency ranges over which the PLL can be locked. The Voltage Controlled Oscillator (VCO) of PLL mainly determines the frequency locking range of a PLL. A typical VCO has a frequency locking range of usually 1:2 to 1:3. The VCO frequency tuning range reduces with reduction in supply voltage. This poses a serious problem in low supply voltage applications that demand a wide frequency locking range, sometimes greater than 1:3. We have addressed this problem of wide PLL lock range, by using an Analog Frequency Detector. A wide frequency lock range is achieved, either by dynamically modifying the VCO or the feedback divider of PLL. Both the approaches are equally feasible. The frequency detector is used for dynamically modifying the VCO or the feedback divider of PLL. Two test chips were implemented to verify the presented Analog Frequency Detector scheme. A testchip implemented in 0.25µm CSM analog process achieves wide frequency lock range by dynamically modifying the feedback divider of PLL. Another testchip implemented in 0.13µm UMC MMRFCMOS process achieves wide frequency lock range by dynamically modifying the center frequency of the VCO. Presented analog frequency detection scheme is particularly useful in applications that demand wide PLL lock range from a single die.
24

Návrh zdvojovače napětí v technologii ACMOS 0,25 m / Voltage doubler design in 0,25 m CMOS technology

Synek, Ladislav January 2014 (has links)
This diploma thesis deals with the design of a partially integrated charge pump in 0.25 micron technology ACMOS. The work is divided into two main parts, theoretical and practical. The theoretical section describes in detail various topologies of higher voltage generation of a charge pump and selected methods of regulating the output voltage of charge pumps. The practical part deals with the the actual design of a charge pump together with the arguments for the choice of the TPVD topology and the type of the regulation. Three regulation methods of a charge pump were implemented, tested and are dealt with: Pulse Skip, Constant frequency and PWM. There are 3 sub chapters, each describing a different regulation method, defining all the key elements of the design of such a charge pump and the results of the simulations are discussed. Conclusion of the thesis summarizes the results of the design of charge pumps, comparing them on the basis of the chosen type of output voltage regulation.
25

Etude et réalisation d'un récupérateur d'énergie vibratoire par transduction électrostatique en technologie MEMS silicium / Elaboration of a capacitive transducer for vibration-to-electricity power conversion

Guillemet, Raphaël 02 October 2012 (has links)
Une solution pertinente afin d'alimenter des capteurs isolés consiste à récupérer l'énergie disponible dans leur environnement immédiat. Parmi les sources d'énergie envisageables, notre choix s'est porté sur les vibrations mécaniques ambiantes. Notre contribution porte sur l'étude et la réalisation, par un procédé de fabrication collective, d'un transducteur électrostatique sans électrets en technologie MEMS Silicium. Nous proposons une étude analytique permettant d'optimiser l'efficacité du générateur électrostatique, tout en considérant une limite sur la tension maximale aux bornes du transducteur afin de ne pas endommager le circuit de conditionnement. Le design proposé prend également en compte d'éventuelles variations de l'amplitude des vibrations externes. Le dispositif a été fabriqué au sein de ESIEE Paris et présente un volume total de moins de 100 mm3.Les tests expérimentaux ont montré un comportement fortement non-linéaire de la structure. Nous avons obtenu une conversion d'énergie mécanique en énergie électrique correspondant à une puissance maximale de 2.3 μW à 260 Hz, pour une accélération de 1 g et à une pression de 0.15 Torr, lorsque le système est pré-chargé avec une tension de 10 V. Une fois implémenté dans un circuit de pompe de charge et pour les mêmes conditions d'accélération et de pression, le système peut fonctionner en complète autonomie pendant plus de 500 secondes pendant lesquelles la puissance délivrée varie de 1.4 μW à 940 nW avec une tension de pré-charge de 10.6 V / A relevant solution to power isolated sensors is to harvest the energy available in their immediate environment. Among the possible sources of energy, our choice was made on ambient mechanical vibrations. We have designed and fabricated a silicon-based and batch-processed MEMS electrostatic transducer which does not use an electret. We present an analytical method to optimize the efficiency of the electrostatic generator, while a voltage limitation on the transducer's terminal is set to prevent any damage in the conditioning electronics. The proposed design also takes into account some possible variations in the amplitude of external vibration. The device was fabricated in ESIEE Paris and its volume is less than 100 mm3. The device was tested experimentally and exhibits a strong non-linear behavior. We obtained a conversion of mechanical energy into electrical energy corresponding to a power of 2.3 μW at 260 Hz, with an acceleration of 1 g and a pressure of 0.15 Torr, when the system is pre-charged with a voltage of10 V. When the device is implemented in a charge pump circuit and under the same parameters of acceleration and pressure, the system can operate in autonomous mode for more than 500 seconds during which the output power varies from 1.4 μW to 940 nW when the pre-charge voltage is 10.6 V
26

Microwave-energy harvesting at 5.8 GHz for passive devices

Valenta, Christopher Ryan 27 August 2014 (has links)
The wireless transfer of power is the enabling technology for realizing a true internet-of-things. Broad sensor networks capable of monitoring environmental pollutants, health-related biological data, and building utility usage are just a small fraction of the myriad of applications which are part of an ever evolving ubiquitous lifestyle. Realizing these systems requires a means of powering their electronics sans batteries. Removing the batteries from the billions or trillions of these envisioned devices not only reduces their size and lowers their cost, but also avoids an ecological catastrophe. Increasing the efficiency of microwave-to-DC power conversion in energy-harvesting circuits extends the range and reliability of passive sensor networks. Multi-frequency waveforms are one technique that assists in overcoming the energy-harvesting circuit diode voltage threshold which limit the energy-conversion efficiency at low RF input powers typically encountered by sensors at the fringe of their coverage area. This thesis discusses a systematic optimization approach to the design of energy-conversion circuits along with multi-frequency waveform excitation. Using this methodology, a low-power 5.8 GHz rectenna showed an output power improvement of over 20 dB at -20 dBm input power using a 3-POW (power-optimized waveform) compared to continuous waveforms (CW). The resultant efficiency is the highest reported efficiency for low-power 5.8 GHz energy harvesters. Additionally, new theoretical models help to predict the maximum possible range of the next generation of passive electronics based upon trends in the semiconductor industry. These models predict improvements in diode turn-on power of over 20 dB using modern Schottky diodes. This improvement in turn-on power includes an improvement in output power of hundreds of dB when compared to CW.
27

Ultra-low Quiescent Current NMOS Low Dropout Regulator With Fast Transient response for Always-On Internet-of-Things Applications

January 2018 (has links)
abstract: The increased adoption of Internet-of-Things (IoT) for various applications like smart home, industrial automation, connected vehicles, medical instrumentation, etc. has resulted in a large scale distributed network of sensors, accompanied by their power supply regulator modules, control and data transfer circuitry. Depending on the application, the sensor location can be virtually anywhere and therefore they are typically powered by a localized battery. To ensure long battery-life without replacement, the power consumption of the sensor nodes, the supply regulator and, control and data transmission unit, needs to be very low. Reduction in power consumption in the sensor, control and data transmission is typically done by duty-cycled operation such that they are on periodically only for short bursts of time or turn on only based on a trigger event and are otherwise powered down. These approaches reduce their power consumption significantly and therefore the overall system power is dominated by the consumption in the always-on supply regulator. Besides having low power consumption, supply regulators for such IoT systems also need to have fast transient response to load current changes during a duty-cycled operation. Supply regulation using low quiescent current low dropout (LDO) regulators helps in extending the battery life of such power aware always-on applications with very long standby time. To serve as a supply regulator for such applications, a 1.24 µA quiescent current NMOS low dropout (LDO) is presented in this dissertation. This LDO uses a hybrid bias current generator (HBCG) to boost its bias current and improve the transient response. A scalable bias-current error amplifier with an on-demand buffer drives the NMOS pass device. The error amplifier is powered with an integrated dynamic frequency charge pump to ensure low dropout voltage. A low-power relaxation oscillator (LPRO) generates the charge pump clocks. Switched-capacitor pole tracking (SCPT) compensation scheme is proposed to ensure stability up to maximum load current of 150 mA for a low-ESR output capacitor range of 1 - 47µF. Designed in a 0.25 µm CMOS process, the LDO has an output voltage range of 1V – 3V, a dropout voltage of 240 mV, and a core area of 0.11 mm2. / Dissertation/Thesis / Doctoral Dissertation Electrical Engineering 2018
28

Etude, modélisation et conception d'un multicapteur chimique à base de CNTFET / Study, modeling and design of chemical multisensor based on CNTFET (Carbon NanoTube Field-Effect Transistor)

Heitz, Jérôme 19 September 2013 (has links)
Depuis quelques années, les explosifs artisanaux à base de peroxyde sont fréquemment utilisés dans les actes de terrorisme. Leur simplicité de conception ne les rend pas moins inoffensifs car ils sont tout aussi puissants que ceux à base de TNT (trinitrotoluène). Au regard des enjeux majeurs de la sécurité globale et en particulier de la protection du citoyen, il devient nécessaire de bénéficier d'instruments de détection fiables. C'est dans ce cadre que s'inscrit ce travail de thèse qui vise à développer un capteur intégré, sensible et sélectif aux traces d'explosifs, notamment ceux à base de peroxyde. Ce nez électronique est constitué d'une matrice de transistors à nanotubes de carbone (CNTFET) et d'une électronique et traitement des données. Après une brève introduction relative aux CNTFET pour la détection gazeuse, nous présentons les bases de l'élaboration d'une modélisation électrique du capteur. Cette modélisation a pour but, à terme, de permettre aux concepteurs decircuits intégrés de bénéficier d'un support de simulation des CNTFET, nécessaire à la mise en oeuvre de l'électronique de contrôle et de conditionnement des signaux. Nous détaillerons également ce qui constitue selon nous l'étape fondamentale précédant l'élaboration d'un modèle compact prédictif basé sur la physique, c'est à dire la compréhension topologique du réseau de nanotubes. Nous détaillerons alors différentes probabilités de contacts entre nanotubes. Nous présentons ensuite,l'élaboration de l'électronique permettant le contrôle des potentiels appliqués aux CNTFET et le conditionnement des signaux électriques. Ce conditionnement a pour objectif d'acheminer les réponses électriques du capteur vers des architectures de traitement de données utilisées pour la détection des différents gaz cibles. L'électronique intégrée en technologie CMOS HV (haute tension) est alimentée par pile basse tension. Des pompes de charge, élévateurs de tension, générant ces hautes tensions ont été étudiées, modélisées et réalisées. Nous proposons également dans ce manuscrit une nouvelle architecture de pompe de charge qui constitue, dans certaines plages d'utilisation, une alternative intéressante aux pompes de charge les plus performantes utilisées jusqu'à présent. / For the last few years, improvised peroxide based explosives are frequently used in acts of terrorism. Their simple design does not make them less threatening than those based on TNT because they are equally as powerful as those based on TNT (trinitrotoluene). In view of the major issues of the overall safety and, in particular, the citizens' protection, it becomes necessary to enjoy reliable detection instruments. Such is the background of this PhD work which aims to develop a built-in sensor,sensitive and selective to traces of explosives, especially those based on peroxide. This electronic nose is made up of a network of carbon nanotube field-effect transistors (CNTFET), and data processing hardware. After a brief introduction relating to CNTFETs for gaseous detection, we will provide the basis for the elaboration of an electronic modeling of the sensor. This modeling aims, at the end, to allow designers of integrated circuits to benefit from a simulation support of CNTFETs, required to the implementation of control and signal conditioning electronics. We will also detail what are the fundamental steps mandatory before the development of a predictive compact model based on physics, which means the topological understanding of the nanotubes network. Then, we will describe different probabilities of contacts between nanotubes. Later, we will introduce the elaboration of the electronics allowing the control of the voltages applied to the CNTFETs and the electrical signals conditioning. The objective of this conditioning is to carry electrical responses from the sensor to data processing architectures used for the detection of the different target gasses. High Voltage CMOS integrated electronics are powered by low-voltage batteries. Charge pumps and voltage boosters which generate these high voltages, have been investigated, modeled and carried out. We also provide in this dissertation a new charge pump architecture which offers, in some ranges of application, an interesting alternative to the most efficient charge pumps used until now.
29

Design and fabrication of Mems-based, vibration powered energy harvesting device using electrostatic transduction / Conception et réalisation d'un micro-système pour la récupération de l'énergie vibratoire du milieu ambiant par transduction électrostatique

Mahmood Paracha, Ayyaz 11 December 2009 (has links)
Avec la réduction de l’énergie consommée par les capteurs miniatures, a émergé le nouveau concept de capteurs autonomes. Il s’agit de capteurs dont l’alimentation ne dépend pas d’une source embarquée de type batterie, dont la durée de vie est limitée. Ils ont en effet la capacité de puiser l’énergie nécessaire à leur fonctionnement à partir de l’environnement dans lequel ils se trouvent. Ce concept présente de nombreux avantages, notamment la diminution des coûts de maintenance des capteurs par l’absence d’une nécessité de remplacement des piles et par conséquent une facilité accrue du déploiement des réseaux de capteurs sans fil. Parmi les sources d’énergie envisageables, les vibrations mécaniques ambiantes comptent parmi les plus prometteuses puisqu’elles sont présentes dans un grand nombre de structures : véhicules, avions, bâtiments, etc. La conversion des vibrations mécaniques en énergie électrique est réalisée en deux étapes. Dans un premier temps, un résonateur mécanique, constitué d’une masse mobile associée à un ressort, est couplé avec les vibrations de l'environnement. Grâce à ce couplage, la masse oscille dans le système de référence et accumule une énergie mécanique. La deuxième étape est la conversion de cette énergie en énergie électrique. Un transducteur électromécanique est le siège d’une force d'amortissement sur la masse en résonance, et effectue donc un travail négatif sur le système mécanique. Notre choix de transducteur électromécanique s’est arrêté sur les transducteurs électrostatiques et piézoélectriques car ils présentent l'avantage d’être compatibilité avec le procédé CMOS et adaptés à la miniaturisation. Nous avons ensuite conçu et fabriqué un transducteur électrostatique utilisant une technologie silicium verre, qui a nécessité le développement d’un procédé ad hoc de gravure DRIE. Le dispositif a été testé en utilisant un circuit électronique de type pompe de charge. Nous avons obtenu une conversion d’énergie mécanique en énergie électrique de 61 nW au moyen d’un dispositif dont la surface est de seulement 66 mm², la sollicitation vibratoire étant à la fréquence de résonance mécanique de la microstructure, qui est de 250 Hz et avec une accélération externe de 0,25 g ainsi qu’une tension initiale de 6V. Le résultat a été confronté avec des simulations effectuées sur la base d’un modèle VHDL-AMS. L’écart avec les mesures est inférieur à 3%. Ce dispositif est le premier convertisseur miniature d’énergie basé sur une transduction électrostatique, fabriqué dans un procédé collectif à base de silicium et sans l'adjonction d'un électret. Afin de procéder à une comparaison pertinente de notre travail avec les autres dispositifs rapportés dans la littérature et qui utilisent la transduction électrostatique, nous proposons une nouvelle figure de mérite (FOM) définie comme une puissance convertie normalisée. Bien que l’état de l’art actuel montre que notre réalisation présente l’un des meilleurs facteurs de mérite, la puissance produite n'est cependant pas suffisante pour alimenter un microsystème réel, à cause notamment d’une tension de « pull-in » trop basse. Quelques pistes d’amélioration sont proposées, notamment l’exploitation de non-linéarités mécaniques pour augmenter la bande passante du spectre énergétique exploitable par le micro-dispositif / Due to size effects, the microtechnologies that are used to manufacture micro-sensors, allowed a drastic reduction of electrical power consumption. This feature contributed to the emergence of the concept of autonomous sensors, which have the ability to take the energy needed for their operation from the environment where they are located. Among the different energy sources, our choice was made on ambient mechanical vibrations. The electromechanical conversion is done within a transducer integrated with a micromechanical structure. In this work, we have designed and fabricated an electrostatic transducer based on silicon-glass technology, which required the development of a dedicated deep etching process. The device was tested experimentally and we have obtained a conversion of mechanical energy into electrical energy, corresponding to a power of 61 nW, with a device whose surface area is only 66 mm². This device is the first miniaturized silicon converter based on electrostatic transduction which does not use an electret
30

Electrical Equivalent Modeling of the Reverse Electrowetting-on-Dielectric (REWOD) Based Transducer along with Highly Efficient Energy Harvesting Circuit Design towards Self-Powered Motion Sensor

Gunti, Avinash 08 1900 (has links)
Among various energy harvesting technologies reverse electrowetting-on-dielectric energy harvesting (REWOD) has been proved to harvest energy from low frequency motion such as many human motion activities (e.g. walking, running, jogging etc.). Voltage rectification and DC-DC boosting of low magnitude AC voltage from REWOD can be used to reliably self-power the wearable sensors. In this work, a commercial component-based rectifier and DC-DC converter is designed and experimentally verified, for further miniaturization standard 180 nm CMOS process is used to design the rectifier and the DC-DC boost converter.This work also includes the MATLAB based model for REWOD energy harvester for various REWOD models. In REWOD energy harvesting, a mechanical input during the motion causes the electrolyte placed in between two dissimilar electrodes to squeeze back and forth thereby periodically changing the effective interfacial area, hence generating alternating current. The alternating current is given to the rectifier design. There is no realistic model that has been developed yet for this technique. Thereby, a MATLAB based REWOD model is developed for the realistic simulation of the REWOD phenomenon. In the work, a comparison of different REWOD models such as planar surface, rough surface and porous models are performed demonstrating the variations in capacitance, current and voltage.

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