Even though there had been extensive research in Switching Mode Power Amplifier design their applications at industry level are quite limited. This is because a Fully-Integrated Switching Mode Power Amplifier using conventional active devices such as Bipolar Junction Transistors (BJT) or Metal Oxide Semiconductor Field Effect Transistor (MOSFET) is challenging due to the inherent design challenges in the Switching Power Amplifier design. A Fully-Integrated Differential Class-F2,3 Power Amplifier design is explored for this Thesis research. This Power Amplifier has a maximum theoretical efficiency of 90.7% but this value is reduced because of the switching nature of the active device, parasitic effects associated with layout and the quality factor of the passive components used. Waveform shaping required for a Class-F Power Amplifier is done using the stray inductances within a non-ideal transformer instead of individual inductors. This techniques effective reduces the foot prints of two inductors for the tuning network design and make a Fully-Integrated solution more practical.

This thesis consists of two parts. Part 1 introduces the characteristics of Class E power amplifier. Part 2 is focused on the implementation of Class E power amplifier for 2.4GHz Bluetooth applications. The design procedure follows the theory of class E power amplifier, and is implemented in MMICs and modules. For MMICs, the GaAs HBT foundry services are provided by the GCTC Ltd. and WIN Ltd.. Under single supply voltage of 3.3V and the output power of 20dBm, two designed MMICs have gain 23dB and 11dB, and power added efficiency (PAE) 57% and 72%, respectively. For Hybrid modules, RF transistors are provided by the Filtronic Ltd.. Under the same supply voltage of 3.3V, the measured output power, gain, and power added efficiency are 20 dBm, 25dB, and 75% respectively. Compared with the other types of power amplifiers on the market, Class E power amplifier has higher power added efficiency, and thus can increase the using time of communication system.

This thesis aims to use a hybrid quadrature polar modulator (HQPM) for enhancing average efficiency of 3G mobile transmitter with power control. The HQPM consists of a quadrature modulator instead of a phase modulator in the polar modulator for processing the RF modulated carrier and a Class-S modulator for processing the envelope signal. In addition, the instantaneous magnitude of the quadrature modulated signal is propotional to the instantaneous envelope magnitude. As a result, the output feed-through and gain-compression phenomenon in the polar modulator can be improved. The digital baseband processor realized by FPGA can generate CDMA2000 1x baseband signal with excellent modulation accuracy. For enhancing the average transmit efficiency, the output PA is realized as Class-E design. But the Vdd/AM and Vdd/PM nonlinear effects of the Class-E PA distort the output signal. To solve this problem, a digital predistorter is presented to compensate the nonlinear distortions. The proposed HQPM-based transmitter can simultaneously achieve high efficiency and high linearity over a wide modulated output power range.

The design of a low distortion and high efficiency self-oscillating power amplifier is presented. It is designed using TSMC 0.35µm, 2p4m CMOS technology. We use noise shaping to reduce the THD (Total Harmonic Distortion). This design can be applied to hearing aids. The supply voltage is 1.5V for hearing aids. Experimental results demonstrate that the proposed amplifier has the total harmonic distortion (THD) of 0.0751% and power efficiency around 90.1%. Measurement result reveals that this circuit can be up to 0.25% of the THD and 89.7% of the power efficiency. This result shows that the proposed power amplifier has superior performance in THD and power efficiency, and this circuit is applicable to low-distortion, high-efficiency, and low-voltage applications, such as the hearing aids.

This research work has made an effort to understand a novel line of radio frequency power amplifiers (RFPAs) that address initiatives for efficiency enhancement and linearity compensation to harmonize the fifth generation (5G) campaign. The objective is to enhance the performance of an orthogonal frequency division multiplexing-long term evolution (OFDM-LTE) transmitter by reducing the nonlinear distortion of the RFPA. The first part of this work explores the design and implementation of 15.5 W class AB RF power amplifier, adopting a balanced technique to stimulate efficiency enhancement and redeeming exhibition of excessive power in the transmitter. Consequently, this work goes beyond improving efficiency over a linear RF power amplifier design; in which a comprehensive investigation on the fundamental and harmonic components of class F RF power amplifier using a load-pull approach to realise an optimum load impedance and the matching network is presented. The frequency bandwidth for both amplifiers was allocated to operate in the 2.620-2.690 GHz of mobile LTE applications. The second part explores the development of the behavioural model for the class AB power amplifier. A particular novel, Hammerstein-Wiener based model is proposed to describe the dynamic nonlinear behaviour of the power amplifier. The RF power amplifier nonlinear distortion is approximated using a new linear parameter approximation approach. The first and second-order Hammerstein-Wiener using the Normalised Least Mean Square Error (NLMSE) algorithm is used with the aim of easing the complexity of filtering process during linear memory cancellation. Moreover, an enhanced adaptive Wiener model is proposed to explore the nonlinear memory effect in the system. The proposed approach is able to balance between convergence speed and high-level accuracy when compared with behavioural modelling algorithms that are more complex in computation. Finally, the adaptive predistorter technique is implemented and verified in the OFDM transceiver test-bed. The results were compared against the computed one from MATLAB simulation for OFDM and 5G modulation transmitters. The results have confirmed the reliability of the model and the effectiveness of the proposed predistorter. / Fundacão para a Ciência e a Tecnologia, Portugal, under European Union’s Horizon 2020 research and innovation programme ... grant agreement H2020-MSCA-ITN- 2016 SECRET-722424 I also acknowledge the role of the National Space Research and Development Agency (NASRDA) Sokoto State Government Petroleum Technology Trust Fund (PTDF)

This thesis improved the structure of traditional envelope elimination and restoration transmitter by replacing the analog components of envelope detector and limiter using digital processing technique of polar transformation. Envelope signal was modulated by delta-sigma modulation, which could suppress the quantization noise and would be good for integrated circuit design. The front end analog circuits of transmitter used high efficiency class-S and class-E power amplifiers to amplify envelope and phase signal separately and finally combined them at the output of class-E power amplifier. The RF transmitters using polar modulation had advantages of high efficiency and linearity when transmitting high PAPR-valued digital modulation signals. For example, when transmitting the QPSK-modulated signal with 900MHz carrier and 1Msps data rate, the transmitter was measured with efficiency as high as 60%, ACPR above 34dB, and EVM less than 6.5%.

Ce travail répond à un besoin industriel accru en termes d’amplification des signaux sur porteuses à enveloppes variables utilisés par les systèmes de télécommunications actuels. Ces signaux disposent d’un fort PAPR et d’une distribution statistique d’enveloppe centrée en-deçà de la valeur crête d’enveloppe. La raison pour laquelle les industriels télécoms requièrent alors des amplificateurs de très fortes puissances de sortie, robustes, fiables et ayant une dépense énergétique optimale le long de la dynamique d’enveloppe associée à un niveau de linéarité acceptable. Ce document expose les résultats d’étude et de réalisation de deux Amplificateurs de Puissance Doherty (APD) à haut rendement encapsulés en boîtiers plastiques QFN. Le premier est un amplificateur Doherty symétrique classique (APD-SE) et le second est un amplificateur à deux entrées RF (APD-DE). Ces démonstrateurs fonctionnant en bande C sont fondés sur l’utilisation de la technologie Quasi-MMIC associant des barrettes de puissance à base des transistors HEMTs AlGaN/GaN sur SiC à des circuits d’adaptation en technologie ULRC. L’approche Quasi-MMIC associée à la solution d’encapsulation plastique QFN permettant une meilleure gestion des comportements thermiques offre des performances électriques similaires à celles de la technologie MMIC avec des coûts et des cycles de fabrication très attractifs. Durant ces travaux, une nouvelle méthode d’évaluation des transistors dédiés à la conception d’amplificateurs Doherty a été développée et mise en oeuvre. L’utilisation intensive des simulations électromagnétiques 2.5D et 3D a permis de bien prendre en compte les effets de couplages entre les différents circuits dans l’environnement du boîtier QFN. Les résultats des tests des amplificateurs réalisés fonctionnant sur une bande de 1GHz ont permis de valider la méthode de conception et ont montré que les concepts avancés associés à l’approche Quasi-MMIC ainsi qu’à des technologies d’encapsulation plastique, peuvent générer des fonctions micro-ondes innovantes. Les caractérisations de l’APD-DE ont relevé l’intérêt inhérent à la préformation des signaux d’excitation et des points de polarisation de chaque étage de l’amplificateur. / This work responds to an increased industrial need for on carrier signals with variable envelope amplification used by current telecommunications systems. These signals have a strong PAPR and an envelope statistical distribution centred below the envelope peak value, the reason why the telecom industrialists then require a robust and reliable high power amplifiers having an energy expenditure along of the envelope dynamics associated with an acceptable level of linearity. This document presents the results of the study and realization of two, high efficiency, Doherty Power Amplifiers (DPA) encapsulated in QFN plastic packages. The first is a conventional Doherty power Amplifier (DPA-SE) and the second is a dual-input Doherty power amplifier (DPA-DE). These C-band demonstrators are based on the use of Quasi-MMIC technology combining power bars based on the AlGaN/GaN transistors on SiC to matching circuits in ULRC technology. The Quasi-MMIC approach combined with Quasi-MMIC approach combined with QFN plastic package solution for better thermal behaviour management offers electrical performances similar to those of MMIC technology with very attractive coasts and manufacturing cycles. During this work, a new evaluation method for the transistors dedicated to the design of DPA was developed and implemented. The intensive use of 2.5D and 3D electromagnetic simulations made it possible to take into account the coupling effects existing between the different circuits in the QFN package environment. The results of the tests of the amplifiers realised and operating on 1GHz bandwidth validated the design method and showed that the advanced concepts associated with the Quasi-MMIC approach as well as plastic encapsulation technologies can generate innovative microwave functions. The characterizations of the DPA-DE have noted the interest inherent in the preformation of the excitation signals and the bias points of each stage of the amplifier.

The research conducted for this thesis seeks to understand issues associated with integrating a direct spread spectrum system (DSSS) transceiver on to a single chip. Various types of sequences, such as Kasami sequences and Gold sequences, are available for use in typical spread spectrum systems. For this thesis, complex spreading sequences (CSS) are used for improved cross-correlation and autocorrelation properties that can be achieved by using such a sequence. While CSS and DSSS are well represented in the existing body of knowledge, and discrete bulky hardware solutions exist – an effort to jointly integrate CSS and DSSS on-chip was identified to be lacking. For this thesis, spread spectrum architecture was implemented focussing on sub-systems that are specific to CSS. This will be the main contribution for this thesis, but the contribution is further appended by various RF design challenges: highspeed requirements make RF circuits sensitive to the effects of parasitics, including parasitic inductance, passive component modelling, as well as signal integrity issues. The integration is first considered more ideally, using mathematical sub-systems, and then later implemented practically using complementary metal-oxide semiconductor (CMOS) technology. The integration involves mixed-signal and radio frequency (RF) design techniques – and final integration involves several specialized analogue sub-systems, such as a class F power amplifier (PA), a low-noise amplifier (LNA), and LC voltage-controlled oscillators (VCOs). The research also considers various issues related to on-chip inductors, and also considers an active inductor implementation as an option for the VCO. With such an inductor a better quality factor is achievable. While some conventional sub-system design techniques are deployed, several modifications are made to adapt a given sub-system to the design requirements for this thesis. The contribution of the research lies in the circuit level modifications done at sub-system level aimed towards eventual integration. For multiple-access communication systems, where a number of independent users are required to share a common channel, the transceiver proposed in this thesis, can contribute towards improved data rate or bit error rate. The design is completed for fabrication in a standard 0.35-μm CMOS process with minimal external components. With an active chip area of about 5 mm2, the simulated transmitter consumes about 250 mW&the receiver consumes about 200 mW. AFRIKAANS : Die navorsing wat vir hierdie tesis onderneem is, beoog om kundigheid op te bou aangaande die kwessies wat met die integrasie van ‘n direkte spreispektrumstelsel (DSSS) sender-ontvanger op ‘n enkele skyfie verband hou. Verskeie tipes sekwensies, soos byvoorbeeld Kasami- en Gold-sekwensies, is vir gebruik in tipiese spreispektrumstelsels beskikbaar. Vir hierdie tesis is komplekse spreisekwensies (KSS) gebruik vir verbeterde kruis- en outokorrelasie-eienskappe wat bereik kan word deur so ‘n sekwensie te gebruik. Alhoewel DSSS en KSS reeds welbekend is, en diskrete hardeware oplossings reeds bestaan, is die vraag na gesamentlike geïntegreerde DSSS en KSS op een vlokkie geïdentifiseer. Vir hierdie tesis is spreispektrumargitektuur aangewend met die klem op KSS substelsels. Dit is dan ook die belangrikste bydrae van hierdie tesis, maar die bydrae gaan verder gepaard met verskeie RF-ontwerpuitdagings: hoëspoed-vereistes maak RF-stroombane sensitief vir die uitwerking van parasitiese komponente, met inbegrip van parasitiese induktansie, passiewe komponentmodellering en ook seinintegriteitskwessies. Die integrasie word eerstens meer idealisties oorweeg deur wiskundige substelsels te gebruik en dan later prakties te implementeer deur komplementêre metaaloksied-halfgeleiertegnologie (CMOS) te gebruik. Die integrasie behels gemengdesein- en radiofrekwensie(RF)-ontwerptegnieke – en finale integrasie behels verskeie gespesialiseerde analoë substelsels soos ‘n klas F-kragversterker (KV), ‘n laeruis-versterker (LRV), en LC-spanningbeheerde ossileerders (SBO’s). Die navorsing oorweeg ook verskeie kwessies in verband met op-skyfie induktors en oorweeg ook ‘n aktiewe induktorimplementering as ‘n opsie vir die SBO. Met sodanige induktor is ‘n beter kwaliteitsfaktor haalbaar. Hoewel enkele konvensionele substelsel-ontwerptegnieke aangewend word, word daar verskeie wysigings aangebring om ‘n gegewe substelsel by die ontwerpvereistes vir hierdie tesis aan te pas. Die bydrae van die navorsing is hoofsaaklik die stroombaanmodifikasies wat gedoen is op substelselvlak om integrasie te vergemaklik. Vir veelvoudige-toegang kommunikasiestelsels waar ‘n aantal onafhanklike gebruikers dieselfde seinkanaal moet deel, kan die sender-ontvanger voorgestel in hierdie tesis meewerk om die datatempo en fouttempo te verbeter. Die ontwerp is voltooi vir vervaardiging in ‘n standaard 0.35-μm CMOS-proses met minimale eksterne komponente. Met ‘n aktiewe skyfie-oppervlakte van ongeveer 5 mm2, verbruik die gesimuleerde sender ongeveer 250 mW en die ontvanger verbruik ongeveer 200 mW. / Thesis (PHD)--University of Pretoria, 2011. / Electrical, Electronic and Computer Engineering / unrestricted