Computational study of the structural, thermodynamic and transport properties of polymeric materials at equilibrium requires multi-scale modeling techniques due to processes occurring across a broad spectrum of time and length scales. Classical molecular-level simulation, such as Molecular Dynamics (MD), has proved very useful in the study of polymeric oligomers or short chains. However, there is a strong, nonlinear dependence of relaxation time with respect to chain length that requires the use of less computationally demanding techniques to describe the behavior of longer chains. As one of the mesoscale modeling techniques, Coarse-grained (CG) procedure has been developed recently to extend the molecular simulation to larger time and length scales. With a CG model, structural and dynamics of long chain polymeric systems can be directly studied though CG level simulation. In the CG simulations, the generation of the CG potential is an area of current research activity. The work in this dissertation focused on both the development of techniques for generating CG potentials as well as the application of CG potentials in Coarse-grained Molecular Dynamics (CGMD) simulations to describe structural, thermodynamic and transport properties of various polymer systems. First, an improved procedure for generated CG potentials from structural data obtained from atomistic simulation of short chains was developed. The Ornstein-Zernike integral equation with the Percus Yevick approximation was invoked to solve this inverse problem (OZPY-1). Then the OZPY-1 method was applied to CG modeling of polyethylene terephthalate (PET) and polyethylene glycol (PEG). Finally, CG procedure was applied to a model of sulfonated and cross-linked Poly (1, 3-cyclohexadiene) (sxPCHD) polymer that is designed for future application as a proton exchange membrane material used in fuel cell. Through above efforts, we developed an understanding of the strengths and limitations of various procedures for generating CG potentials. We were able to simulate entangled polymer chains for PET and study the structure and dynamics as a function of chain length. The work here also provides the first glimpses of the nanoscale morphology of the hydrated sxPCHD membrane. An understanding of this structure is important in the prediction of proton conductivity in the membrane.

abstract: Improved knowledge connecting the chemistry, structure, and properties of polymers is necessary to develop advanced materials in a materials-by-design approach. Molecular dynamics (MD) simulations can provide tremendous insight into how the fine details of chemistry, molecular architecture, and microstructure affect many physical properties; however, they face well-known restrictions in their applicable temporal and spatial scales. These limitations have motivated the development of computationally-efficient, coarse-grained methods to investigate how microstructural details affect thermophysical properties. In this dissertation, I summarize my research work in structure-based coarse-graining methods to establish the link between molecular-scale structure and macroscopic properties of two different polymers. Systematically coarse-grained models were developed to study the viscoelastic stress response of polyurea, a copolymer that segregates into rigid and viscous phases, at time scales characteristic of blast and impact loading. With the application of appropriate scaling parameters, the coarse-grained models can predict viscoelastic properties with a speed up of 5-6 orders of magnitude relative to the atomistic MD models. Coarse-grained models of polyethylene were also created to investigate the thermomechanical material response under shock loading. As structure-based coarse-grained methods are generally not transferable to states different from which they were calibrated at, their applicability for modeling non-equilibrium processes such as shock and impact is highly limited. To address this problem, a new model is developed that incorporates many-body interactions and is calibrated across a range of different thermodynamic states using a least square minimization scheme. The new model is validated by comparing shock Hugoniot properties with atomistic and experimental data for polyethylene. Lastly, a high fidelity coarse-grained model of polyethylene was constructed that reproduces the joint-probability distributions of structural variables such as the distributions of bond lengths and bond angles between sequential coarse-grained sites along polymer chains. This new model accurately represents the structure of both the amorphous and crystal phases of polyethylene and enabling investigation of how polymer processing such as cold-drawing and bulk crystallization affect material structure at significantly larger time and length scales than traditional molecular simulations. / Dissertation/Thesis / Doctoral Dissertation Mechanical Engineering 2016

Diverse fiber-forming proteins are found in nature that accomplish a wide range of functions including signaling, cell adhesion, and mechanical support. Unique sequence characteristics of these proteins often lead to their specialized roles. However, these proteins also share a common organizational hierarchy in primary and secondary structures that strongly influence both their intramolecular folding and intermolecular interactions. Based on what is known regarding protein fiber assembly of silk peptides, shear-induced elongation of the molecular strands drives interchain secondary structure crystallization via anisotropic alignment, which creates a molecular superstructure that forms the basis a fiber network. In this work, the hypothesis is this type of protein fiber assembly is not unique to silk sequences and that other proteins can be spun into fibers in similar fashion while maintaining unique functionality given by their specialized amino acid sequences such as RGD, GX1X2, and so forth. This was investigated by modeling the manner in which hydrophobic and hydrophilic blocks of amino acids create interacting secondary structures at the chain level when exposed to shear. It was determined computationally and then verified experimentally that fiber spinning success is most likely to occur after shear processing if the protein sequence exhibits a balance of hydrophobic and hydrophilic content and has sufficient length. Applied to the biological scale, both pure and mixed solutions of proteins such as fibronectin, laminin, and silk fibroin were spun into fibers. In particular, alloy protein fibers of silk fibroin mixed with fibronectin exhibited the characteristic mechanical integrity of silk and the bioactivity of fibronectin. This simple method of creating protein fibers with hybrid characteristics is significantly faster, less expensive, and less technically intensive than chimeric protein production, which purports to do the same. This finding also provides insight into a fundamental means by which protein fibers may be assembled in vivo by taking advantage of the thermodynamically favorable assembly of peptide sequences at the chain level under proper molecular orientation. Taken together, a high throughput means of producing a wide-range of pure and hybrid protein fibers has been developed for various biological applications and research investigations into the fibrous elements of biology.

Molecular Dynamics (MD) is a simulation technique widely used by computational chemists and biologists to simulate and observe the physical properties of a system of particles or molecules. The method provides invaluable three-dimensional structural and transport property data for macromolecules that can be used in applications such as the study of protein folding and drug design. The most time-consuming and inefficient routines in MD packages, particularly for large systems, are the ones involving the computation of intermolecular energy and forces for each molecule. Many fully atomistic systems such as CHARMM and NAMD have been refined over the years to improve their efficiency. But, simulating complex long-time events such as protein folding remains out reach for atomistic simulations. The consensus view amongst computational chemists and biologists is that the development of a coarse-grained (CG) MD package will make the long timescales required for protein folding simulations possible. The shortcoming of this method remains an inability to produce accurate dynamics and results that are comparable with atomistic simulations. It is the objective of this dissertation to develop a coarse-grained method that is computationally faster than atomistic simulations, while being dynamically accurate enough to produce structural and transport property data comparable to results from the latter. Firstly, the accuracy of the Gay-Berne potential in modelling liquid benzene in comparison to fully atomistic simulations was investigated. Following this, the speed of a course-grained condensed phase benzene simulation employing a Gay-Berne potential was compared with that of a fully atomistic simulation. While coarse-graining algorithmically reduces the total number of particles in consideration, the execution time and efficiency scales poorly for large systems. Both fully-atomistic and coarse-grained developers have accelerated packages using high-performance parallel computing platforms such as multi-core CPU clusters, Field Programmable Gate Arrays (FPGAs) and Graphics Processing Units (GPUs). GPUs have especially gained popularity in recent years due to their massively parallel architecture on a single chip, making them a cheaper alternative to a CPU cluster. Their relatively shorter development time also gives them an advantage over FPGAs. NAMD is perhaps the most popular MD package that employs efficient use of a single GPU or a multi-GPU cluster to conduct simulations. The Scientific Computing Research Unit’s in-house generalised CG code, the Free Energy Force Induced (FEFI) coarse-grained MD package, was accelerated using a GPU to investigate the achievable speed-up in comparison to the CPU algorithm. To achieve this, a parallel version of the sequential force routine, i.e. the computation of the energy, force and torque per molecule, was developed and implemented on a GPU. The GPU-accelerated FEFI package was then used to simulate benzene, which is almost exclusively governed by van der Waal’s forces (i.e. dispersion effects), using the parameters for the Gay-Berne potential from a study by Golubkov and Ren in their work “Generalized coarse-grained model based on point multipole and Gay-Berne potentials”. The coarse-grained condensed phase structural properties, such as the radial and orientational distribution functions, proved to be inaccurate. Further, the transport properties such as diffusion were significantly more unsatisfactory compared to a CHARMM simulation. From this, a conclusion was reached that the Gay-Berne potential was not able to model the subtle effects of dispersion as observed in liquid benzene. In place of the analytic Gay-Berne potential, a more accurate approach would be to use a multidimensional free energy-based potential. Using the Free Energy from Adaptive Reaction Coordinate Forces (FEARCF) method, a four-dimensional Free Energy Volume (FEV) for two interacting benzene molecules was computed for liquid benzene. The focal point of this dissertation was to use this FEV as the coarse-grained interaction potential in FEFI to conduct CG simulations of condensed phase liquid benzene. The FEV can act as a numerical potential or Look-Up Table (LUT) from which the interaction energy and four partial derivatives required to compute the forces and torques can be obtained via numerical methods at each step of the CG MD simulation. A significant component of this dissertation was the development and implementation of four-dimensional LUT routines to use the FEV for accurate condensed phase coarse-grained simulations. To compute the energy and partial derivatives between the grid points of the surface, an interpolation algorithm was required. A four-dimensional cubic B-spline interpolation was developed because of the method’s superior accuracy and resistance to oscillations compared with other polynomial interpolation methods. When The algorithm’s introduction into the FEFI CG MD package for CPUs exhausted the single-core CPU architecture with its large number of interpolations for each MD step. It was therefore impractical for the high throughput interpolation required for MD simulations. The 4D cubic B-spline algorithm and the LUT routine were then developed and implemented on a GPU. Following evaluation, the LUT was integrated into the FEFI MD simulation package. A FEFI CG simulation of liquid benzene was run using the 4D FEV for a benzene molecular pair as the numerical potential. The structural and transport properties outperformed the analytical Gay-Berne CG potential, more closely approximating the atomistic predicted properties. The work done in this dissertation demonstrates the feasibility of a coarse-grained simulation using a free energy volume as a numerical potential to accurately simulate dispersion effects, a key feature needed for protein folding.

The essential cellular functions of the mitochondrion require the exchange of a wide variety of molecules across its two membranes, which is carried out by different membrane proteins.The Voltage-Dependent Anion Channel (VDAC) located in the mitochondrial outer membrane (MOM) is responsible for the passage of various ions and small molecules to and from the intermembrane space. It is also involved in the regulation of cellular processes through its interactions with lipids or other proteins.At the MOM level, we studied the transport, through VDAC, of small inorganic ions and of thiamine pyrophosphate (TPP), an essential cofactor. Using different simulation methods such as Brownian dynamics (BD), All-Atom (AA) molecular dynamics (MD) and Coarse-Grained (CG) MD, we investigated the effect of two factors on the regulation of VDAC ion selectivity: ionic strength and membrane lipid composition. All simulation types show that VDAC becomes less selective towards anions with increasing salt concentration. The simulations further suggest that the selectivity mechanism occurs due to the filtering of some basic residues that point into the pore lumen. Furthermore, MD simulations show that the lipid composition of the membrane modulates the distribution of ions inside VDAC. In a comparison of POPE versus POPC bilayer, this regulation occurs through the more persistent interactions of some acidic residues located on both edges of the β-barrel with POPE head groups which, in turn, alters the electrostatic potential in the lumen which consequently affects the pore selectivity. CG MD simulations show that this mechanism also occurs in a mixed POPE/POPC bilayer by an enrichment of POPE on VDAC surface.In order to simulate the transport of the TPP, force field parameters have been developed and validated. Simulations of the translocation of TPP through VDAC show analogies with the mechanism used by other previously studied metabolites, in particular with ATP. At the mitochondrial inner membrane level, the mechanism of TPP transport by the specific thiamine pyrophosphate transporter (TPPT) shows significant similarities with the mechanism proposed for other members of the mitochondrial carrier family to which TPPT belongs. They mainly are the energetics arising from the alternating formation and disruption of two salt bridge networks, one on the matrix side and the other on the cytosolic side, and the interactions, of an ionic nature, formed by TPP during its binding in TPPT central cavity. Furthermore, the energy contribution provided by the cytosolic network establishes a weaker barrier than that of the matrix network, which may support the hypothesis of a uniport activity of TPPT. / Doctorat en Sciences / info:eu-repo/semantics/nonPublished

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A Coarse-Grained Reconfigurable Architecture (CGRA) is a processing platform which constitutes an interconnection of coarse-grained computation units (viz. Function Units (FUs), Arithmetic Logic Units (ALUs)). These units communicate directly, viz. send-receive like primitives, as opposed to the shared memory based communication used in multi-core processors. CGRAs are a well-researched topic and the design space of a CGRA is quite large. The design space can be represented as a 7-tuple (C, N, T, P, O, M, H) where each of the terms have the following meaning: C -choice of computation unit, N -choice of interconnection network, T -Choice of number of context frame (single or multiple), P -presence of partial reconfiguration, O choice of orchestration mechanism, M -design of memory hierarchy and H host-CGRA coupling. In this thesis, we develop an architectural framework for a Macro-Dataflow based CGRA where we make the following choice for each of these parameters: C -ALU, N -Network-on-Chip (NoC), T -Multiple contexts, P -support for partial reconfiguration, O -Macro Dataflow based orchestration, M -data memory banks placed at the periphery of the reconfigurable fabric (reconfigurable fabric is the name given to the interconnection of computation units), H -loose coupling between host processor and CGRA, enabling our CGRA to execute an application independent of the host-processor’s intervention. The motivations for developing such a CGRA are: To execute applications efficiently through reduction in reconfiguration time (i.e. the time needed to transfer instructions and data to the reconfigurable fabric) and reduction in execution time through better exploitation of all forms of parallelism: Instruction Level Parallelism (ILP), Data Level Parallelism (DLP) and Thread/Task Level Parallelism (TLP). We choose a macro-dataflow based orchestration framework in combination with partial reconfiguration so as to ease exploitation of TLP and DLP. Macro-dataflow serves as a light weight synchronization mechanism. We experiment with two variants of the macro-dataflow orchestration units, namely: hardware controlled orchestration unit and the compiler controlled orchestration unit. We employ a NoC as it helps reduce the reconfiguration overhead. To permit customization of the CGRA for a particular domain through the use of domain-specific custom-Intellectual Property (IP) blocks. This aids in improving both application performance and makes it energy efficient. To develop a CGRA which is completely programmable and accepts any program written using the C89 standard. The compiler and the architecture were co-developed to ensure that every feature of the architecture could be automatically programmed through an application by a compiler. In this CGRA framework, the orchestration mechanism (O) and the host-CGRA coupling (H) are kept fixed and we permit design space exploration of the other terms in the 7-tuple design space. The mode of compilation and execution remains invariant of these changes, hence referred to as a framework. We now elucidate the compilation and execution flow for this CGRA framework. An application written in C language is compiled and is transformed into a set of temporal partitions, referred to as HyperOps in this thesis. The macro-dataflow orchestration unit selects a HyperOp for execution when all its inputs are available. The instructions and operands for a ready HyperOp are transferred to the reconfigurable fabric for execution. Each ALU (in the computation unit) is capable of waiting for the availability of the input data, prior to issuing instructions. We permit the launch and execution of a temporal partition to progress in parallel, which reduces the reconfiguration overhead. We further cut launch delays by keeping loops persistent on fabric and thus eliminating the need to launch the instructions. The CGRA framework has been implemented using Bluespec System Verilog. We evaluate the performance of two of these CGRA instances: one for cryptographic applications and another instance for linear algebra kernels. We also run other general purpose integer and floating point applications to demonstrate the generic nature of these optimizations. We explore various microarchitectural optimizations viz. pipeline optimizations (i.e. changing value of T ), different forms of macro dataflow orchestration such as hardware controlled orchestration unit and compiler-controlled orchestration unit, different execution modes including resident loops, pipeline parallelism, changes to the router etc. As a result of these optimizations we observe 2.5x improvement in performance as compared to the base version. The reconfiguration overhead was hidden through overlapping launching of instructions with execution making. The perceived reconfiguration overhead is reduced drastically to about 9-11 cycles for each HyperOp, invariant of the size of the HyperOp. This can be mainly attributed to the data dependent instruction execution and use of the NoC. The overhead of the macro-dataflow execution unit was reduced to a minimum with the compiler controlled orchestration unit. To benchmark the performance of these CGRA instances, we compare the performance of these with an Intel Core 2 Quad running at 2.66GHz. On the cryptographic CGRA instance, running at 700MHz, we observe one to two orders of improvement in performance for cryptographic applications and up to one order of magnitude performance degradation for linear algebra CGRA instance. This relatively poor performance of linear algebra kernels can be attributed to the inability in exploiting ILP across computation units interconnected by the NoC, long latency in accessing data memory placed at the periphery of the reconfigurable fabric and unavailability of pipelined floating point units (which is critical to the performance of linear algebra kernels). The superior performance of the cryptographic kernels can be attributed to higher computation to load instruction ratio, careful choice of custom IP block, ability to construct large HyperOps which allows greater portion of the communication to be performed directly (as against communication through a register file in a general purpose processor) and the use of resident loops execution mode. The power consumption of a computation unit employed on the cryptography CGRA instance, along with its router is about 76mW, as estimated by Synopsys Design Vision using the Faraday 90nm technology library for an activity factor of 0.5. The power of other instances would be dependent on specific instantiation of the domain specific units. This implies that for a reconfigurable fabric of size 5 x 6 the total power consumption is about 2.3W. The area and power ( 84mW) dissipated by the macro dataflow orchestration unit, which is common to both instances, is comparable to a single computation unit, making it an effective and low overhead technique to exploit TLP.

Coarse-Grained Reconfigurable Architectures(CGRAs) can be employed for accelerating computational workloads that demand both flexibility and performance. CGRAs comprise a set of computation elements interconnected using a network and this interconnection of computation elements is referred to as a reconfigurable fabric. The size of application that can be accommodated on the reconfigurable fabric is limited by the size of instruction buffers associated with each Compute element. When an application cannot be accommodated entirely, application is partitioned such that each of these partitions can be executed on the reconfigurable fabric. These partitions are scheduled by an orchestrator. The orchestrator employs dynamic dataflow execution paradigm. Dynamic dataflow execution paradigm has inherent support for synchronization and helps in exploitation of parallelism that exists across application partitions. In this thesis, we present a compiler that targets such CGRAs. The compiler presented in this thesis is capable of accepting applications specified in C89 standard. To enable architectural design space exploration, the compiler is designed such that it can be customized for several instances of CGRAs employing dataflow execution paradigm at the orchestrator. This can be achieved by specifying the appropriate configuration parameters to the compiler. The focus of this thesis is to provide efficient support for various kinds of parallelism while ensuring correctness. The compiler is designed to support fine-grained task level parallelism that exists across iterations of loops and function calls. Additionally, compiler can also support pipeline parallelism, where a loop is split into multiple stages that execute in a pipelined manner. The prototype compiler, which targets multiple instances of a CGRA, is demonstrated in this thesis. We used this compiler to target multiple variants of CGRAs employing dataflow execution paradigm. We varied the reconfigur-able fabric, orchestration mechanism employed, size of instruction buffers. We also choose applications from two different domains viz. cryptography and linear algebra. The execution time of the CGRA (the best among all instances) is compared against an Intel Quad core processor. Cryptography applications show a performance improvement ranging from more than one order of magnitude to close to two orders of magnitude. These applications have large amounts of ILP and our compiler could successfully expose the ILP available in these applications. Further, the domain customization also played an important role in achieving good performance. We employed two custom functional units for accelerating Cryptography applications and compiler could efficiently use them. In linear algebra kernels we observe multiple iterations of the loop executing in parallel, effectively exploiting loop-level parallelism at runtime. Inspite of this we notice close to an order of magnitude performance degradation. The reason for this degradation can be attributed to the use of non-pipelined floating point units, and the delays involved in accessing memory. Pipeline parallelism was demonstrated using this compiler for FFT and QR factorization. Thus, the compiler is capable of efficiently supporting different kinds of parallelism and can support complete C89 standard. Further, the compiler can also support different instances of CGRAs employing dataflow execution paradigm.

Globally Asynchronous Locally Synchronous (GALS) Field-Programmable Gate Array (FPGA) are composed of standard synchronous reconfigurable logic islands that communicate with each other via an asynchronous means. Past research into fully asynchronous FPGA has demonstrated high throughput and reliability adopting dual-rail encoding. GALS FPGAs have been proposed, relying on bundled-data encoding and fixed asynchronous communication between synchronous islands. This thesis proposes a new GALS FPGA architecture with fully reconfigurable asynchronous fabric, that relies on coarse-grained Configurable Logic Blocks (CLBs) to improve the communication capability of the device. Through datapath dedicated elements, asynchronous pipelines are efficiently mapped onto the device. The architecture is presented as well as the customized tool flow needed to compile Verilog for this new coarse-grained reconfigurable circuit.The main purpose of this thesis is to map communication-purpose user-circuits on the proposed asynchronous fabric and evaluate their performance. The benchmark circuits target the design of a Networkon-Chip (NoC) router and employ two-phase bundled-data protocol. The results are obtained through simulation and compared with the performances of the same circuits on a fine-grained classical FPGA style. The proposed architecture achieves up to 3.2x higher throughput and 2.9x lower latency than the classical one. The results show that the coarse-grained style efficiently maps asynchronous communication circuits, and it may be the starting point for future reconfigurable GALS systems. Future work should focus on improving the back-end synthesis and evaluating the FPGA GALS system as a whole. / Globala Asynkrona Lokalt Synkrona (GALS) FPGAer består av standardiserade synkrona rekonfigurerbara logiska öar som kommunicerar med varandra på ett asynkront sätt. Tidigare forskning om helt asynkrona FPGAer har demonstrerat att hög genomströmning och tillförlitlighet kan erhållas mha sk dual-rail kodning. GALS FPGA har också föreslagits, där man istället förlitar sig på kodad data och fast asynkron kommunikation mellan synkrona öar. Denna avhandling föreslår en ny GALS FPGA-arkitektur med en omkonfigurerbar asynkron struktur, bestående av sk Coarse-grained CLBs för att förbättra kommunikationsförmågan på enheten. Genom att datavägarna använder sig av dedikerade element, kan asynkrona pipelines mappas effektivt på enheten. Arkitekturen presenteras liksom det verktygsflöde som behövs för att kompilera Verilog för denna nya grovkornigt omkonfigurerbara krets.Huvudsyftet med denna avhandling är att mappa kommunikationskretsar på den föreslagna asynkrona strukturen och utvärdera dess prestanda. Referenskretsarna som används för utvärdering är en NoC router som använder sig av ett tvåfas kommunikationsprotokoll. Resultaten erhålls genom simulering och jämförs med prestanda av samma krets implementerad i en finkornig klassisk FPGA-stil. Den föreslagna arkitekturen uppnår ca 3.2x högre genomströmning och 2.9x lägre latens än den klassiska. Resultaten visar att en grovkornig stil kan mappa asynkrona kommunikationskretsar på ett effektivt sätt, och att det kan vara en bra utgångspunkt för framtida omkonfigurerbara GALS-system.Framtida arbete bör fokusera på att förbättra back-end-syntesen och att utvärdera FPGA GALS-systemet i sin helhet.