<div> <div> <div> <p>In this thesis, two aspects of video coding improvement are discussed, namely error resilience and coding efficiency. </p> <p>With the increasing amount of videos being created and consumed, better video compression tools are needed to provide reliable and fast transmission. Many popular video coding standards such as VPx, H.26x achieve video compression by using spa- tial and temporal dependencies in the source video signal. This makes the encoded bitstream vulnerable to errors during transmission. In this thesis, we investigate an error resilient video coding for the VP9 bitstreams using error resilience packets. An error resilient packet consists of encoded keyframe contents and the prediction sig- nals for each non-keyframe. Experimental results exhibit that our proposed method is effective under typical packet loss conditions. </p> <p>In the second part of the thesis, we first present an automatic stillness feature detection method for group of pictures. The encoder adaptively chooses the coding structure for each group of pictures based on its stillness feature to optimize the coding efficiency. </p> <p>Secondly, a content-based video coding method is proposed. Modern video codecs including the newly developed AOM/AV1 utilize hybrid coding techniques to remove spatial and temporal redundancy. However, the efficient exploitation of statistical dependencies measured by a mean squared error (MSE) does not always produce the best psychovisual result. One interesting approach is to only encode visually relevant information and use a different coding method for “perceptually insignificant” regions </p> </div> </div> <div> <div> <p>xiv </p> </div> </div> </div> <div> <div> <div> <p>in the frame. In this thesis, we introduce a texture analyzer before encoding the input sequences to identify detail irrelevant texture regions in the frame using convolutional neural networks. The texture region is then reconstructed based on one set of motion parameters. We show that for many standard test sets, the proposed method achieved significant data rate reductions. </p> </div> </div> </div>

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Ce mémoire propose un algorithme de compression sans perte des indices binaires d'un quantificateur algébrique encastré utilisé par le codec AMR-WB+ pour encoder certaines des trames d'un signal audio. Une étude détaillée des statistiques a été menée dans le but de développer un algorithme efficace de compression et réduire par conséquent la longueur moyenne du code binaire utilisé par le codec AMR-WB+. En se basant sur cette étude des statistiques, deux techniques ont été combinées : l'encodage par plage et l'encodage par contexte qui se sont montrés très efficaces pour estimer les probabilités des différents indices. En utilisant l'encodage arithmétique en version entière pour générer le code binaire, l'algorithme proposé permet de réduire sans perte jusqu'à 10% de la longueur du code utilisé par le AMR-WB+ tout en respectant la contrainte d'une application temps réel destinée à des terminaux GSM.

ITC/USA 2010 Conference Proceedings / The Forty-Sixth Annual International Telemetering Conference and Technical Exhibition / October 25-28, 2010 / Town and Country Resort & Convention Center, San Diego, California / Synchronized video is crucial for data acquisition and telecommunication applications. For real-time applications, out-of-sync video may cause jitter, choppiness and latency. For data analysis, it is important to synchronize multiple video channels and data that are acquired from PCM, MIL-STD-1553 and other sources. Nowadays, video codecs can be easily obtained to play most types of video. However, a great deal of effort is still required to develop the synchronization methods that are used in a data acquisition system. This paper will describe several methods that TTC has adopted in our system to improve the synchronization of multiple data sources.

This report presents an exhibition all steps taken to implement a Laboratory of Plant Repairs Phone Cards. First are listed the issues that are missing from a laboratory to repair cards ATT call center technology. And no time to meet orders and preventive maintenance improvements and corrective. The lab is available to repair, diagnose and maintain the various cards that use technology call centers ATT - 5ESS. Besides being the burden that has more power, approximately 65% of full capacity at the national level. It also is taken into account the degree of quality of repairs and improvements to be made. Taking control and labeling of the cards and man hours worked, why are never short of supplies. Also be taken into account repair costs and inconvenience we have with the provider. And they must take into account the backs of phone cards have to be central in stock to operate smoothly and efficiently. At the end of this report presents recommendations and conclusions of the achievements in implementing this laboratory for repairs. Report called: “Operation, Repair and Maintenance of Central Telephone Cards” / Este informe expositivo presenta todos los pasos seguidos para poner en funcionamiento un Laboratorio de Reparaciones de Tarjetas de Centrales Telefónicas. Primero se enumeran las problemáticas que se tienen por falta de un laboratorio para reparar tarjetas de centrales telefónicas de tecnología ATT. Y no poder atender a tiempo los pedidos y mejoras de mantenimiento preventivo y correctivo. Dicho laboratorio se encargara de Reparar, Diagnosticar y dar Mantenimiento a las diferentes tarjetas que usan las Centrales Telefónicas de tecnología ATT - 5ESS. Además de ser la que tiene más carga de centrales, aproximadamente el 65% de toda su capacidad a nivel nacional. .Así mismo se tomara en cuenta el grado de calidad de las reparaciones y las mejoras a hacerse .Llevando un control y etiquetado de las tarjetas y horas hombre trabajadas, para qué nunca estén desabastecidas. Además se tomará en cuenta los costos de reparación y los inconvenientes que se tienen con el proveedor. Y se debe tener en cuenta los respaldos de tarjetas telefónicas de centrales que deban de tener en almacén para operar en forma ordenada y eficiente. Al final de este informe se presentan recomendaciones y conclusiones de lo realizado en la implementación de este laboratorio de Reparaciones. Informe que denominamos: “Operación, Reparación y Mantenimiento de Tarjetas de Centrales Telefónicas”

Mobile devices such as PDAs and cellular phones became indispensible part of business and entertainment world. There are a number of applications run on these devices and they tend to increase day by day causing devices tend to consume more battery power. H.264/AVC is an emerging video compression standard that is likely to be used widely in multimedia environments. As a mobile application, video compression algorithm of H.264 standard has a complex structure that increase the power demand of realizing hardware. In order to reduce this power demand, power consuming parts of the algorithm like deblocking filter and transform&amp / quantization need to be specifically changed for low power application. A low power deblocking filter and inverse transform/quantization algorithm for H.264/AVC decoder is to be proposed and implemented on FPGA.

<p>Todays’ systems for telecommunication are getting more and more complex. Automatic testing is required to guarantee quality of the systems produced. An actual example is the introduction of GPRS traffic in the GSM network nodes. This thesis investigates the need and demands for such an automatic testing of the traffic channels in the GSM system. A solution intended to be a part of the Ericsson TSS is proposed. One problem to be solved is that today’s tools for testing do not support testing of speech channels with the speech transcoder unit installed. As part of the investigation, a speech codec is implemented for execution on current hardware used in the test platform. The selected speech codec is the enhanced full rate codec, generating a bitstream of 12.2 kbit/s, and gives a good trade-off between compression and speech quality. The report covers the design of the test tool and the implementation of speech codec. Particularly performance problems in the implementation of the encoder will be addressed.</p>

Η εργασία αφορά ένα ειδικό είδος κωδικοποίησης εντοπισμού και διόρθωσης λαθών, την κωδικοποίση Reed-Solomon. Οι κώδικες αυτού του είδους χρησιμοποιούνται σε τηλεπικοινωνιακές εφαρμογές (ενσύρματη τηλεφωνία, ψηφιακή τηλεόραση, ευρυζωνικές ασύρματες επικοινωνίες) και σε συστήματα ψηφιακής αποθήκευσης (οπτικοί, μαγνητικοί δίσκοι). Η κωδικοποίηση Reed-Solomon βασίζεται σε μία ειδική κατηγορία αριθμητικών πεδίων τα πεδία Galois (Galois Field). Στα πλαίσια της εργασίας πραγματοποιήθηκε μελέτη των ιδιοτήτων των πεδίων Galois. και σχεδιάστηκε κωδικοποιητής-αποκωδικοποιητής για κώδικες Reed Solomon. Η σχεδίαση υλοποιήθηκε σε υλικό (hardware) σε γλώσσα Verilog HDL. Η σύνθεση των κυκλωμάτων πραγματοποιήθηκε με τεχνολογία Πεδίων Προγραμματιζόμενων Πινάκων Πυλών (τεχνολογία FPGA) και τεχνολογία Ολοκληρωμένων Κυκλωμάτων Ειδικού Σκοπού (τεχνολογία ASIC). Ακολουθήθηκε η μεθοδολογία σχεδιασμού Μονάδων Διανοητικής Ιδιοκτησίας για ολοκληρωμένα κυκλώματα (IP core), σύμφωνα με την οποία η σχεδίαση είναι ανεξάρτητη της πλατφόμας υλοποίησης και μπορεί να υλοποιηθεί με καθόλου ή ελάχιστες αλλαγές σε διαφορετικές τεχνολογίες. Η έννοια των IP core βρίσκει ιδιαίτερη εφαρμογή σε Συστήματα σε Ολοκληρωμένα Κυκλώματα (System on Chip). / The present work is about a specific group of error detection and correction codes, the Reed-Solomon codes. Such codes are used in telecommunications applications (wire telephony, digital television, broadband wireless communications) and digital storage systems (optical, magnetic disks). The Reed Solomon codes are based on a specific category of numerical fields, called Galois Fields. The Work consists of the study of the properties of Galois fields and of the design of an codec for Reed Solomon codes. The design was implemented in hardware with the use of Verilog HDL language. The synthesis of the circuit targets Field programmable Gate Array (FPGA) and Applications Specific Integrated Circuit (ASIC) technologies. The design methodology for Intellectual Property Units for integrated circuits (IP cores) was used. According to that methodology the design is platform independent and consequently the implementation can be achieved with minimal or no changes in different technologies. The IP cores model is widely applied in Systems on Integrated Circuits (System on Chips).

Examensarbetet bakom denna rapport utgör en undersökande studie om hur transmission av mediadata i nätverk kan göras effektivare. Det kan åstadkommas genom att viss tilläggsinformation avsedd för att jämna ut datatakten adderas i det realtidsprotokoll, Real Time Protocol, som används för strömmande media. Genom att försöka skicka lika mycket data under alla konsekutiva tidsintervall i sessionen kommer datatakten vid en godtycklig tidpunkt med större sannolikhet att vara densamma som vid tidigare klockslag. En streamingserver kan tolka, hantera och skicka data vidare enligt instruktionerna i protokollets sidhuvud. Datatakten jämnas ut genom att i förtid, under tidsintervall som innehåller mindre data, skicka även senare data i strömmen. Resultatet av detta är en utjämnad datataktskurva som i sin tur leder till en jämnare användning av nätverkskapaciteten. Arbetet inkluderar en översiktlig analys av beteendet hos strömmande media, bakgrundsteori om filkonstruktion och nätverksteknologier samt ett förslag på hur mediafiler kan modifieras för att uppfylla syftet med examensarbetet. Resultat och diskussion kan förhoppningsvis användas som underlag för en framtida implementation av en applikation ämnad att förbättra trafikflöden över nätverk.

The market of portable digital audio players (DAPs) have literally exploded the last couple of years. Other markets has grown as well. PDAs, GPS receivers, mobile phones, and so on. This resulted in more advanced ICs and SoCs becoming publically available, eliminating the need for in-house ASICs, thus enableing smaller actors to enter the markets. This thesis explores the possibilities of developing a low power, hand-held device on a very limited budget and strict time scale. This thesis report also covers all the steps taken in the development procedure.