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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
41

An FPGA Based Software/Hardware Codesign for Real Time Video Processing : A Video Interface Software and Contrast Enhancement Hardware Codesign Implementation using Xilinx Virtex II Pro FPGA

Wang, Jian January 2006 (has links)
<p>Xilinx Virtex II Pro FPGA with integrated PowerPC core offers an opportunity to implementing a software and hardware codesign. The software application executes on the PowerPC processor while the FPGA implementation of hardware cores coprocess with PowerPC to achieve the goals of acceleration. Another benefit of coprocessing with the hardware acceleration core is the release of processor load. This thesis demonstrates such an FPGA based software and hardware codesign by implementing a real time video processing project on Xilinx ML310 development platform which is featured with a Xilinx Virtex II Pro FPGA. The software part in this project performs video and memory interface task which includes image capture from camera, the store of image into on-board memory, and the display of image on a screen. The hardware coprocessing core does a contrast enhancement function on the input image. To ease the software development and make this project flexible for future extension, an Embedded Operating System MontaVista Linux is installed on the ML310 platform. Thus the software video interface application is developed using Linux programming method, for example the use of Video4Linux API. The last but not the least implementation topic is the software and hardware interface, which is the Linux device driver for the hardware core. This thesis report presents all the above topics of Operating System installation, video interface software development, contrast enhancement hardware implementation, and hardware core’s Linux device driver programming. After this, a measurement result is presented to show the performance of hardware acceleration and processor load reduction, by comparing to the results from a software implementation of the same contrast enhancement function. This is followed by a discussion chapter, including the performance analysis, current design’s limitations and proposals for improvements. This report is ended with an outlook from this master thesis.</p>
42

Hardware accelerators for embedded fingerprint-based personal recognition systems

Fons Lluís, Mariano 29 May 2012 (has links)
Abstract The development of automatic biometrics-based personal recognition systems is a reality in the current technological age. Not only those operations demanding stringent security levels but also many daily use consumer applications request the existence of computational platforms in charge of recognizing the identity of one individual based on the analysis of his/her physiological and/or behavioural characteristics. The state of the art points out two main open problems in the implementation of such applications: on the one hand, the needed reliability improvement in terms of recognition accuracy, overall security and real-time performances; and on the other hand, the cost reduction of those physical platforms in charge of the processing. This work aims at finding the proper system architecture able to address those limitations of current personal recognition applications. Embedded system solutions based on hardware-software co-design techniques and programmable (and run-time reconfigurable) logic devices under FPGAs or SOPCs is proven to be an efficient alternative to those existing multiprocessor systems based on HPCs, GPUs or PC platforms in the development of that kind of high-performance applications at low cost / El desenvolupament de sistemes automàtics de reconeixement personal basats en tècniques biomètriques esdevé una realitat en l’era tecnològica actual. No només aquelles operacions que exigeixen un elevat nivell de seguretat sinó també moltes aplicacions quotidianes demanen l’existència de plataformes computacionals encarregades de reconèixer la identitat d’un individu a partir de l’anàlisi de les seves característiques fisiològiques i/o comportamentals. L’estat de l’art de la tècnica identifica dues limitacions importants en la implementació d’aquest tipus d’aplicacions: per una banda, és necessària la millora de la fiabilitat d’aquests sistemes en termes de precisió en el procés de reconeixement personal, seguretat i execució en temps real; i per altra banda, és necessari reduir notablement el cost dels sistemes electrònics encarregats del processat biomètric. Aquest treball té per objectiu la cerca de l’arquitectura adequada a nivell de sistema que permeti fer front a les limitacions de les aplicacions de reconeixement personal actuals. Es demostra que la proposta de sistemes empotrats basats en tècniques de codisseny hardware-software i dispositius lògics programables (i reconfigurables en temps d’execució) sobre FPGAs o SOPCs resulta ser una alternativa eficient en front d’aquells sistemes multiprocessadors existents basats en HPCs, GPUs o plataformes PC per al desenvolupament d’aquests tipus d’aplicacions que requereixen un alt nivell de prestacions a baix cost. / El desarrollo de sistemas automáticos de reconocimiento personal basados en técnicas biométricas se ha convertido en una realidad en la era tecnológica actual. No tan solo aquellas operaciones que requieren un alto nivel de seguridad sino también muchas otras aplicaciones cotidianas exigen la existencia de plataformas computacionales encargadas de verificar la identidad de un individuo a partir del análisis de sus características fisiológicas y/o comportamentales. El estado del arte de la técnica identifica dos limitaciones importantes en la implementación de este tipo de aplicaciones: por un lado, es necesario mejorar la fiabilidad que presentan estos sistemas en términos de precisión en el proceso de reconocimiento personal, seguridad y ejecución en tiempo real; y por otro lado, es necesario reducir notablemente el coste de los sistemas electrónicos encargados de dicho procesado biométrico. Este trabajo tiene por objetivo la búsqueda de aquella arquitectura adecuada a nivel de sistema que permita hacer frente a las limitaciones de los sistemas de reconocimiento personal actuales. Se demuestra que la propuesta basada en sistemas embebidos implementados mediante técnicas de codiseño hardware-software y dispositivos lógicos programables (y reconfigurables en tiempo de ejecución) sobre FPGAs o SOPCs resulta ser una alternativa eficiente frente a aquellos sistemas multiprocesador actuales basados en HPCs, GPUs o plataformas PC en el ámbito del desarrollo de aplicaciones que demandan un alto nivel de prestaciones a bajo coste
43

Kostenmodellierung mit SystemC/System-AMS

Markert, Erik, Wang, Hailu, Herrmann, Göran, Heinkel, Ulrich 08 June 2007 (has links) (PDF)
In diesem Beitrag wird eine Methode zur Beschreibung von Kostenfaktoren und deren Verknüpfung über Hierarchiegrenzen hinweg dargestellt. Sie eignet sich sowohl für rein digitale Systeme mit Softwareanteilen als auch für gemischt analog/digitale Systeme. Damit ist sie im Hardware-Software Codesign und im Analog-Digital Codesign zum Vergleich verschiedener Systemkompositionen anwendbar. Die Implementierung mit C++ ermöglicht neben einer Nutzung mit digitalem SystemC auch den Einsatz mit der analogen SystemC-Erweiterung SystemC-AMS und vereinfacht die Nutzung gegenüber einer vorhandenen VHDL-Implementierung. Als Anwendungsbeispiel fungieren Komponenten eines Systems zur Inertialnavigation.
44

Intégration d'un système d'exploitation dans le flot de développement logiciel/matériel

Julien, Marc January 2008 (has links)
Mémoire numérisé par la Division de la gestion de documents et des archives de l'Université de Montréal
45

An FPGA Based Software/Hardware Codesign for Real Time Video Processing : A Video Interface Software and Contrast Enhancement Hardware Codesign Implementation using Xilinx Virtex II Pro FPGA

Wang, Jian January 2006 (has links)
Xilinx Virtex II Pro FPGA with integrated PowerPC core offers an opportunity to implementing a software and hardware codesign. The software application executes on the PowerPC processor while the FPGA implementation of hardware cores coprocess with PowerPC to achieve the goals of acceleration. Another benefit of coprocessing with the hardware acceleration core is the release of processor load. This thesis demonstrates such an FPGA based software and hardware codesign by implementing a real time video processing project on Xilinx ML310 development platform which is featured with a Xilinx Virtex II Pro FPGA. The software part in this project performs video and memory interface task which includes image capture from camera, the store of image into on-board memory, and the display of image on a screen. The hardware coprocessing core does a contrast enhancement function on the input image. To ease the software development and make this project flexible for future extension, an Embedded Operating System MontaVista Linux is installed on the ML310 platform. Thus the software video interface application is developed using Linux programming method, for example the use of Video4Linux API. The last but not the least implementation topic is the software and hardware interface, which is the Linux device driver for the hardware core. This thesis report presents all the above topics of Operating System installation, video interface software development, contrast enhancement hardware implementation, and hardware core’s Linux device driver programming. After this, a measurement result is presented to show the performance of hardware acceleration and processor load reduction, by comparing to the results from a software implementation of the same contrast enhancement function. This is followed by a discussion chapter, including the performance analysis, current design’s limitations and proposals for improvements. This report is ended with an outlook from this master thesis.
46

A hardware/software codesign for the chemical reactivity of BRAMS / Um coprojeto de hardware/software para a reatividade química do BRAMS

Carlos Alberto Oliveira de Souza Junior 05 June 2017 (has links)
Several critical human activities depend on the weather forecasting. Some of them are transportation, health, work, safety, and agriculture. Such activities require computational solutions for weather forecasting through numerical models. These numerical models must be accurate and allow the computers to process them quickly. In this project, we aim at migrating a small part of the software of the weather forecasting model of Brazil, BRAMS Brazilian developments on the Regional Atmospheric Modelling System to a heterogeneous system composed of Xeon (Intel) processors coupled to a reprogrammable circuit (FPGA) via PCIe bus. According to the studies in the literature, the chemical equation from the mass continuity equation is the most computationally demanding part. This term calculates several linear systems Ax = b. Thus, we implemented such equations in hardware and provided a portable and highly parallel design in OpenCL language. The OpenCL framework also allowed us to couple our circuit to BRAMS legacy code in Fortran90. Although the development tools present several problems, the designed solution has shown to be viable with the exploration of parallel techniques. However, the performance was below of what we expected. / Várias atividades humanas dependem da previsão do tempo. Algumas delas são transporte, saúde, trabalho, segurança e agricultura. Tais atividades exigem solucões computacionais para previsão do tempo através de modelos numéricos. Estes modelos numéricos devem ser precisos e ágeis para serem processados no computador.Este projeto visa portar uma pequena parte do software do modelo de previsão de tempo do Brasil, o BRAMSBrazilian developments on the Regional Atmospheric Modelling Systempara uma arquitetura heterogênea composta por processadores Xeon (Intel) acoplados a um circuito reprogramável em FPGA via barramento PCIe. De acordo com os estudos, o termo da química da equação de continuidade da massa é o termo mais caro computacionalmente. Este termo calcula várias equações lineares do tipo Ax = b. Deste modo, este trabalho implementou estas equações em hardware, provendo um ´codigo portável e paralelo na linguagem OpenCL. O framework OpenCL também nos permitiu acoplar o código legado do BRAMS em Fortran90 junto com o hardware desenvolvido. Embora as ferramentas de desenvolvimento tenham apresentado vários problemas, a solução implementada mostrou-se viável com a exploração de técnicas de paralelismo. Entretando sua perfomance ficou muito aquém do desejado.
47

O Espaço do Brincar : um estudo sobre o Codesign Pedagógico para Ambientes Virtuais

Carvalho, Francisco Rogério de 29 December 2016 (has links)
Submitted by Divisão de Documentação/BC Biblioteca Central (ddbc@ufam.edu.br) on 2017-03-14T09:34:50Z No. of bitstreams: 2 license_rdf: 0 bytes, checksum: d41d8cd98f00b204e9800998ecf8427e (MD5) Dissertação - Francisco R. Carvalho.pdf: 3059764 bytes, checksum: 43cfd6a0ab9e99c075640a3da125523c (MD5) / Approved for entry into archive by Divisão de Documentação/BC Biblioteca Central (ddbc@ufam.edu.br) on 2017-03-14T09:38:39Z (GMT) No. of bitstreams: 2 license_rdf: 0 bytes, checksum: d41d8cd98f00b204e9800998ecf8427e (MD5) Dissertação - Francisco R. Carvalho.pdf: 3059764 bytes, checksum: 43cfd6a0ab9e99c075640a3da125523c (MD5) / Approved for entry into archive by Divisão de Documentação/BC Biblioteca Central (ddbc@ufam.edu.br) on 2017-03-14T09:39:00Z (GMT) No. of bitstreams: 2 license_rdf: 0 bytes, checksum: d41d8cd98f00b204e9800998ecf8427e (MD5) Dissertação - Francisco R. Carvalho.pdf: 3059764 bytes, checksum: 43cfd6a0ab9e99c075640a3da125523c (MD5) / Made available in DSpace on 2017-03-14T09:39:00Z (GMT). No. of bitstreams: 2 license_rdf: 0 bytes, checksum: d41d8cd98f00b204e9800998ecf8427e (MD5) Dissertação - Francisco R. Carvalho.pdf: 3059764 bytes, checksum: 43cfd6a0ab9e99c075640a3da125523c (MD5) Previous issue date: 2016-12-29 / The technological revolution, leveraged by globalization, was one of the most farreaching changes in history, and education was not left out of this reality as many researchers, professionals and collaborators began to search for creations involving technology allied to education. Teaching and learning in a dynamic, attractive and efficient way. The diverse actors who work behind the scenes of new information and communication technologies - ICTs with a focus on education, often forget important elements in the process of designing such technological resources, especially with regard to planning, the form of collective work and the Recognition of the cultural differences of the target audience when creating tools to support teaching. In this work, the innovative collaborative work model: Codesign is applied in a case study, in the construction of a virtual toy room called Espaço do Brincar, whose development takes place in the Centro de Formação Continuada, desenvolvimento de Tecnologia e Prestação de Serviços para a Rede Pública de Ensino – CEFORT, Faculty of Education, Universidade Federal do Amazonas - UFAM and presents an innovative strategy for conceptions of projects to create technological mediations. By means of empirical and participative observation without leaving aside the theoretical support, the research results in a pioneering experience of collaborative work applied in the development of technological mediators of the learning for the platform Moodle, articulating with the actor-network theory in which, human actors And non-human actors, to a complex but comprehensive movement of ideas development and decision making that favors the teaching and learning process in a more efficient, clear and humanized way. / A revolução tecnológica, alavancada pela globalização, foi uma das mais abrangentes mudanças ocorridas na história e a educação não ficou de fora dessa realidade pois muitos pesquisadores, profissionais e colaboradores passaram a esmerar-se na busca por criações que envolvam tecnologia aliada à educação com o intuito de promover o ensino e aprendizagem de forma dinâmica, atrativa e eficiente. Os diversos atores que agem nos bastidores das novas tecnologias de informação e comunicação - TICs com foco na educação, muitas vezes olvidam elementos importantes no processo de concepção de tais recursos tecnológicos, especialmente no que se refere ao planejamento, à forma de trabalho coletivo e ao reconhecimento das diferenças culturais do público-alvo, quando da criação de ferramentas de apoio ao ensino. Neste trabalho, o modelo inovador de trabalho colaborativo: Codesign é aplicado em um estudo de caso, na construção de uma brinquedoteca virtual denominada Espaço do Brincar, cujo desenvolvimento se dá no Centro de Formação Continuada, desenvolvimento de Tecnologia e Prestação de Serviços para a Rede Pública de Ensino – CEFORT, da Faculdade de Educação da Universidade Federal do Amazonas - UFAM e apresenta uma estratégia inovadora para as concepções de projetos de criação de mediações tecnológicos. Por meio de observação empírica e participativa sem deixar de lado o apoio teórico, a pesquisa resulta numa experiência pioneira de trabalho colaborativo aplicado no desenvolvimento de mediadores tecnológicos da aprendizagem para a plataforma Moodle, articulando-se coma teoria ator-rede em que, atores humanos e não humanos agem, para um complexo, porém abrangente movimento de desenvolvimento de ideias e tomada de decisões que favoreçam o processo de ensino e aprendizagem de forma mais eficiente, clara e humanizada.
48

Storytelling for intercultural dialogue: Experience design with unaccompanied minors from Afghanistan

Castillo Muñoz, Yénika January 2018 (has links)
This project explores storytelling tools for the collaborative work with persons in vulnerable situation, in this case, a group of unaccompanied minors from Afghanistan, living in Umeå, Sweden. The concept presented is the prototype of an eating experierence, BAHAM bolani: An idea for a social company where the participants are active into creating their own possibilities to stay in Sweden. With their own stories, they fill in the gap of how unaccompanied minors and asylum seekers are depicted in the dominant narrative. It is them providing meaning to the design concept. The theoretical approach is from a decolonising and feminist point of view, with collaborative design methods. In the discussion, I debate the need of more listening tools for the design community based on these theories, because they allow the designer to challenge their own cultural assumptions, and meet the participants in a more humble and equal way, especially when working with persons in vulnerable situations.
49

Community of Communities : Platform for political empowerment of permaculture groups

Veloso, Gelson January 2021 (has links)
This research investigates the potential of digital platforms to broaden the scope of action and empower permaculture communities in their attempt to challenge the capitalist mode of production regarding topics such as food harvesting and consumption patterns. It draws on Manzini’s (2018) critique of neoliberalism and his discussion on designing for social innovation, which suggests focusing on and enhancing existing members' capabilities rather than their needs; fostering cross-collaboration within and among communities; and allowing these collaborations to mature over time. It combines design thinking and co-design to develop further a previously existing proof of concept of a mapping platform that connects permaculture initiatives in Brazil. When it was created in 2018, this platform was tested by potential users who underscored severe usability limitations, and as a result, it was never fully implemented. This thesis discusses such limitations and proposes an improved platform to empower those communities by fostering collaboration beyond individuals and local groups towards regional communities.
50

Nástroj pro grafické prototypování systémů na čipu / Graphical Tool for Rapid Prototyping of System on the Chip

Netočný, Ondřej January 2013 (has links)
This thesis deals with design and implementing of a tool for development of MPSoC (multiprocessor systems on chip). It is going to apprise the reader with this matter and introduces several ways how to solve these issues in Codasip Studio IDE (integrated development environment). The graphical editor for multicore system development and a set of support tools for fast and effective development are introduced in this thesis. These are mainly interactive wizards which help user to start new projects. To handle the subject matter it is necessary to understand CodAL language, Eclipse IDE, GMF (Graphical Modeling Framework) and EMF (Eclipse Modeling Framework) which are used for graphical editor implementation.

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