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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
51

Codesigning a Physical Thirdspace in a Digital Setting for a Reimagined Community

Mauk, Karen Rebecca 21 April 2021 (has links)
No description available.
52

Utilizing Codesign to Create K-12 Online and Hybrid Learning Resources

Tadd S Farmer (11865212) 03 January 2022 (has links)
Instructional design is commonly referred to as the systematic process of creating consistent and reliable learning experiences (Branch & Merrill, 2011). Built on a foundation of learning theory and instructional design theory, instructional design relies heavily on various process models to guide design practice (Stefaniak & Xu, 2020) and to manage and communicate the process of design (Branch & Dousay, 2015). Despite their use, scholars argue that these models do not accurately represent instructional design practice (Bichelmeyer et al., 2006; Rowland, 1992; Smith & Boling, 2009; Visscher-Voerman & Gustafson, 2004; Wedman & Tessmer, 1993) and remain too focused on high-level processes rather than discrete methods and actions (Gibbons et al., 2014). In recent years, human-centered design (HCD) methods have emerged within instructional design practice, providing more methodological guidance for instructional designers within an empathetic design perspective (Stefaniak & Xu, 2020). HCD includes codesign practices (Steen, 2012)that seek to involve users directly throughout the design process. The current study explores the design experiences of 12 participant designers (e.g., teachers, digital coaches) who were purposely selected to engage in a seven-week codesign experience. Tasked with providing direction on resources designed to support K-12 teachers with online and hybrid teaching, these participant designers worked together to share previous teaching experiences, analyze teacher data, and identify and develop learning prototypes. Interviews with eight participant designers following the codesign experience revealed that participants viewed the project as open and ill-defined, lacking in a clear outcome and identified roles and responsibilities. As the codesign continued, participants described impactful moments that clarified the design project and shifted the design process to a focus on details. While the end product of design was described by participants generally, participants viewed their experiences and perspectives as their major contributions to the design process. Results from this investigation reveal important implications for design practice, education, and research.
53

FPGA-based Experiment Platform for Hardware-Software Codesign and Hardware Emulation

Nagaonkar, Yajuvendra 01 May 2006 (has links) (PDF)
An FPGA-based experiment platform for hardware-software codesign experiments was developed. The proposed platform would be used by an engineer who can be affiliated with academia, research or industry for codesign experiments or hardware emulation. The platform utilizes a combination of a microcontroller and a FPGA device to enable sufficient flexibility in exploring the design space to implement codesign experiments. The FPGA device operation is integrated with that of the microcontroller to provide an overall embedded solution for codesign experimentations. It is anticipated that the platform will be used in academia for educating the students the concepts of computer architecture and microprocessor design. Future work suggested includes development of performance metrics of hardware and software solutions, and in the partitioning stage of the codesign flow.
54

Applied HW/SW Co-design: Using the Kendall Tau Algorithm for Adaptive Pacing

Chee, Kenneth W 01 June 2013 (has links) (PDF)
Microcontrollers, the brains of embedded systems, have found their way into every aspect of our lives including medical devices such as pacemakers. Pacemakers provide life supporting functions to people therefore it is critical for these devices to meet their timing constraints. This thesis examines the use of hardware co-processing to accelerate the calculation time associated with the critical tasks of a pacemaker. In particular, we use an FPGA to accelerate a microcontroller’s calculation time of the Kendall Tau Rank Correlation Coefficient algorithm. The Kendall Tau Rank Correlation Coefficient is a statistical measure that determines the pacemaker’s voltage level for heart stimulation. This thesis explores three different hardware distributions of this algorithm between an FPGA and a pacemaker’s microcontroller. The first implementation uses one microcontroller to establish the baseline performance of the system. The next implementation executes the entire Kendall Tau algorithm on an FPGA with varying degrees of parallelism. The final implementation of the Kendall Tau algorithm splits the computational requirements between the microcontroller and FPGA. This thesis uses these implementations to compare system-level issues such as power consumption and other tradeoffs that arise when using an FPGA for co-processing.
55

Advocating for a More Democratic ProcessA critical analysis of codesign plenary sessions within a public project development

Lalonde, Simon January 2020 (has links)
No description available.
56

Engaging in Urban Living Lab Co-design

Ebbesson, Esbjörn January 2023 (has links)
Urban Living Labs (ULL) have become a common way to address wicked design challenges within the future mobility, and smart city context. The move toward ULL is part of a paradigm shift away from focusing purely on the IT-artifact, innovation, and user-centeredness toward focusing on the urban context and the construction of a place as a social context rather than implementation of a product or service in isolation. This shift requires diverse sets of stakeholders with different backgrounds to come together to address wicked design challenges collaboratively tied to specific urban contexts. However, the change toward ULLs also brings unique qualities to collaborations. For example, it is often hard to generalize or transfer findings from one ULL to another. In addition, it requires new modes of thinking and acting concerning the value of bottomup approaches anchored in context. Therefore, a core challenge for impactful work in an ULL, is to find ways to retain stakeholders’ local engagements and ways of doing collaborative design beyond the ULL project to create ripple effects. This thesis tweaks this challenge into a question that aims at investigating what a locally contextualized ULL set-up means for the involved stakeholders from a participatory perspective by asking: How can we understand engagement in ULL co-design, and how can this engagement be retained beyond the Living Lab? The question was explored through a design ethnographic approach in a ULL, where citizens, city representatives, car manufacturers, and representatives from public transport worked together to explore future mobility services. The research question is addressed through a description of how stakeholder engagement played out in the ULL along with an analysis of the dynamics of co-design as a co-appropriation process within the ULL, which enabled stakeholders to engage in a social context across sectors and disciplines to co-learn ways of appropriating findings from the ULL as an explorative way of working. Co-appropriation is described as a process moving from acclimatization towards cogitation in co-design, with patching as an activity that supports the process. The thesis also elaborates on how findings from a ULL can be retained and scaled beyond the Living Lab through transformation games, as an example of a patching activity.
57

RESOURCE-AWARE OPTIMIZATION TECHNIQUES FOR MACHINE LEARNING INFERENCE ON HETEROGENEOUS EMBEDDED SYSTEMS

Spantidi, Ourania 01 May 2023 (has links) (PDF)
With the increasing adoption of Deep Neural Networks (DNNs) in modern applications, there has been a proliferation of computationally and power-hungry workloads, which has necessitated the use of embedded systems with more sophisticated, heterogeneous approaches to accommodate these requirements. One of the major solutions to tackle these challenges has been the development of domain-specific accelerators, which are highly optimized for the computationally intensive tasks associated with DNNs. These accelerators are designed to take advantage of the unique properties of DNNs, such as parallelism and data locality, to achieve high throughput and energy efficiency. Domain-specific accelerators have been shown to provide significant improvements in performance and energy efficiency compared to traditional general-purpose processors and are becoming increasingly popular in a range of applications such as computer vision and speech recognition. However, designing these architectures and managing their resources can be challenging, as it requires a deep understanding of the workload and the system's unique properties. Achieving a favorable balance between performance and power consumption is not always straightforward and requires careful design decisions to fully exploit the benefits of the underlying hardware. This dissertation aims to address these challenges by presenting solutions that enable low energy consumption without compromising performance for heterogeneous embedded systems. Specifically, this dissertation will focus on three topics: (i) the utilization of approximate computing concepts and approximate accelerators for energy-efficient DNN inference,(ii) the integration of formal properties in the systematic employment of approximate computing concepts, and (iii) resource management techniques on heterogeneous embedded systems.In summary, this dissertation provides a comprehensive study of solutions that can improve the energy efficiency of heterogeneous embedded systems, enabling them to perform computationally intensive tasks associated with modern applications that incorporate DNNs without compromising on performance. The results of this dissertation demonstrate the effectiveness of the proposed solutions and their potential for wide-ranging practical applications.
58

Software Performance Estimation Techniques in a Co-Design Environment

Subramanian, Sriram 02 September 2003 (has links)
No description available.
59

Where/Why/How Do You FindMe? : Visualizing Situational Awareness During Search and Rescue Operations

Cinelli, Ester January 2022 (has links)
The intensity and frequency of hurricanes and storms increase due to climate change, leaving destruction in their trail. After a hurricane happens, it is fundamental to respond as quickly as possible, and Search and Rescue operations occur to limit human damage further. The operations take place in hostile environments and extreme situations, where speed and efficiency are essential. Indeed, rescuers must be able to have a shared mental model of the situation and act immediately. This study focuses on visualizing situational awareness in such environments to optimize decision-making.  This study has been conducted in collaboration with Frog design and Sony and is part of the broader project FindMe Tag, a system composed of a wearable device that tracks civilians’ location and biometric data. The tag is connected to an app for civilians to handle which data to share. The data is shared to the rescuers’ dashboard for optimizing Search and Rescue operations, which is the focus of this thesis.  Following a Research through Design approach, this thesis project aims to contribute to the interaction design field by proposing a way to visualize situational awareness during extreme and dynamic situations. The process resulted in a dashboard prototype to support Search and Rescue operations by providing a way to visualize data concerning civilians’ status and rescuers, communicate among teams, and encourage connectedness among civilians.
60

Étude et implantation d'algorithmes de compression vidéo optimisés H.264/AVC dans un environnement conjoint matériel et logiciel / Study and Implementation of Algorithms for H.264/AVC Compression in a Hardware and Software Environment

Kthiri, Moez 04 April 2012 (has links)
La contribution de cette thèse concerne le développement et la conception d’un système multimédia embarqué basé sur l’approche de conception conjointe matérielle/logicielle (codesign). Il en résulte ainsi la constitution d’une bibliothèque de modules IP (Intellectual Property) pour les applications vidéo. Dans ce contexte, une plateforme matérielle de validation a été réalisée servant au préalable à l’évaluation de l’approche de conception en codesign pour l’étude d’algorithmes de traitement vidéo. Nous nous sommes ainsi intéressés en particulier à l’étude et à l’implantation de la norme de décompression vidéo H.264/AVC. Pour la validation fonctionnelle, l’ensemble du développement a été réalisé autour d’une carte Xilinx à base d’un circuit programmable FPGA Xilinx Virtex-5en mettant en œuvre le processeur hardcore PowerPC du circuit programmable dans l’environnement logiciel Linux pour l’embarqué. Le décodeur H.264/AVC ainsi développé comporte différents accélérateurs matériels pour la transformation inverse ainsi que le filtre anti-blocs. Nous avons pu tester les performances au regard du respect des contraintes temporelles en intégrant une extension temps réel à la plateforme de validation suivant différentes conditions de stress du système. L’extension temps réel Xenomai fournit ainsi une réponse adéquate aux problématiques de charge du système et de maîtrise des contraintes temporelles inhérentes à tout système de traitement vidéo tout en autorisant aussi l’utilisation d’applications classiques mises en œuvre dans l’environnement standard Linux embarqué. / The main contribution of this thesis concerns the development and the design of an embedded system for multimedia based on the codesign approach (HW/SW). Towards this end, a library off lexible IP cores (Intellectual Property) for video applications was created. In this context, a hardware platform was used for evaluation of the codesign-based approach in order to study video processingalgorithms. Thus, we particularly focused on the study and the implementation of H.264/AVC decoder. For functional validation, the entire development was carried out around a FPGA Virtex-5 Xilinx board embedding a hardcore PowerPC processor running embedded Linux operating system. The H.264/AVC developed decoder consists of hardware accelerators for the inverse transformation and the deblocking filter. We evaluated the performances in terms of respect of temporal constraints by integrating a real-time extension to the validation platform under different stress conditions. The Xenomai real-time extension has proven its high performance level of compliance with hard real-time constraints. This extension offers a real solution for real-time behavior without limiting the use of conventional applications implemented traditionally in a time sharing environment.

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