In the current transmission system, the information bandwidth of the optical fiber communication system is limited by optical amplifier bandwidth, and more efficient use of bandwidth is a very important issue. Amplitude and phase shift keying (APSK) is an advanced modulation scheme to improve the spectral efficiency and can effectively increase the transmission capacity. Certainly, APSK format has a good potential for development. This master thesis is focusing on that to study the transmission performance of the APSK format using digital coherent receiver. As the extinction ratio (ER) of the amplitude shift keying (ASK) signal affects the performances of the ASK signal and phase shift keying (PSK) signal simultaneously, the effect of the ER on the APSK transmission performance was studied. The APSK format has the trade-off between the performances of both the ASK signal and the PSK signal through the ER of the ASK signal. To overcome this issue, a method named zero-nulling method had been proposed, and this method solved the trade-off issue properly. At first, the amendment is to modify the digital coherent receiver program, confirmed that the digital coherent receiver program can correctly resolve APSK signal. Second, in this master thesis, I set up a 500km long optical fiber to measure the transmission performance under APSK format, and try to use recirculating loop system to further increase the transmission distance to several thousand kilometers. Finally, by further modify the receiver program to achieve APSK modulation of the zero-nulling method, and can prove its feasibility.

In the current transmission systems, the transmission capacity is still not enough. The information bandwidth of the optical fiber communication system is limited by the optical amplifier bandwidth, and more efficient use of the bandwidth is a very important issue. Therefore, the amplitude and phase shift keying (APSK) is one attractive method of multi-bit per symbol modulation scheme to improve the spectral efficiency, and it can effectively increase the transmission capacity. To improve the capacity and the spectral efficiency, the advanced modulation format is effective, and the coherent detection scheme is also effective. However, an optical phase-locked loop (PLL) to lock the local oscillator (LO) phase and the signal phase required for the homodyne detection is still difficult to realize and it makes the receiver circuit complicated. Using the digital coherent receiver, the optical carrier phase information can be recovered by means of the digital signal processing (DSP), and this scheme enables to eliminate the optical PLL circuit by the phase estimation algorithm through the DSP. The stored data can be offline processed by using the MATLAB program. This master thesis is focusing on studying the transmission performance of the APSK format using the DSP in the digital coherent receiver. 497km transmission experiment has been conducted. Subsequently, the stored data are offline processed by the algorithms of the DSP. Then, the APSK performances between back-to-back and 497km transmission are compared.

The coherent optical fiber communication technology is attracting significant attentions in the world, because it can realize the spectrally efficient transmission system. One major difference between 1980¡¦s and the latest coherent technology is the utilization of the digital signal processing (DSP). In 1980¡¦s the optical phase locked loop (OPLL) was required to realize the homodyne detection, and it was significantly difficult to realize. The latest coherent technology utilizes the DSP in place of the OPLL to realize the homodyne detection, and it is much easier than the OPLL. The real-time realization of the DSP is still a problem. Because the DSP uses software to process the signal, it needs an extreme calculation power for the high-speed communication system. People always utilize the field programmable gate array (FPGA) to realize the real-time DSP, but the cost of the FPGA is too expensive for the commercial system at this moment. This master thesis intend to utilize commercially available personal computer (PC) contained a GPU calculation board to replace FPGA. It can reduce the cost of the coherent receiver. Also, this receiver is defined by the software rather than the hardware. It means that we can realize a flexible receiver defined by the software.

La tesi estudia el problema de la síntesi de freqüències en les bandes de freqüències de microones i ones mil·limètriques, i la seva aplicació al disseny dels oscil·ladors locals d'un receptor coherent per a la recepció de les *radiobalises que a 12, 20 i 30 GHz emetia el satèl·lit Olympus de l'Agència Espacial Europea (ESA), amb la finalitat de caracteritzar el comportament radioelèctric de l'atmosfera a aquestes freqüències, a partir de mesures d'atenuació i transpolarització sobre aquests senyals de test, tot això dintre del marc d'un experiment de propagació (OPEX) propiciat per l'agència.La tesi s'ha centrat en l'estudi dels sistemes de síntesis de freqüències utilitzats habitualment, i especialment en els de síntesi indirecta de freqüència basats en sistemes Phase Locked Loop (PLL) a freqüències de microones ja que són la base sobre la qual s'han dissenyat i construït els prototips de multiplicadors de freqüència que s'han desenvolupat, capaços de sintetitzar senyals en bandes de mil·limètriques, que en el nostre cas s'han restringit al marge de 1 a 29 GHz.Alguns dels multiplicadors fan ús de la detecció de fase harmònica, sistema que permet realitzar multiplicacions de freqüència d'índex imparell, evitant la utilització de divisors de freqüència en el llaç de realimentació del PLL.La tesi s'estructura en quatre parts diferenciades. La primera, amb un caire eminentment teòric, s'ofereix a manera de revisió dels aspectes del soroll de fase i dels sistemes de síntesis de freqüències existents. La segona part aborda les qüestions derivades de la síntesi de freqüències en microones mitjançant PLL's, amb descripció dels components utilitzats, per a passar a tractar dels aspectes de disseny d'un receptor coherent, els seus requisits i aplicacions. En la tercera part es presenten els multiplicadors de freqüència realitzats, la seva descripció, esquema de blocs i resultats experimentals obtinguts. I finalment, en la quarta part s'inclouen una sèrie de realitzacions derivades de la utilització de sistemes PLL a freqüències de microones, amb sincronització per injecció del VCO al senyal de referència, en aplicacions de combinació de potència i de control electrònic de fase en sistemes phased-arrays amb elements actius. / La tesis estudia el problema de la síntesis de frecuencias en las bandas de frecuencias de microondas y ondas milimétricas, y su aplicación al diseño de los osciladores locales de un receptor coherente para la recepción de las radiobalizas que a 12, 20 y 30 GHz emitía el satélite Olympus de la Agencia Espacial Europea (ESA), con la finalidad de caracterizar el comportamiento radioeléctrico de la atmósfera a estas frecuencias, a partir de medidas de atenuación y transpolarización sobre esas señales de test, todo ello dentro del marco de un experimento de propagación (OPEX) propiciado por la agencia.La tesis se ha centrado en el estudio de los sistemas de síntesis de frecuencias utilizados habitualmente, y en especial en los de síntesis indirecta de frecuencia basados en sistemas Phase Locked Loop (PLL) a frecuencias de microondas puesto que son la base sobre la que se sustentan los prototipos de multiplicadores de frecuencia que se han desarrollado, capaces de sintetizar señales en bandas milimétricas, que en nuestro caso se han restringido al margen de 1 a 29 GHz.Algunos de los multiplicadores hacen uso de la detección de fase armónica, sistema que permite realizar multiplicaciones de frecuencia de índice impar, evitando el empleo de divisores de frecuencia en el lazo de realimentación del PLL.La tesis se estructura en cuatro partes diferenciadas. La primera, con un cariz eminentemente teórico, se ofrece a modo de revisión del tema del ruido de fase y de los sistemas de síntesis de frecuencias existentes. La segunda parte aborda las cuestiones derivadas de la síntesis de frecuencias en microondas mediante PLL's, con descripción de los componentes utilizados, para pasar a tratar de los aspectos de diseño de un receptor coherente, sus requisitos y aplicaciones. En la tercera parte se presentan los multiplicadores de frecuencia realizados, su descripción, esquema de bloques y resultados experimentales obtenidos. Y por último, en la cuarta parte se incluyen una serie de realizaciones derivadas de la utilización de sistemas PLL a frecuencias de microondas, con sincronización por inyección del VCO a la señal de referencia, en aplicaciones de combinación de potencia y de control electrónico de fase en sistemas phased-arrays con elementos activos. / The thesis studies the problem of the synthesis of frequencies in the microwave and millimeter waves frequency bands, and its application to the design of the local oscillators of a coherent receiver for the reception of the radio beacons that to 12, 20 and 30 GHz emitted the satellite Olympus from the European Space Agency (ESA), with the aim of characterizing the radio behavior of the atmosphere at these frequencies, from measurements of attenuation and transpolarisation on those signals of test, all that in the framework of a propagation experiment (OPEX) favored by the agency.The thesis has been focused on the study of the frequency synthesis systems, and especially on the indirect frequency synthesis systems based on Phase Locked Loops (PLL) at microwave frequencies, since they are the base on which the prototypes of frequency multipliers that they have been developed, capable of synthesizing signals in millimeter bands, are held that in our case they have restricted regardless of 1 to 29 GHz.Some of the multipliers make use of the harmonic phase detection system that allows carrying out frequency multiplications of odd index, preventing the use of frequency dividers in the feedback loop of the PLL.The thesis is structured in four differentiated parts. The first, with an eminently theoretical look, offers like revision of the subject of the phase noise and the methods of frequency synthesis. The second part tackles the questions derived from the synthesis of frequencies in microwaves through PLL's, with description of the used components, to pass to deal of the aspects of design of a coherent receiver, its requirements and applications. In the third part the frequency multipliers carried out, its description, schema of blocks and obtained experimental results are presented. And finally, in the fourth part a series of accomplishments are included phased-arrays derived of the use of systems PLL at frequencies of microwaves, with synchronization by injection of the VCO to the reference signal, in applications of power combination and of electronic phase control in systems with active elements.

Ce travail porte sur la conception, la fabrication et la caractérisation d’un photorécepteur cohérent en filière PIC InP pour les applications 100-400 Gbit/s. La solution retenue est un récepteur cohérent pré-amplifié par un SOA pour permettre d’améliorer la responsivité du récepteur par rapport à un récepteur cohérent classique. De plus, ce récepteur est réalisé en technologie enterrée pour permettre un fonctionnement sur une plus grande gamme de longueurs d’onde. Enfin, un récepteur cohérent non pré-amplifié est aussi réalisé pour pouvoir évaluer l’impact de l’intégration du SOA sur le fonctionnement de notre récepteur. La première partie de cette étude est consacrée à des rappels sur les transmissions optiques à très haut débit, à un état de l’art sur les récepteurs cohérents, à une présentation des différents photodétecteurs et à une présentation de l’hybrid 90° qui est le composant coeur des récepteurs cohérents. Dans un second temps, nous présentons les différents choix retenus pour la conception de notre récepteur. L’étude de deux hybrid 90° simulés en technologie ridge et en technologie enterrée est détaillée. Nous commentons également le choix des photodiodes ainsi que le choix du SOA utilisé pour notre composant. Le troisième chapitre est consacré aux différentes étapes technologiques permettant la fabrication de notre récepteur cohérent pré amplifié. Nous commençons par une description des différentes techniques d’épitaxie utilisées. Ensuite, nous présentons en détails les 22 étapes technologiques nécessaires pour réaliser notre récepteur. Enfin, nous regroupons l’ensemble des caractérisations réalisées sur notre récepteur cohérent. Après un rappel sur les différentes parties de celui-ci et de leurs performances clés, nous caractérisons les composants unitaires formant notre récepteur (mixeur cohérent, photodiodes UTC et SOA). Enfin nous présentons les caractéristiques statiques et dynamiques de notre récepteur et nous comparons ses performances avec celles de l’état de l’art. Ces travaux de thèse ont permis de démontrer la faisabilité d’un récepteur pré-amplifié utilisant un SOA intégré en technologie InP enterrée avec un record de responsivité de 5 A/W. Ceci représente un gain de 12,5 dB par rapport à un récepteur cohérent non amplifié idéal et un gain de 15,5 dB par rapport à l’état de l’art des récepteurs cohérents. De plus, la consommation engendrée par cette intégration reste très faible (240 mW). Enfin, nous avons démontré une démodulation à 32 Gbauds avec un facteur Q de 14 dB. La bande passante de 40 GHz de nos diodes est compatible avec des applications à 56 Gbauds et peut être améliorée pour des applications à 100 Gbauds en réduisant la taille des photodiodes. Ce travail de thèse ouvre donc le chemin pour de nouveaux récepteurs pré-amplifés par un SOA pour des applications à 400 Gbit/s / This work focuses on the design, manufacturing and characterization of a coherent photoreceptor in PiC InP for 100-400 Gbit/s applications. The chosen solution is a preamplified coherent receiver with an SOA to improve the responsivity compared to a conventional coherent receiver. In addition, this receiver is made in buried technology to allow operation over a wider range of wavelengths. Finally, a coherent receiver without SOA is also produced to be able to evaluate its impact on the performances of our receiver. The first part of this study is devoted to reminders about very high speed optical transmissions, about state of the art on coherent receivers, about a presentation of the different photodetectors and a presentation of the 90° hybrid which is the core component in coherent receivers. Secondly, we present the various choices made for the design of our receiver. The study of two 90° hybrids simulated in ridge or in buried technology is detailed. We also comment the choices of photodiodes and SOA used for our component. The third chapter is devoted to the different technological steps used to build our preamplified receiver. We start with a description of the different epitaxial techniques used. Then, we present in detail the 22 technological steps required to realize our receiver. Finally, we group all the characterizations preformed on our coherent receiver. We characterize the unitary components of our receiver (hybrid 90°, UTC photodiodes and SOA). Finally we present the static and dynamic characteristics of our receiver and we compare its performances with the state of the art. This thesis demonstrates the feasibility of a preamplified receiver using a SOA in buried InP technology with a record of reponsivity of 5 A/W. This represents a gain of 12.5 dB compared to an ideal coherent receiver and a gain of 15,5 dB compared to the state of the art. In addition, the consumption generated by this integration remains very low (240 mW). Finally, we have demonstrated a 32 Gbauds demodulation with a Q factor of 14dB and the 40 GHz bandwidth of our photodiodes is compatible with 56 Gbauds applications. It can be improved for 100 Gbauds applications by reducing the size of our photodiodes. This thesis opens the way for a new preamplified coherent receiver for 400 Gbit/s applications

Recent studies on growth of telecomm sector depict an ever rising demand for high bandwidth applications such as on-line gaming, high definition television and many more. This demand is coupled with increase in internet connected utilities per house hold - each requiring a portion of bandwidth. The fast development of broadband telecommunication services calls for an upgrade of access infrastructure. This challenge could be met by technologies such as Fiber-To-The-Home/Building (FTTH/B) point-to-multipoint (P2MP) optical access networking. Further, FTTH is also widely regarded as a future proof solution for broadband telecommunication services within scientific and industrial sectors. This has encouraged large amount of research and development throughout the globe to find optimal topologies for FTTH. OFDM based optical access network topology abbreviated as OTONES is an ongoing EU FP 7 project under the PIANO+ framework. The OTONES project addresses the next generation optical access networking on the basis of Orthogonal Frequency Division Multiplexing (OFDM) and Orthogonal Frequency Multiple Access (OFDMA), with special provision for reduced complexity and signal processing aspects of the subscriber side terminals (ONUs). This thesis focuses on the theoretical investigation of OFDM based optical access network topology OTONES. The thesis provides an in depth view of the salient aspects of the topology and formulates the key requirements of OTONES topology. The investigation primarily delves on two important aspects of the topology. First, finding the optimal analog circuitry for the optical network unit (ONU). Second, finding the optimal operation regime for the topology and hence optimizing the system level concept. In this thesis, we show that the requirement of an analog circuitry originates from the need of successive up-conversions in OTONES topology which also produces image spectrum. This image spectrum causes a 3 dB loss in power and spectral efficiency in absence of a proper image rejection circuitry. Thus, we discuss the generic SSB generation methods for efficient image rejection. Novel Bedrosian method based on Bedrosian Theorem is established as a promising method for image rejection. We show that this method is an analog implementation of Hilbert Transform Method and does not involve any approximation. Both generic methods for SSB along with the Novel Bedrosian method are evaluated based on the criterion established for OTONES topology. Finally, optical filtering from the set of generic SSB method is proposed for the downstream path and Novel Bedrosian method is proposed for the upstream path. The tolerance limits for Novel Bedrosian method, are also established for its physical implementation. We further discuss the realistic implementation of various components of the OTONES topology. We also establish the optimal operation regime of the full concurrent topology based on parameters such as input optical power, pilot tone separation and many more. Finally as a key feature of the thesis, we optimize the system level concept of the topology with the use of the proposed Novel Bedrosian Method as the optimal analog circuitry for OTONES topology and provide a region of optimal operation of the topology.