The pursuit of dense monolithic integration and higher operating speed continues to push the integrated circuit (IC) fabrication technologies to their limits. The increasing process variation, associated with aggressive technology scaling, is having a negative impact on circuit yield in current IC technologies, and the problem is likely to become worse in the future. Circuit solutions that are more tolerant of the process variations are needed to fully utilize the benefits of technology scaling. The primary goal of this research is to develop high-frequency circuits that can deliver consistent performance even under the threat of increasing process variation. These circuits can be used to build ``self-healing" systems, which can detect process imperfections and compensate accordingly to optimize performance. In addition to improving yield, such adaptive circuits and systems can provide more robust and efficient solutions for a wide range of applications under varying operational and environmental conditions.Silicon-germanium (SiGe) BiCMOS technology is an ideal platform for highly integrated systems requiring both high-performance analog and radio-frequency (RF) circuits as well as large-scale digital functionality. This research is focused on designing circuit components for a high-frequency wideband self-healing receiver in SiGe BiCMOS technology. An adaptive image-reject mixer, low insertion-loss switches, a wideband low-noise amplifier (LNA), and a SiGe complementary LC oscillator were designed. Healing algorithms were developed, and automated self-healing of multiple parameters of the mixer was demonstrated in measurement. A monte-carlo simulation based methodology was developed to verify the effectiveness of the healing procedure. In summary, this research developed circuits, algorithms, simulation tools, and methods that are useful for building "self-healing" systems.

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ITC/USA 2012 Conference Proceedings / The Forty-Eighth Annual International Telemetering Conference and Technical Exhibition / October 22-25, 2012 / Town and Country Resort & Convention Center, San Diego, California / The Serial Streaming Telemetry infrastructure is being augmented with the Telemetry Network System, which is a net-centric infrastructure requiring bi-directional communications between the test article segment and the ground station segment. As a result, future radio segments must implement transceiver architecture to support bi-directional communications. This paper presents a design methodology for a multi-band transceiver design. The design methodology is based upon the Weaver architecture to provide coarse selection between the telemetry bands. Utilization of the Weaver architecture allowed for the optimization of multiple transmitter and receiver channels into single channels to support the L/S/C-Band frequency allocations. System-level simulation is presented to evaluate the feasibility of the transceiver design for a multi-band, multi-mode software-defined radio (SDR) platform in support of Telemetry Network System.

Software defined radio (SDR) introduces endless possibilities for future communication technologies. Instead of being limited to a static segment of the radio spectrum, SDR allows RF front-ends to be more flexible by using digital signal processing (DSP) and cognitive techniques to integrate adaptive hardware with dynamic software. We present the design and implementation of an innovative RF front-end transceiver architecture for application into a SDR test-bed platform. System-level requirements were extracted from the Space Network User Guide (SNUG). Initial system characterization demonstrated image leakage due to poor filtering and mixer isolation issues. Hence, the RF front-end design was re-implemented using the Weaver architecture for improved image rejection performance.

This thesis presents an active Complex Filter implementation that that creates a transfer function with with a single real pole and a complex zero. The two-input/two-output network developed in in this thesis responds differently based upon upon the relative phase difference of of the two inputs. If a negative ninety-degree phase difference occurs between the two inputs, the filter will exhibits a bandstop response. While a positive ninety-degree phase difference exhibits a bandpass response. This topology is relatesd to to Gingell’s RC-CR polyphase topology but because of of the use of of op-amps, can be cascadedd without without suffering loading effects. This thesis will focusfocuses primarily on on the bandstop response characteristics of of the filter. In a several stage cascade, each stage contributes a notch to broaden the attenuation bandWhen several sections are cascaded, multiple notches will be created from each stage that forms a broader attenuation band. Closed form design equations were were derived to to give expressions for for the “attenuation floor”. These equations can be used by a designer to predict the attenuation provided by by a cascaded system. The closed form expressions derived in in this thesis are used to implement an example five-stage topology that that operates from from 147 Hz to to 3.34 KHz. The thesis also investigates the robustness of of multi-stage cascades to to component variations. Monte Carlo analysis is used to determines the effects of of cascading the filter in in different orders, component tolerances, and a comparison to to an idealized polyphase RC-CR topology.

Millimeter wave (mm-Wave) has become increasingly popular frequency band for next-generation high-speed wireless communications. In mm-Wave, the wireless channel path loss is severe, demanding a high output power in transmitters (Tx) to meet a required SNR in receivers (Rx). Due to the intractable speed-power tradeoff ingrained in silicon processes, however, achieving a high power at mm-Wave, particularly over W-band (> 90 GHz), is challenging in silicon power amplifiers. To relieve the output power burden, phased-arrays are widely adopted in mm-Wave wireless communication systems -- namely, by leveraging a parallel power combining in the space domain, inherent in the phased arrays, the required output power per array element can be reduced significantly with increasing array size. In large arrays ( > 100's -- 1000's number of arrays), the required output power per element could be small, typically around several 10's mW or less in silicon-based phased arrays. In such small-to-medium scale output power level, the static power dissipations by transistor knee voltage and passive components could be a significant portion of the output power, decreasing power efficiency of power amplifiers drastically. This poses a significant concern on the power efficiency of the large-scale silicon-based phased arrays in mm-Wave. Another critical problem in mm-Wave wireless systems design is the increase of passive reactive components loss caused by worsening skin depth effect and increasing dielectric loss through silicon substrate. This essentially degrades the reactive components quality factor (Q) and limits frequency selectivity of the silicon-based mm-Wave systems. This thesis tackles these two major technical challenges to provide high frequency selectivity with maintaining high power efficiency for future mm-Wave wireless systems over W-band and beyond. First, various high-efficiency techniques such as impedance tuning with a reactive component at a cascoding stage in conventional stacked power amplifiers or load-pull based inter-stage matching technique, rather than conventional conjugate matching, have been applied to W-band CMOS and SiGe BiCMOS amplifiers to improve power efficiency with 5-10 dBm output power level, suitable for a large phased array applications, as detailed in Chapter 2 and 3. Second, a 4-tap finite impulse response (FIR) filter based receiver architecture is presented in Chapter 4. The FIR filtered receiver leverages a sinc-pulse type frequency nulls built-in in the transmission-line based FIR filter's frequency response to increase frequency selectivity. The proposed FIR filtered receiver achieves > 40-dB image rejection by placing an image signal at the null frequency at D-band, one of the largest image rejection performance at the highest frequency band reported so far. / Ph. D. / Due to recent advances in Silicon based solid-state technologies, the interest towards the millimeter wave (mm-Wave) frequency band has been emerging for next-generation high-speed wireless communication applications. One of the most significant parameters in a communication system would be the output power of a transmitter. However, the output power is limited especially at mm-wave frequencies. A phased array is one of the viable solutions to overcome this burden by utilizing a parallel power combing in the space domain. The required output power per element can be relieved, typically around several tens of mill watts or less. There are two major factors limiting the output power, which are the high loss of passive and active devices. This dissertation presents solutions to overcome these challenges. In addition, a 4-tap finite impulse response (FIR) filter based receiver architecture is introduced, which rejects unwanted image signals in heterodyne systems by utilizing sinc-pulse type frequency nulls. The proposed FIR filter achieves more than 40 dB of image rejection at D-band (110-170 GHz), which is one of the highest filtering performance in the millimeter-wave frequency band.

Direct-Down Conversion (DDC) principle based transceiver architectures are of interest to meet the diverse needs of present and future wireless systems. DDC transceivers have a simple structure with fewer analog components and offer low-cost, flexible and multi-standard solutions. However, DDC transceivers have certain circuit impairments affecting their performance in wide-band, high data rate and multi-user systems. IQ imbalance is one of the problems of DDC transceivers that limits their image rejection capabilities. Compensation techniques for frequency independent IQI arising due to gain and phase mismatches of the mixers in the I/Q paths of the transceiver have been widely discussed in the literature. However for wideband multi-channel transceivers, it is becoming increasingly important to address frequency dependent IQI arising due to mismatches in the analog I/Q lowpass filters. A hardware-efficient and standard independent digital estimation and compensation technique for frequency dependent IQI is introduced which is also capable of tracking time-varying IQI changes. The technique is blind and adaptive in nature, based on the second order statistical properties of complex random signals such as properness/circularity. A detailed performance analysis of the introduced technique is executed through computer simulations for various real-time operating scenarios. A novel technique for finding the optimal number of taps required for the adaptive IQI compensation filter is proposed and the performance of this technique is validated. In addition, a metric for the measure of properness is developed and used for error power and step size analysis. / Master of Science / A wireless transceiver consists of two major building blocks namely the RF front-end and digital baseband. The front-end performs functions such as frequency conversion, filtering, and amplification. Impurities because of deep-submicron fabrication lead to non-idealities of the front-end components which limit their accuracy and affect the performance of the overall transceiver. Complex (I/Q) mixing of baseband signals is preferred over real mixing because of its inherent trait of bandwidth efficiency. The I/Q paths enabling this complex mixing in the front-end may not be exactly identical thereby disturbing the perfect orthogonality of inphase and quadrature components leading to IQ Imbalance. The resultant IQ imbalance leads to an image of the signal formed at its mirror frequencies. Imbalances arising from mixers lead to an image of constant strength whereas I/Q low-pass filter mismatches lead to an image of varying strength across the Nyquist range. In addition, temperature effects cause slow variation in IQ imbalance with time. In this thesis a hardware efficient and standard-independent technique is introduced to compensate for performance degrading IQ imbalance. The technique is blind and adaptive in nature and uses second order statistical signal properties like circularity or properness for IQ imbalance estimation. The contribution of this work, which gives a key insight into the optimal number of taps required for the adaptive compensation filter improves the state-of-the-art technique. The performance of the technique is evaluated under various scenarios of interest and a detailed analysis of the results is presented.

Due to the demand for low-cost, small-form factor and large-scale integration of system-on-chip wireless transceivers, the image-reject, zero-IF and low-IF receiver architectures have become the main topologies used in mainstream wireless communication systems. Consequently, signal sources with quadrature phase outputs [quadrature oscillators (QOs)] are therefore essential, and their phase noise, driving capability, tuning range, oscillation frequency, and power consumption have a major impact on the overall receiver performance. Additionally, it is required that the QO synthesize precise I/Q waveforms across the signal bandwidth over process, voltage, and temperature variations for adequate image-rejection and signal modulation/demodulation. While the use of symmetrical layout and large inter-digitated devices minimize both systematic and random mismatches, this solution alone may not succeed in achieving the stringent performance requirements dictated by modern wireless standards particularly as the technology scales into the sub-100nm regime, necessitating both phase and gain calibration of the mismatched I/Q channels post-fabrication. Given the necessity for precise RF quadrature signal synthesis, the goal of this work is to investigate low-power low-phase-noise quadrature oscillator (QVCO) topologies with an integrated phase calibration feature. The first part of this work focuses on the analysis and modeling of cross-coupled LC QVCOs. The analysis focuses on understanding the oscillator basic performance characteristics, design trade-offs, phase-noise performance, effect of including phase shift in the coupling paths, and on examining the quadrature accuracy in presence of process variations. New design parameters and circuit insight are developed and a generalized first order linear model and a one-port model are proposed. Particularly, we introduce the concept of an effective core and coupling transconductances to explain various oscillator properties. Additionally, a new incremental circuit element — the quadrature resistance — is introduced to evaluate the effect of coupling on the open-loop quality factor and hence on the oscillator phase noise performance. Mechanisms affecting the mode selectivity are identified and modeled. A qualitative and quantitative study of the effect of mismatch on the phase imbalance and amplitude error is presented. Particularly, closed-form intuitive expressions of the phase imbalance and amplitude error are derived and verified via circuit simulation. Based on our understanding of the various mechanisms affecting the quadrature accuracy, the second part of this work introduces a very efficient quadrature phase calibration technique based on the disconnected-source parallel-coupled LC QVCO topology. The phase-tunable LC QVCO (PT-QVCO) achieves an ultra-wide I/Q phase tuning range without affecting the relative amplitude error or consuming additional power or chip area. Additionally, in restoring the phase balance, it is observed that the proposed method restores the phase noise performance to its optimal value which presents a potential advantage over classical calibration techniques. Time domain measurements performed on a 5 GHz prototype show that I/Q signals with phase error up to ~±30°, beyond which the VCO cores are unlocked, can be driven to perfect quadrature phase. The PT-QVCO can be tuned from 3.87-4.45 GHz at the negative mode and 4.4-5.4 GHz at the positive mode, a total of ~1.5 GHz. The fabricated circuit including pad structures occupies an area of 1.1x0.7 mm² and drains 18mW (excluding buffer circuits) from a 1.8 V supply voltage. The third part of this work introduces a new low-power, low-phase-noise super harmonic injection-coupled LC QVCO (IC-QVCO) topology. Analysis of the waveform accuracy reveals an inverse dependence of the quadrature error on the tank quality factor thus allowing circuit optimization for both low phase noise and precise quadrature synthesis. Additionally, a tunable tail filter (TTF) is incorporated to calibrate the residual quadrature imbalance in presence of a 3-σ variation in the device parameters. An X-band IC-QVCO prototype with a TTF implemented in a 0.18μm RF CMOS process, achieves a measured phase noise figure-of-merit ranging from 177.3 to 182.6 dBc/Hz along the 9.0 to 9.6 GHz frequency tuning range while dissipating only 9mW from the 1.8V supply. The TTF reduces both the 1/f² and 1/f³ phase noise and calibrates the residual phase error within ±11° post-fabrication without affecting the relative amplitude error or the phase noise performance. The circuit performance compares favorably with recently published work. In the fourth part of this work, we explore the implementation of LC QVCOs as potential I/Q sources at millimeter-wave (MMW) frequencies. Among the several design challenges that emerge as the oscillator frequency is scaled into the MMW band, precise quadrature synthesis and adequate frequency tuning range are among the hardest to achieve. After describing the limitation of using an MOS varactor and a digitally controlled switch capacitor array for frequency tuning, we propose an alternative frequency tuning technique based on the fundamental operation of LC QVCOs. The off-resonance operation, which is defined by the coupling network, suggests varying the coupling current to achieve frequency tuning. In essence, by modifying the bias current of the coupling transistors (G_Mc-tuning), a wide and linear frequency tuning range can be achieved. Extensive simulation results of a 60 GHz prototype, implemented in a 90 nm commercial RF CMOS process, demonstrates a 5 GHz of frequency tuning range (57.5 GHz → 62.5 GHz), a tuning sensitivity of 1GHz/mA, and a 4dB improvement in the phase noise compared to a varactor solution. Finally, the Appendix includes recent research work on the analysis and design of g<sbu>m</sub>-boosted common-gate low-noise amplifiers (CG-LNAs). While this topic seems to diverge from the main theme of the dissertation, we believe that the comprehensive analysis and the originality of the circuit design introduced in this work are worth acknowledging. / Ph.D. / While resting in bed due to illness, the Dutch scientist Christiaan Huygens keenly observed that the pendulums of two clocks hanging on the wall moved synchronously when the clocks were hung close to each other. He concluded that these two oscillatory systems were forced to move in unison by virtue of mechanical coupling through the wall. In essence, each pendulum injected mechanical vibrations into the wall that was strong enough to lock the adjacent pendulum into synchronous motion. Injection locking of oscillatory systems plays a critical role in communication systems ranging from frequency division, to generating clocks (oscillators) with finer phase separation, to the synthesis of orthogonal (quadrature) clocks. All communication systems have the same basic form. Firstly, there will some type of an information or data source which can be a keyboard or a microphone in a smartphone. The source is connected to a receiver by some sort of a channel. In wireless systems, the channel is the air medium. Moreover, to comply with the FCC and 3GPP requirements, data can only be transmitted wirelessly within a predefined set of frequencies and with stringent emission requirements to avoid interference with other wireless systems. These frequencies are generated by high fidelity clock sources, also known as oscillators. Consider a group of people sharing the same room and hence the same channel want to share information. Without regulating the “loudness” of each communicating ensemble, the quality of communication can be severely impaired. Moreover, it is to be expected that information can be shared more efficiently if each pair is allocated non-overlapping timeslots – speak when others are quiet. Called time orthogonality, all wireless systems require precise orthogonal (quadrature) clock sources to improve the communication efficiency. The precision of quadrature clocks is determined by the amplitude and phase accuracy. This dissertation takes a deep dive into the analysis and implementation of high accuracy quadrature (I/Q) clock sources using the concept of injection locking. These I/Q clocks or oscillators, also known as quadrature voltage controlled oscillators (QVCOs), have gained enormous popularity in the last decade. The first part of this work focuses on the analysis and modeling of QVCOs. The analysis focuses on understanding the oscillator basic performance characteristics, and on examining the quadrature accuracy in presence of process variations. New design parameters and circuit insight are developed and a generalized first order linear model and a one-port model are proposed. A qualitative and quantitative study of the effect of mismatch on the phase imbalance and amplitude error is presented. Particularly, closed-form intuitive expressions of the phase imbalance and amplitude error are derived and verified via circuit simulation. Based on our understanding of the various mechanisms affecting the quadrature accuracy, the second part of this work introduces a very efficient quadrature phase calibration technique based The phase-tunable QVCO (PT-QVCO) achieves an ultra-wide I/Q phase tuning range without affecting the oscillator other performance metrics. The proposed topology was successfully verified in silicon using a 5GHz prototype. The third part of this work introduces a new low-power, low-phase-noise injection coupled QVCO (IC-QVCO) topology. An X-band IC-QVCO prototype was successfully verified in a 0.18m RF CMOS process. In the fourth part of this work, we explore the implementation of QVCOs as potential I/Q sources at millimeter-wave (MMW) frequencies. Among the several design challenges that emerge as the oscillator frequency is scaled into the MMW band, precise quadrature synthesis and adequate frequency tuning range are among the hardest to achieve. After describing the limitation of using an conventional frequency tuning techniques, we propose an alternative approach based on the fundamental operation of QVCOs that outperforms existing solutions.

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A new circuit is proposed that uses an RC-CR filter in a feedback configuration to achieve a wideband precision quadrature phase shift with constant amplitude response. Such a circuit can be used to perform image rejection in a low IF receiver using the Hartley method. Simulation results show that the circuit can achieve an average image rejection ratio of 50 dB over a 16 MHz bandwidth. The feedback loop enables the circuit to maintain high accuracy over process and temperature.