Global ETD Search

221	Aspects of hardware methodologies for the NTRU public-key cryptosystem / Wilhelm, Kyle. January 2008 (has links) Thesis (M.S.)--Rochester Institute of Technology, 2008. / Typescript. Includes bibliographical references (p. 69-72).
222	Hazard detection with VHDL in combinational logic circuits with fixed delays / Chu, Ming-Cheung, January 1992 (has links) Thesis (M.S.)--Virginia Polytechnic Institute and State University, 1992. / Vita. Abstract. Includes bibliographical references (leaves 181-182). Also available via the Internet.
223	Representation and simulation of a high level language using VHDL / Edwards, Carleen Marie, January 1994 (has links) Thesis (M.S.)--Virginia Polytechnic Institute and State University, 1994. / Vita. Abstract. Includes bibliographical references (leaves 56-57). Also available via the Internet.
224	VHDL modeling and design of an asynchronous version of the MIPS R3000 microprocessor / Fanelli, Paul. January 1994 (has links) Thesis (M.S.)--Rochester Institute of Technology, 1994. / Typescript. Includes bibliographical references (leaves 124-125).
225	Behavioral delay fault modeling and test generation / Joshi, Anand Mukund, January 1994 (has links) Thesis (M.S.)--Virginia Polytechnic Institute and State University, 1994. / Vita. Abstract. Includes bibliographical references (leaves 165-169). Also available via the Internet.
226	Algebraic specification and verification of processor microarchitectures / Matthews, John Robert, January 2000 (has links) Thesis (Ph. D.)--Oregon Graduate Institute, 2000.
227	Efficient VHDL models for various PLD architectures / Giannopoulos, Vassilis. January 1995 (has links) Thesis (M.S.)--Rochester Institute of Technology, 1995. / Typescript. Bibliography: leaf 55.
228	Natural language interface to a VHDL modeling tool / Manek, Meenakshi. January 1993 (has links) Thesis (M.S.)--Virginia Polytechnic Institute and State University, 1993. / Vita. Abstract. Includes bibliographical references (leaves 79-80). Also available via the Internet.
229	VHDL modeling of ASIC power dissipation / Hoffman, Joseph A. January 1994 (has links) Report (M.S.)--Virginia Polytechnic Institute and State University, 1994. / Vita. Abstract. Includes bibliographical references (leaves 60-62). Also available via the Internet.
230	Dynamic algorithms for chordal and interval graphs Ibarra, Louis Walter 05 July 2018 (has links) We present the first dynamic algorithm that maintains a clique tree representation of a chordal graph and supports the following operations: (1) query whether deleting or inserting an arbitrary edge preserves chordality, (2) delete or insert an arbitrary edge, provided it preserves chordality. We give two implementations. In the first, each operation runs in O( n) time, where n is the number of vertices. In the second, an insertion query runs in O(log² n) time, an insertion in O(n) time, a deletion query in O(n) time, and a deletion in O(n log n) time. We also introduce the clique-separator graph representation of a chordal graph, which provides significantly more information about the graph's structure than the well-known clique tree representation. We present fundamental properties of the clique-separator graph and additional properties when the input graph is interval. We then introduce the train tree representation of interval graphs and use it to decide whether there is a certain linear ordering of the graph's maximal cliques. This yields a fully dynamic algorithm to recognize interval graphs in O(n log n) time per edge insertion or deletion. The clique-separator graph may lead to dynamic algorithms for every proper subclass of chordal graphs, and the train tree may lead to fast dynamic algorithms for problems on interval graphs. / Graduate Computer hardware description languages Graph theory Algorithms Trees (Graph theory)

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