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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
101

Nonlinear controller synthesis for complex chemical and biochemical reaction systems

Leising, Sophie 02 May 2005 (has links)
The present research study is comprised of two main parts. The first part aims at the development of a systematic system-theoretic framework that allows the derivation of optimal chemotherapy protocols for HIV patients. The proposed framework is conceptually aligned with a notion of continuous-time model predictive control of nonlinear dynamical systems, and results in an optimal way to control viral replication, while maintaining low antiretroviral drug toxicity levels. This study is particularly important because it naturally integrates powerful system-theoretic techniques into a clinically challenging problem with worldwide implications, namely the one of developing chemotherapy patterns for HIV patients that are effective and do not induce adverse side-effects. The second part introduces a new digital controller design methodology for nonlinear (bio)chemical processes, that reflects contemporary necessities in the practical implementation of advanced process control strategies via digital computer-based algorithms. The proposed methodology relies on the derivation of an accurate sampled-data representation of the process, and the subsequent formulation and solution to a nonlinear digital controller synthesis problem. In particular, for the latter two distinct approaches are followed that are both based on the methodological principles of Lyapunov design and rely on a short-horizon model-based prediction and optimization of the rate of“energy dissipation" of the system, as it is realized through the time derivative of an appropriately selected Lyapunov function. First, the Lyapunov function is computed by solving the discrete Lyapunov matrix equation. In the second approach however, it is computed by solving a Zubov-like functional equation based on the system's drift vector field. Finally, two examples of a chemical and a biological reactor that both exhibit nonlinear behavior illustrate the main features of the proposed digital controller design method.
102

Design Methodology for High-performance Circuits Based on Automatic Optimization Methods. / Mise en place d'une démarche de conception pour circuits hautes performances basée sur des méthodes d'optimisation automatique

Tugui, Catalin Adrian 14 January 2013 (has links)
Ce travail de thèse porte sur le développement d’une méthodologie efficace pour la conception analogique, des algorithmes et des outils correspondants qui peuvent être utilisés dans la conception dynamique de fonctions linéaires à temps continu. L’objectif principal est d’assurer que les performances pour un système complet peuvent être rapidement investiguées, mais avec une précision comparable aux évaluations au niveau transistor.Une première direction de recherche a impliqué le développement de la méthodologie de conception basée sur le processus d'optimisation automatique de cellules au niveau transistor et la synthèse de macro-modèles analogiques de haut niveau dans certains environnements comme Mathworks - Simulink, VHDL-AMS ou Verilog-A. Le processus d'extraction des macro-modèles se base sur un ensemble complet d'analyses (DC, AC, transitoire, paramétrique, Balance Harmonique) qui sont effectuées sur les schémas analogiques conçues à partir d’une technologie spécifique. Ensuite, l'extraction et le calcul d'une multitude de facteurs de mérite assure que les modèles comprennent les caractéristiques de bas niveau et peuvent être directement régénéré au cours de l'optimisation.L'algorithme d'optimisation utilise une méthode bayésienne, où l'espace d’évaluation est créé à partir d'un modèle de substitution (krigeage dans ce cas), et la sélection est effectuée en utilisant le critère d’amélioration (Expected Improvement - EI) sujet à des contraintes. Un outil de conception a été développé (SIMECT), qui a été intégré comme une boîte à outils Matlab, employant les algorithmes d’extraction des macro-modèles et d'optimisation automatique. / The aim of this thesis is to establish an efficient analog design methodology, the algorithms and the corresponding design tools which can be employed in the dynamic conception of linear continuous-time (CT) functions. The purpose is to assure that the performance figures for a complete system can be rapidly investigated, but with comparable accuracy to the transistor-level evaluations. A first research direction implied the development of the novel design methodology based on the automatic optimization process of transistor-level cells using a modified Bayesian Kriging approach and the synthesis of robust high-level analog behavioral models in environments like Mathworks – Simulink, VHDL-AMS or Verilog-A.The macro-model extraction process involves a complete set of analyses (DC, AC, transient, parametric, Harmonic Balance) which are performed on the analog schematics implemented on a specific technology process. Then, the extraction and calculus of a multitude of figures of merit assures that the models include the low-level characteristics and can be directly regenerated during the optimization process.The optimization algorithm uses a Bayesian method, where the evaluation space is created by the means of a Kriging surrogate model, and the selection is effectuated by using the expected improvement (EI) criterion subject to constraints.A conception tool was developed (SIMECT), which was integrated as a Matlab toolbox, including all the macro-models extraction and automatic optimization techniques.
103

High performance ultra-low voltage continuous-time delta-sigma modulators. / CUHK electronic theses & dissertations collection

January 2011 (has links)
Continuous-time (CT) Delta-Sigma Modulators (DSMs) have re-gained popularity recently for oversampling analog-to-digital conversion, because they are more suitable for low supply voltage implementation than their discrete-time (DT) counterparts, among other reasons. To the state of art at the low voltage front, a CT O.5-V audio-band DSM with a return-to-open feedback digital-to-analog converter has been reported. However, the O.5-V CT DSM has a limited performance of 74-dB SNDR due to clock jitters and other factors caused by the ultralow supply. / Finally, a O.5-V 2-1 cascaded CT DSM with SCR feedback is proposed. A new synthesis method is presented. Transistor-level simulations show that a 98dB SNDR is achieved over a 25-kHz signal bandwidth with a 6.4MHz sampling frequency and 350muW power consumption under a 0.5-V supply. / In this thesis, three novel ULV audio-band CT DSMs with high signal-to-noise-plus-distortion ratio (SNDR) are reported for a nominal supply of O.5V. The first one firstly realizes a switched-capacitor-resistor (SCR) feedback at O.5V, enabled by a fast amplifier at O.5V, for reduced clock jitter-sensitivity. Fabricated in a O.13mum CMOS process using only standard VT devices, the 3rd order modulator with distributed feedback occupies an active area of O.8mm2 . It achieves a measured SNDR of 81.2dB over a 25-kHz signal bandwidth while consuming 625muW at O.5-V. The measured modulator performance is consistent across a supply voltage range from O.5V to O.8V and a temperature range from -20°C to 90°C. Measurement results and thermal-noise calculation show that the peak SNDR is limited by thermal noise. / The scaling of the feature sizes of CMOS technologies results in a continuous reduction of supply voltage (VDD) to maintain reliability and to reduce the power dissipation per unit area for increasingly denser digital integrated circuits. The VDD for low-power digital circuits is predicted to drop to O.5V in about ten years. Ultra-low voltage (ULV) operation will also be required for the analog-to-digital converter, a universal functional block in mixed-signal integrated circuits, in situations where the benefits of using a single VDD out-weigh the overhead associated with multi-V DD solutions. / The second ULV CT DSM employs a feed-forward loop topology with SCR feedback. Designed in O.13mum CMOS process, the modulator achieves a post-layout simulation (thermal noise included) result of 89dB SNDR over a 25-kHz signal bandwidth. The 0.13mum CMOS chip consumes an active area of O.85mm2 and 682.5muW at O.5-V supply. It achieves an excellent measured performance of 87.8dB SNDR over a 25-kHz signal bandwidth and al02dB spurious-free dynamic range. To the best of our knowledge, this performance is the highest for DSMs in this supply voltage range. Thanks to the proposed adaptive biasing technique, the measured modulator performance is consistent across a supply voltage range from O.4V to O.75V and a temperature range from -20°C to 90°C. / Chen, Yan. / Adviser: Kong Pang Pun. / Source: Dissertation Abstracts International, Volume: 73-04, Section: B, page: . / Thesis (Ph.D.)--Chinese University of Hong Kong, 2011. / Includes bibliographical references (leaves 127-135). / Electronic reproduction. Hong Kong : Chinese University of Hong Kong, [2012] System requirements: Adobe Acrobat Reader. Available via World Wide Web. / Electronic reproduction. [Ann Arbor, MI] : ProQuest Information and Learning, [201-] System requirements: Adobe Acrobat Reader. Available via World Wide Web. / Abstract also in Chinese.
104

Méthodes garanties pour l’estimation d’état et le contrôle de cohérence des systèmes non linéaires à temps continu

Videau, Gaétan 17 July 2009 (has links)
Cette thèse traite des problèmes d’estimation et de contrôle de cohérence par l’utilisation des techniques ensemblistes. L’objectif est la mise en place d’une démarche méthodologique pour la surveillance et la détection d’anomalies au sein des systèmes où le déterminisme des indicateurs relatifs à l’état de santé du système est une condition sine qua non. Une fois placé dans un contexte ensembliste, l’évolution de chaque variable du système est représentée par une enveloppe traduisant les incertitudes internes et externes ; cette enveloppe représente le seuil au delà duquel le comportement observé représente un écart anormal par rapport à son comportement nominal, et pouvant conduire à une incapacité pour accomplir les objectifs de sa mission. Les techniques développées sont appliquées à un procédé hydraulique de laboratoire . / This work deals with the development of set-membership methods for set esti- mation and consistency checks for nonlinear continuous-time systems. The main objective is to setup a methodology for fault detection and isolation for the systems where the deter- minism of faults indicators on the health system is a necessary condition. Once placed in a set-membership framework, the evolution of each variable is represented by an envelope re?ecting the internal and external uncertainties. This envelope corresponds to the threshold beyond which the observed behavior is an abnormal discrepancy over its nominal behav- ior, thus preventing the accomplishment the mission objectives. The proposed methods are applied on a hydraulic laboratory process.
105

Comparison of Two Parameter Estimation Techniques for Stochastic Models

Robacker, Thomas C 01 August 2015 (has links)
Parameter estimation techniques have been successfully and extensively applied to deterministic models based on ordinary differential equations but are in early development for stochastic models. In this thesis, we first investigate using parameter estimation techniques for a deterministic model to approximate parameters in a corresponding stochastic model. The basis behind this approach lies in the Kurtz limit theorem which implies that for large populations, the realizations of the stochastic model converge to the deterministic model. We show for two example models that this approach often fails to estimate parameters well when the population size is small. We then develop a new method, the MCR method, which is unique to stochastic models and provides significantly better estimates and smaller confidence intervals for parameter values. Initial analysis of the new MCR method indicates that this method might be a viable method for parameter estimation for continuous time Markov chain models.
106

Explorations of the Aldous Order on Representations of the Symmetric Group

Newhouse, Jack 31 May 2012 (has links)
The Aldous order is an ordering of representations of the symmetric group motivated by the Aldous Conjecture, a conjecture about random processes proved in 2009. In general, the Aldous order is very difficult to compute, and the proper relations have yet to be determined even for small cases. However, by restricting the problem down to Young-Jucys-Murphy elements, the problem becomes explicitly combinatorial. This approach has led to many novel insights, whose proofs are simple and elegant. However, there remain many open questions related to the Aldous Order, both in general and for the Young-Jucys-Murphy elements.
107

Portfolio Insurance Strategies

Guleroglu, Cigdem 01 September 2012 (has links) (PDF)
The selection of investment strategies and managing investment funds via employing portfolio insurance methods play an important role in asset liability management. Insurance strategies are designed to limit downside risk of portfolio while allowing some participation in potential gain of upside markets. In this thesis, we provide an extensive overview and investigation, particularly on the two most prominent portfolio insurance strategies: the Constant Proportion Portfolio Insurance (CPPI) and the Option-Based Portfolio Insurance (OBPI). The aim of the thesis is to examine, analyze and compare the portfolio insurance strategies in terms of their performances at maturity, via some of their statistical and dynamical properties, and of their optimality over the maximization of expected utility criterion. This thesis presents the financial market model in continuous-time containing no arbitrage opportunies, the CPPI and OBPI strategies with definitions and properties, and the analysis of these strategies in terms of comparing their performances at maturity, of their statistical properties and of their dynamical behaviour and sensitivities to the key parameters during the investment period as well as at the terminal date, with both formulations and simulations. Therefore, we investigate and compare optimal portfolio strategies which maximize the expected utility criterion. As a contribution on the optimality results existing in the literature, an extended study is provided by proving the existence and uniqueness of the appropriate number of shares invested in the unconstrained allocation in a wider interval.
108

Jitter-Tolerance and Blocker-Tolerance of Delta-Sigma Analog-to-Digital Converters for Saw-Less Multi-Standard Receivers

Ahmed, Ramy 1981- 14 March 2013 (has links)
The quest for multi-standard and software-defined radio (SDR) receivers calls for high flexibility in the receiver building-blocks so that to accommodate several wireless services using a single receiver chain in mobile handsets. A potential approach to achieve flexibility in the receiver is to move the analog-to-digital converter (ADC) closer to the antenna so that to exploit the enormous advances in digital signal processing, in terms of technology scaling, speed, and programmability. In this context, continuous-time (CT) delta-sigma (ΔƩ) ADCs show up as an attractive option. CT ΔƩ ADCs have gained significant attention in wideband receivers, owing to their amenability to operate at a higher-speed with lower power consumption compared to discrete-time (DT) implementations, inherent anti-aliasing, and robustness to sampling errors in the loop quantizer. However, as the ADC moves closer to the antenna, several blockers and interferers are present at the ADC input. Thus, it is important to investigate the sensitivities of CT ΔƩ ADCs to out-of-band (OOB) blockers and find the design considerations and solutions needed to maintain the performance of CT ΔƩ modulators in presence of OOB blockers. Also, CT ΔƩ modulators suffer from a critical limitation due to their high sensitivity to the clock-jitter in the feedback digital-to-analog converter (DAC) sampling-clock. In this context, the research work presented in this thesis is divided into two main parts. First, the effects of OOB blockers on the performance of CT ΔƩ modulators are investigated and analyzed through a detailed study. A potential solution is proposed to alleviate the effect of noise folding caused by intermodulation between OOB blockers and shaped quantization noise at the modulator input stage through current-mode integration. Second, a novel DAC solution that achieves tolerance to pulse-width jitter by spectrally shaping the jitter induced errors is presented. This jitter-tolerant DAC doesn’t add extra requirements on the slew-rate or the gain-bandwidth product of the loop filter amplifiers. The proposed DAC was implemented in a 90nm CMOS prototype chip and provided a measured attenuation for in-band jitter induced noise by 26.7dB and in-band DAC noise by 5dB, compared to conventional current-steering DAC, and consumes 719µwatts from 1.3V supply.
109

A Continuous-Time ADC and DSP for Smart Dust

Chhetri, Dhurv, Manyam, Venkata Narasimha January 2011 (has links)
Recently, smart dust or wireless sensor networks are gaining more attention.These autonomous, ultra-low power sensor-based electronic devices sense and process burst-type environmental variations and pass the data from one node (mote) to another in an ad-hoc network. Subsystems for smart dust are typically the analog interface (AI), analog-to-digital converter (ADC), digital signal processor (DSP), digital-to-analog converter (DAC), power management, and transceiver for communication. This thesis project describes an event-driven (ED) digital signal processing system (ADC, DSP and DAC) operating in continuous-time (CT) with smart dust as the target application. The benefits of the CT system compared to its conventional counterpart are lower in-band quantization noise and no requirement of a clock generator and anti-aliasing filter, which makes it suitable for processing burst-type data signals. A clockless EDADC system based on a CT delta modulation (DM) technique is presented. The ADC output is digital data, continuous in time, known as “data token”. The ADC employs an unbuffered, area efficient, segmented resistor-string (R-string) feedback DAC. A study of different segmented R-string DAC architectures is presented. A comparison in component reduction with prior art shows nearly 87.5% reduction of resistors and switches in the DAC and the D flip-flops in the bidirectional shift registers for an 8-bit ADC, utilizing the proposed segmented DAC architecture. The obtained SNDR for the 3-bit, 4-bit and 8-bit ADC system is 22.696 dB, 30.435 dB and 55.73 dB, respectively, with the band of interest as 220.5 kHz. The CTDSP operates asynchronously and process the data token obtained from the EDADC. A clockless transversal direct-form finite impulse response (FIR) low-pass filter (LPF) is designed. Systematic top-down test-driven methodology is employed through out the project. Initially, MATLAB models are used to compare the CT systems with the sampled systems. The complete CTDSP system is implemented in Cadence design environment. The thesis has resulted in two conference contributions. One for the 20th European Conference on Circuit Theory and Design, ECCTD’11 and the other for the 19th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC’11. We obtained the second-best student paper award at the ECCTD.
110

Applications of Decision Analysis to Health Care

Hagtvedt, Reidar 06 December 2007 (has links)
This dissertation deals with three problems in health care. In the first, we consider the incentives to change prices and capital levels at hospitals, using optimal control under the assumption that private payers charge higher prices if patients consume more hospital services. The main results are that even with fixed technology, investment and prices exhibit explosive growth, and that prices and capital stock grow in proportion to one another. In the second chapter, we study the flow of nosocomial infections in an intensive care unit. We use data from Cook County Hospital, along with numerous results from the literature, to construct a discrete event simulation. This model highlights emergent properties from treating the flow of patients and pathogens in one interconnected system, and sheds light on how nosocomial infections relate to hospital costs. We find that the system is not decomposable to individual systems, exhibiting behavior that would be difficult to explain in isolation. In the third chapter, we analyze a proposed change in diversion policies at hospitals, in order to increase the number of patients served, without an increase in resources. Overcrowding in hospital emergency departments is caused in part by the inability to send patients to main hospital wards, due to limited capacity. When a hospital is completely full, the hospital often goes on ambulance diversion, until some spare capacity has opened up. Diversion is costly, and often leads to waves of diversions in systems of hospitals, a situation that is regarded as highly problematic in public health. We construct and analyze a continuous-time Markov chain model for one hospital. The intuition behind the model is that load-balancing between various hospitals in a metro area may hinder full congestion. We find that a more flexible contract may benefit all parties, through the partial diversion of federally insured patients, when a hospital is very close to full. Discrete event simulation models are run to assess the effect, using data from DeKalb Medical Center, and also to show that in a two-hospital system, more federally insured patients are served using this mechanism.

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