The trend in computer architectures has for several years been heterogeneous systems consisting of a regular CPU and at least one additional, specialized processing unit, such as a GPU.The different characteristics of the processing units and the requirement of multiple tools and programming languages makes programming of such systems a challenging task. Although there exist tools for programming each processing unit, utilizing the full potential of a heterogeneous computer still requires specialized implementations involving multiple frameworks and hand-tuning of parameters.To fully exploit the performance of heterogeneous systems for a single computation, hybrid execution is needed, i.e. execution where the workload is distributed between multiple, heterogeneous processing units, working simultaneously on the computation. This thesis presents the implementation of a new hybrid execution backend in the algorithmic skeleton framework SkePU. The skeleton framework already gives programmers a user-friendly interface to algorithmic templates, executable on different hardware using OpenMP, CUDA and OpenCL. With this extension it is now also possible to divide the computational work of the skeletons between multiple processing units, such as between a CPU and a GPU. The results show an improvement in execution time with the hybrid execution implementation for all skeletons in SkePU. It is also shown that the new implementation results in a lower and more predictable execution time compared to a dynamic scheduling approach based on an earlier implementation of hybrid execution in SkePU.

abstract: Continuous monitoring of sensor data from smart phones to identify human activities and gestures, puts a heavy load on the smart phone's power consumption. In this research study, the non-Euclidean geometry of the rich sensor data obtained from the user's smart phone is utilized to perform compressive analysis and efficient classification of human activities by employing machine learning techniques. We are interested in the generalization of classical tools for signal approximation to newer spaces, such as rotation data, which is best studied in a non-Euclidean setting, and its application to activity analysis. Attributing to the non-linear nature of the rotation data space, which involve a heavy overload on the smart phone's processor and memory as opposed to feature extraction on the Euclidean space, indexing and compaction of the acquired sensor data is performed prior to feature extraction, to reduce CPU overhead and thereby increase the lifetime of the battery with a little loss in recognition accuracy of the activities. The sensor data represented as unit quaternions, is a more intrinsic representation of the orientation of smart phone compared to Euler angles (which suffers from Gimbal lock problem) or the computationally intensive rotation matrices. Classification algorithms are employed to classify these manifold sequences in the non-Euclidean space. By performing customized indexing (using K-means algorithm) of the evolved manifold sequences before feature extraction, considerable energy savings is achieved in terms of smart phone's battery life. / Dissertation/Thesis / M.S. Electrical Engineering 2014

The core idea of this thesis is to reduce the workload of manual inspection when the performance analysis of an updated software is required. The Central Process- ing Unit (CPU) utilization, which is one of the essential factors for evaluating the performance, is analyzed. The purpose of this work is to apply machine learning techniques that are suitable for detecting the state of the CPU utilization and any changes in the test environment that affects the CPU utilization. The detection re- lies on a Markov switching model to identify structural changes, which are assumed to follow an unobserved Markov chain, in the time series data. A historical behav- ior of the data can be described by a first-order autoregression. Then, the Markov switching model becomes a Markov switching autoregressive model. Another ap- proach based on a non-parametric analysis, a distribution-free method that requires fewer assumptions, called an E-divisive method, is proposed. This method uses a hi- erarchical clustering algorithm to detect multiple change point locations in the time series data. As the data used in this analysis does not contain any ground truth, the evaluation of the methods is analyzed by generating simulated datasets with known states. Besides, these simulated datasets are used for studying and compar- ing between the Markov switching autoregressive model and the E-divisive method. Results show that the former method is preferable because of its better performance in detecting changes. Some information about the state of the CPU utilization are also obtained from performing the Markov switching model. The E-divisive method is proved to have less power in detecting changes and has a higher rate of missed detections. The results from applying the Markov switching autoregressive model to the real data are presented with interpretations and discussions.

There is an ongoing debate by people in the industry whether to make native or web applications. These discussions mostly surround issues about development costs, user experience and capabilities. Another aspect of this debate is the fact that mobile devices have varying hardware specifications which is another factor to consider when making this decision. What we want to shed some light on is how performance is affected on the device when using these two different approaches of application development. The use of CPU/RAM and Energy is our primary concern and in our experiment we measure these values on two similar applications where one uses Nested Layouts and the other a WebView. The experiment was made on three different devices with varying specifications. What we found was that Web applications have a bigger impact on overall performance and because of this use more battery. While the debate certainly won't come to a close with results they are conclusive when it comes to the topic of performance and will be of value to developers who are concerned about it.

In this thesis work we have extended the SkePU framework by designing a new container data structure for the representation of generic two dimensional sparse matrices. Computation on matrices is an integral part of many scientific and engineering problems. Sometimes it is unnecessary to perform costly operations on zero entries of the matrix. If the number of zeroes is relatively large then a requirement for more efficient data structure arises. Beyond the sparse matrix representation, we propose an algorithm to judge the condition where computation on sparse matrices is more beneficial in terms of execution time for an ongoing computation and to adapt a matrix's state accordingly, which is the main concern of this thesis work. We present and implement an approach to switch automatically between two data container types dynamically inside the SkePU framework for a multi-core GPU-based heterogeneous system. The new sparse matrix data container supports all SkePU skeletons and nearly all SkePU operations. We provide compression and decompression algorithms from dense matrix to sparse matrix and vice versa on CPU and GPUs using SkePU data parallel skeletons. We have also implemented a context aware switching mechanism in order to switch between two data container types on the CPU or the GPU. A multi-state matrix representation, and selection on demand is also made possible. In order to evaluate and test effectiveness and efficiency of our extension to the SkePU framework, we have considered Matrix-Vector Multiplication as our benchmark program because iterative solvers like Conjugate Gradient and Generalized Minimum Residual use Sparse Matrix-Vector Multiplication as their basic operation. Through our benchmark program we have demonstrated adaptive switching between two data container types, implementation selection between CUDA and OpenMP, and converting the data structure depending on the density of non-zeroes in a matrix. Our experiments on GPU-based architectures show that our automatic switching mechanism adapts with the fastest SkePU implementation variant, and has a limited training cost.

Hypertext markup language 5 (HTML5), a new standard for HTML, enriched with additional features is expected to override all the basic underlying overhead needed by other applications. By the advent of new extension, HTML5, the web’s basic language is transplanted from a simple page layout into rich web application development language. Furthermore, with the release of HTML5, traditional browsing is expected to change and modify accordingly and on the other hand the potential users will have an alternative rather than sticking in platform and OS dependent native applications. This thesis deals with the readiness assessment of HTML5 with regard to different smart phones- Android and Windows. In order to visualize the fact, we analyzed different constraints like DNS lookup time, page loading time, memory and CPU consumption associated with two applications-Flash and HTML5 running right through the smart phones. Furthermore, the comparative analysis is performed in different network scenarios- Wi-Fi and 3G and user experience is estimated based on network parameters. From the experiments and observations taken, we found that android phones provide better support for HTML5 web applications than windows mobile devices. Also, the HTML5 applications loading time is limited by the browser rendering time rather that the content loading time from the network and is also dependent on hardware configuration of device used.

Multi Protocol Label Switching (MPLS) är en routingteknik som blir allt vanligare i dagens nätverk. Vid implementation av MPLS i nätverk är det grundläggande att hårdvaran har tillräckligt hög prestanda för att hantera tekniken. Om så inte är fallet kan det leda till negativa konsekvenser såsom paketförluster eller i värsta fall att routern havererar. Syftet med arbetet var att ta reda på hur processorbelastningen på en router skiljer sig när MPLS var implementerat jämfört med traditionell IP-routing. Routingprotokollen BGP, OSPF och RIP användes tillsammans med de olika routingteknikerna för att se vilket av dessa som krävde minst processorkraft. För att ta reda på hur processorbelastningen påverkades skapades en experimentmiljö. Varje routingprotokoll konfigurerades tillsammans med MPLS respektive traditionell IP-routing, vilket gav oss sex olika scenarion. Trafik skickades sedan genom nätverket med hjälp av applikationen Ostinato för att belasta enheterna. Resultatet av testerna visade att processorbelastningen blev högre för MPLS än för traditionell IP-routing. Det gällde för samtliga routingprotokoll. Det routingprotokoll som tillsammans med MPLS lyckades hålla processorbealstningen lägst var BGP, medans OSPF orsakade högst processorbelastning. Skillnaden mellan routingprotokollen OSPF och RIP var marginell. / Multi Protocol Label Switching (MPLS) is a growing routing technology. It is getting more common in today’s modern networks. When implementing MPLS, it is essential that the hardware is capable of handling such technology. If not, this could lead to packet loss or even network outage. The purpose of this study was to examine differences between MPLS and traditional IP-routing in aspect of CPU utilization. Routing protocols BGP, OSPF and RIP were configured together with the technologies in order to see which of the mentioned routing protocols that was the most efficient in terms of CPU utilization. An environment was created for the experiment. Each routing protocol was configured together with MPLS and traditional IP-routing respectively, which lead to a total of six scenarios. Traffic was sent through the network with an application called Ostinato with the purpose of increasing the load of the devices. The results showed higher CPU utilization with MPLS compared to traditional IP-routing. This was the case with each routing protocol. BGP had the lowest CPU utilization of the routing protocols in conjunction with MPLS whilst OSPF had the highest. The result between OSPF and RIP was slightly different.

Abstract This bachelor thesis discusses existing performance analysis techniques for ARM based architecture processors. This includes a comparison between couple of performance analysis applications installed on two Android test devices. Each application monitored CPU performance of the device in three test scenarios. Each test was done in five iterations. The results were compared for each test and for each application. The results of these iterations were compared to find the most stable application among the rest.

The popularity that mobile games gained recently gives the opportunity to develop more mobile games. Limited by the scarce resources on mobile phones, developing good games becomes critical and requires special optimization while choosing the design approach.   Object-oriented Design (OOD) and Data-oriented Design (DOD) are two programming paradigms that have different ways of defining and structuring data. The purpose of this student thesis is to investigate the CPU and Memory performance differences between the two approaches.   To answer the research questions an experiment is conducted where two identical mobile games are built, one according to OOD and the other to DOD to collect empirical quantitative data and compare the results. The study limits the scope by  running the games on Android mobile phones.   The results of comparing the CPU Usage show significant differences especially when the amount of data is large. For instance, in the DOD version of the game, the CPU spends 20.9% of the time on updating data, while it spends 69.2% of the time on the same action in the OOD version of the game. No significant differences are observed regarding the total Memory allocated for the games in both versions. It can therefore be concluded that when the number of objects/data is big, a more optimized code should be written following the Data oriented Design approach with regard to better CPU and Memory Usage and    better game performance.

This master's thesis deals with acceleration of geometrical image transforms using the GPU and NVIDIA (R) CUDA TM architecture. Time critical parts of the code are moved on the GPU and executed in parallel. One of the results is a demonstrational application for performance comparison of both architectures: the CPU, and GPU in combination with the CPU. As a reference implementation, there are used highly optimized routines from the OpenCV library, made by the Intel company.