Increasing power density of switch mode power supplies, by increasing their switching frequency has becoming a challenging obstacle for EMI mitigation. The passive EMI suppression technique has always been the primary solution to fulfill the EMC requirement in terms of conducted emission limits. However, the call for stringent power supplies specifications renders the passive techniques less desirable, due to their increasing size and power losses. In other words, the greater the power density of the converter, the bigger the passive filter. Other suppression techniques such as the spread spectrum frequency modulation (SSFM), and soft switching, prove to have less performance and much complex to implement. The active analog EMI filters provide the basic noise suppression technique; however, their performance is dramatically impeded at higher frequency. This solution requires an additional small size passive filter to complete the EMC spectrum for conducted emissions. Digital active filtering techniques offer advantages of flexibility, fewer external components and reduced overall size and power losses as compared to conventional passive filtering techniques. In this thesis DSP-based and FPGA-based EMI control techniques to mitigate the conducted emissions of switch mode power converters are proposed. These techniques are implemented in-lieu of the passive filtering techniques, by keeping equal or better performance. Moreover, these solutions can be configured as a stand-alone or integrated into the converter digital controller algorithm. Finally, the proposed solutions are implemented into three types of power converters, namely, a AC-DC power factor corrected converter, DC-AC micro-inverter for Photovoltaic application, and DC-DC for Electric Vehicle (EV) battery charger. Analytical, simulation and experimental results are provided to verify the proposed solutions. / Thesis (Ph.D, Electrical & Computer Engineering) -- Queen's University, 2011-11-07 10:48:49.191

This work presents a new wireless Visible Light Communication lighting system targeted to future Smart Buildings. A digitally controlled LLC resonant dc-dc converter targeted to white LED luminaires is demonstrated. Visible Light Communication is implemented with minimal incremental cost, by operating the LLC converter in burst mode, without causing any visible disturbance. The converter operates with a regulated average LED current by adjusting the switching frequency, while the burst pulse timing is controlled to minimize the current disturbance and minimize the value of the output capacitor. Variable Pulse Position Modulation is used to modulate the data, while supporting a range of dimming settings. A digital demodulation scheme that supports variable frequency transmission is demonstrated. The 80 W, 400 V to 23 V converter experimental prototype has a peak efficiency of 93.8 %. The bit error rate of the complete system is fully characterized versus distance and angle.

Multifrequency averaging is one of the widely used modeling and simulation techniques today for the analysis and design of power electronic systems. This technique is capable of providing the average behavior as well as the ripple behavior of power electronic systems. Hysteresis current control has fast response and internal current stability through controlling switches to maintain the current within a given hysteresis band of a given current command. However the state space variables in a hysteresis controlled system cannot be directly approached by multifrequency averaging method because of time varing switching frequency. In this thesis, a method of applying multifrequency averaging to hysteresis current controlled dc-dc converters is proposed. A dc-dc converter model with the application of this method has been successfully developed and validated both in simulation and experiment.

This thesis presents interfacing of fuel cells to a single-phase utility line using a high-frequency transformer isolated power converter. This research contributes towards selecting a suitable utility interfacing scheme and then designing a power conditioning system along with its control for connecting fuel cells to a single-phase utility line that can achieve high efficiency and compact size. The power conditioning system, designed and built in the research laboratory is connected with the utility line and the experimental results are presented. Based on the literature available on photovoltaic (PV) array and fuel cell based utility interactive inverters with high-frequency transformer isolation, the interfacing schemes for connecting a DC source, in particular fuel cells, to a single-phase utility line are classified. Based on the fuel cell characteristics and properties, performance and the comparison of these utility interfacing schemes, a suitable scheme for the present application is selected. Because of low voltage fuel cells, the system takes higher current from the fuel cell and results in lower efficiency of the system. The inverter stage of the selected scheme deals with the higher voltage (lower current) and therefore, its efficiency is higher. In this sense, the efficiency of the whole system depends mainly on the efficiency of the front-end DC-DC converter. To realize a low cost, small size and light weight system, soft-switching is required. Various soft-switched DC-DC converter topologies are compared for the given specifications. Based on the soft-switching range, efficiency and other merits and demerits, a current-fed DC-DC converter configuration is selected. The performance of the selected topology is evaluated for the given specifications. Detailed analysis, a systematic design, simulation and the experimental results of the converter (200 W, operating at 100 kHz) are presented. To achieve soft-switching for wide variation in input voltage and load while maintaining high efficiency has been a challenge, especially for the low voltage higher input current applications. The variation in pressure/flow of the fuel input to the fuel cells causes the variation in fuel cell stack voltage and the available power supplied to the load/utility line. It causes the converter to enter into hard switching region at higher input voltage and light load. A wide range soft-switched active-clamped current-fed DC-DC converter has been proposed, analyzed and designed and the experimental results (200 W, operating at 100 kHz) are presented. The fuel-cell voltage varies with fuel pressure and causes the variation in the output voltage produced by the front-end DC-DC converter at the input of the next inverter stage and will affect the inverter operation. Therefore, the front-end DC-DC converter should be controlled to produce a constant voltage at the input of the inverter at varying fuel pressure. Small signal modeling and closed loop control design of the proposed wide range L-L type active-clamped current-fed DC-DC converter has been presented to adjust the duty cycle of the converter switches automatically with any variation in fuel pressure to regulate the output voltage of the converter at a specified constant value. To convert the DC voltage output of the front-end DC-DC converter into utility AC voltage at line frequency and feeding current into utility line with low THD and high line power factor, an average current controlled inverter is designed. The complete power conditioning unit is connected to the single-phase utility line (208 V RMS, 60 Hz) and experimental results are presented. The system shows stable operation at varying reference power level.

As the technology advances, the feature size of the modern integrated circuits (ICs) has decreased dramatically to nanometer amplitude. On one hand, the shrink brings benefits, such as high speed and low power consumption per transistor. On the other hand, it poses a threat to the reliable operation of the ICs by the increased radiation sensitivity, such as single event effects (SEEs). For example, in 2010, a commercial-off-the-shelf (COTS) BiCMOS DC/DC pulse width modulator (PWM) IC was observed to be sensitive to neutrons on terrestrial real-time applications, where negative 6-μs glitches were induced by the single event transient (SET) effects. As a result, a project was set up to comprehensively study the failure mechanisms with various test methodologies and to develop SET-tolerant circuits to mitigate the SET sensitivity. First, the pulsed laser technique is adopted to perform the investigation on the SET response of the DC/DC PWM chip. A Ti:Sapphire single photon absorption (SPA) laser with different wavelengths and repetition rates is used as an irradiation source in this study. The sensitive devices in the chip are found to be the bandgap voltage reference circuit thanks to the well-controlled location information of the pulsed laser. The result is verified by comparing with the previous alpha particle and neutron testing data as well as circuit simulation using EDA tools. The root cause for the sensitivity is also acquired by analyzing the circuit. The temperature is also varied to study the effect of the temperature-induced quiescent point shift on the SET sensitivity of the chip. The experimental results show that the quiescent point shifts have different impacts on SET sensitivities due to the different structures and positions of the circuitries. After that, heavy ions, protons, and the pulsed X-ray are used as irradiation sources to further study the SET response of the DC/DC chip. The heavy ion and pulsed laser data are correlated to each other. And the equivalent LETs for laser with wavelengths of 750 nm, 800 nm, 850 nm and 920 nm are acquired. This conclusion can be used to obtain the equivalent heavy ion cross section of any area in a chip by using the pulsed laser technique, which will facilitate the SET testing procedure dramatically. The proton and heavy ion data are also correlated to each other based on a rectangular parallel piped (RPP) model, which gives convenience in Soft Error Rate (SER) estimation. The potential application of pulsed X-ray technique in SET field is also investigated. It is capable of generating similar results with those of heavy ion and pulsed laser testing. Both the advantages and disadvantages of this technique are explained. This provides an alternative choice for the SET testing in the future. Finally, the bandgap voltage reference circuit in the DC/DC PWM is redesigned and fabricated in bulk CMOS 130nm technology and a SET hardened bandgap circuit is proposed and investigated. The CMOS substrate PNP transistor is much less sensitive to SETs than the BiCMOS NPN transistor according to the pulsed laser test results. The reason is analyzed to be the different fabrication processes of the two technologies. The laser test results also indicate that the SET hardened bandgap circuit can mitigate the SET amplitude dramatically, which is consistent with the SPICE simulation results. These researches provide more understandings on the design of SET hardened bandgap voltage reference circuit.

Modern switch-mode power supplies (SMPS) used for point-of-load (PoL) applications need to meet increasingly stringent requirements on voltage regulation, while minimizing physical volume and optimizing conversion efficiency. The focus of this thesis is the voltage regulation capability of low-power PoL converters during load transients. The main objective is to investigate converter topologies and control techniques that can achieve fast and smooth transient performance without significant penalty in volume and efficiency. The digital control method is used due to its ability to implement sophisticated control algorithms. The first part of this thesis investigates a dual output stages converter, with a small auxiliary output stage connected in parallel with the main output stage. While the main output stage is responsible for steady-state operation and designed to achieve optimum efficiency, the auxiliary stage is activated when a load transient occurs, to help suppress voltage deviation. Experimental results on a 6 V-to-1 V, 3W buck converter shows 35% improvement in peak transient voltage deviation while maintaining the same efficiency profile, compared to an equivalent buck converter. The second part of this thesis introduces a flyback-transformer based buck (FTBB) converter. In this topology, the conventional buck inductor is replaced with the primary winding of the flyback transformer, an extra switch, and a set of small auxiliary switches on the secondary side. During heavy-to-light load transients the inductor current is steered away from the output capacitor to the input port, achieving both energy recycling and savings due to reduced voltage overshoots. The light-to-heavy transient response is improved by reducing the equivalent inductance of the primary transformer winding to its leakage value. Compared to an equivalent buck converter, experiment results on a 6 V-to-1 V, 3 W prototype show three times smaller maximum output voltage deviation during load transients and, for frequently changing loads, about 7% decrease in power losses.

Modern switch-mode power supplies (SMPS) used for point-of-load (PoL) applications need to meet increasingly stringent requirements on voltage regulation, while minimizing physical volume and optimizing conversion efficiency. The focus of this thesis is the voltage regulation capability of low-power PoL converters during load transients. The main objective is to investigate converter topologies and control techniques that can achieve fast and smooth transient performance without significant penalty in volume and efficiency. The digital control method is used due to its ability to implement sophisticated control algorithms. The first part of this thesis investigates a dual output stages converter, with a small auxiliary output stage connected in parallel with the main output stage. While the main output stage is responsible for steady-state operation and designed to achieve optimum efficiency, the auxiliary stage is activated when a load transient occurs, to help suppress voltage deviation. Experimental results on a 6 V-to-1 V, 3W buck converter shows 35% improvement in peak transient voltage deviation while maintaining the same efficiency profile, compared to an equivalent buck converter. The second part of this thesis introduces a flyback-transformer based buck (FTBB) converter. In this topology, the conventional buck inductor is replaced with the primary winding of the flyback transformer, an extra switch, and a set of small auxiliary switches on the secondary side. During heavy-to-light load transients the inductor current is steered away from the output capacitor to the input port, achieving both energy recycling and savings due to reduced voltage overshoots. The light-to-heavy transient response is improved by reducing the equivalent inductance of the primary transformer winding to its leakage value. Compared to an equivalent buck converter, experiment results on a 6 V-to-1 V, 3 W prototype show three times smaller maximum output voltage deviation during load transients and, for frequently changing loads, about 7% decrease in power losses.

Στις μέρες μας, οι ολοένα αυξανόμενες ενεργειακές ανάγκες καθώς και οι η μόλυνση του περιβάλλοντος είναι οι κύριοι λόγοι που η χρήση των ανανεώσιμων πηγών ενέργειας στα σύγχρονα συστήματα ενέργειας έχει αυξηθεί τις τελευταίες δεκαετίες. Τα φωτοβολταϊκά συστήματα είναι μια από τις πιο συνήθεις και αποτελεσματικές ανανεώσιμων πηγών για συνδεδεμένα στο δίκτυο ή αυτόνομα συστήματα. Ο σκοπός της παρούσας εργασίας είναι η μελέτη και προσομοίωση έλεγχου σε μετατροπέα δυο βαθμίδων για σύνδεση φωτοβολταικού συστήματος. Αρχικά, θα μελετήσουμε θεωρητικά διάφορους τύπους τοπολογιών που περιλαμβάνουν αντιστροφέα, στην περίπτωση μας, θα μοντελοποιήσουμε και προσομοιώσουμε ένα DC-DC μετατροπέα σε σύνδεση αλυσίδας με έναν τριφασικό DC-AC αντιστροφέα σε ένα απομονωμένο σύστημα. Ειδικότερα θα παρουσιάσουμε θεωρητικά και πειραματικά αποτελέσματα έλεγχου της τάσης εξόδου του μετατροπέα. Το βασικό κομμάτι αυτής της εργασίας είναι τα αποτέλεσμα του ελεγκτή που είναι βασισμένος στην παθητικότητα διασύνδεσης και εκχώρηση απόσβεσης (IDA PBC). Τέλος, θα μοντελοποιήσουμε και προσομοιώσουμε τον DC-AC μετατροπέα, του οποίου ελέγχουμε την τάση εξόδου από τους γνωστούς μας σε όλους αναλογικούς-ολοκληρωτικούς (PI) ελεγκτές. / Nowadays, increased energy needs and the increasing pollution levels of the environment are the main reasons that usage of renewable energy sources to modern power systems has significantly increased in the last decades. Photovoltaic (PV) generator systems are one of the most common and efficient renewable energy applications for grid-connected or stand-alone systems. The aim of the present thesis is the study and the simulation of control of a two level power converter used in photovoltaic systems. Firstly, we will study theoretically different types of topologies that include inverters, in our case, we model and simulate a DC-DC boost power converter string connected with a three phase DC-AC inverter to a stand-alone system. Especially we will present theoretical and experimental results controlling the DC-DC converter output voltage. The basic part of this thesis are the results of the controller, which is designed following the passivity-based interconnection and damping assignment methodology (IDA PBC). Finally, we will model and simulate the DC-AC inverter, where its output voltage is controlled by the well-known, proportional-integral (PI) controllers.

abstract: The development of a Solid State Transformer (SST) that incorporates a DC-DC multiport converter to integrate both photovoltaic (PV) power generation and battery energy storage is presented in this dissertation. The DC-DC stage is based on a quad-active-bridge (QAB) converter which not only provides isolation for the load, but also for the PV and storage. The AC-DC stage is implemented with a pulse-width-modulated (PWM) single phase rectifier. A unified gyrator-based average model is developed for a general multi-active-bridge (MAB) converter controlled through phase-shift modulation (PSM). Expressions to determine the power rating of the MAB ports are also derived. The developed gyrator-based average model is applied to the QAB converter for faster simulations of the proposed SST during the control design process as well for deriving the state-space representation of the plant. Both linear quadratic regulator (LQR) and single-input-single-output (SISO) types of controllers are designed for the DC-DC stage. A novel technique that complements the SISO controller by taking into account the cross-coupling characteristics of the QAB converter is also presented herein. Cascaded SISO controllers are designed for the AC-DC stage. The QAB demanded power is calculated at the QAB controls and then fed into the rectifier controls in order to minimize the effect of the interaction between the two SST stages. The dynamic performance of the designed control loops based on the proposed control strategies are verified through extensive simulation of the SST average and switching models. The experimental results presented herein show that the transient responses for each control strategy match those from the simulations results thus validating them. / Dissertation/Thesis / Ph.D. Electrical Engineering 2011

abstract: Current sensing ability is one of the most desirable features of contemporary current or voltage mode controlled DC-DC converters. Current sensing can be used for over load protection, multi-stage converter load balancing, current-mode control, multi-phase converter current-sharing, load independent control, power efficiency improvement etc. There are handful existing approaches for current sensing such as external resistor sensing, triode mode current mirroring, observer sensing, Hall-Effect sensors, transformers, DC Resistance (DCR) sensing, Gm-C filter sensing etc. However, each method has one or more issues that prevent them from being successfully applied in DC-DC converter, e.g. low accuracy, discontinuous sensing nature, high sensitivity to switching noise, high cost, requirement of known external power filter components, bulky size, etc. In this dissertation, an offset-independent inductor Built-In Self Test (BIST) architecture is proposed which is able to measure the inductor inductance and DCR. The measured DCR enables the proposed continuous, lossless, average current sensing scheme. A digital Voltage Mode Control (VMC) DC-DC buck converter with the inductor BIST and current sensing architecture is designed, fabricated, and experimentally tested. The average measurement errors for inductance, DCR and current sensing are 2.1%, 3.6%, and 1.5% respectively. For the 3.5mm by 3.5mm die area, inductor BIST and current sensing circuits including related pins only consume 5.2% of the die area. BIST mode draws 40mA current for a maximum time period of 200us upon start-up and the continuous current sensing consumes about 400uA quiescent current. This buck converter utilizes an adaptive compensator. It could update compensator internally so that the overall system has a proper loop response for large range inductance and load current. Next, a digital Average Current Mode Control (ACMC) DC-DC buck converter with the proposed average current sensing circuits is designed and tested. To reduce chip area and power consumption, a 9 bits hybrid Digital Pulse Width Modulator (DPWM) which uses a Mixed-mode DLL (MDLL) is also proposed. The DC-DC converter has a maximum of 12V input, 1-11 V output range, and a maximum of 3W output power. The maximum error of one least significant bit (LSB) delay of the proposed DPWM is less than 1%. / Dissertation/Thesis / Ph.D. Electrical Engineering 2011