Este trabalho propÃe o estudo de uma nova topologia, com dois estÃgios, de um conversor estÃtico, onde existe um fluxo de potÃncia auxiliar com o objetivo de aumentar o rendimento do sistema. O primeiro estÃgio à um conversor CA-CC com correÃÃo do fator de potÃncia (PFC) e o segundo estÃgio à um conversor CC-CC isolado em alta frequÃncia. Os dois estÃgios do conversor proposto sÃo modelados por equaÃÃes diferenciais e atravÃs desses modelos sÃo desenvolvidas tÃcnicas de controle nÃo linear para o funcionamento dos conversores em malha fechada. A correÃÃo do fator de potÃncia do primeiro estÃgio à realizada pela tÃcnica de controle PBC (passivity-based control), enquanto que a tensÃo de saÃda do primeiro estÃgio à realizada pelo controle I&I (immersion and invariance). O segundo estÃgio necessita controlar somente a tensÃo de saÃda atravÃs do controle backstepping, por se tratar de um conversor CC-CC. / This work proposes a study of a new static converter topology with two stages, where the first is an AC-DC converter with PFC and the second is a DC-DC converter isolated in high-frequency. In addition, the static converter has a secondary power flow to achieve a better efficiency from the system. The two converterâs stages are modeled as differential equations, and through those models nonlinear control techniques are developed for close loop operation. The power-factor correction in the first stage is performed by the PBC (passivity-based control) control technique, while the output voltage from the first stage is performed by the I&I (immersion and invariance) control. As the second stage is a DC-DC converter, it only needs to control the output voltage, which is achieved through the backstepping control.

In this thesis, a test system is designed and implemented in order to evaluate the basic electrical performance and determine the parameters of ultracapacitors (UC). The implemented UC test system is based on power electronics converters and it is capable of charging and discharging the UC under test with predetermined current profiles. The charging operation is provided by a configuration involving the AC utility grid, a step-down transformer, a diode bridge, and a DC bus filter capacitor followed by a step-down DC-DC converter. The energy stored in the UC under test, as a result of the charging operation, is discharged to a resistor bank through a step-up DC-DC converter and a DC chopper structure. The charging and discharging current applied to the UC under test is provided by means of current mode control of power electronics converters. The control mechanism of the power electronics converters and the transition operations between the charging and discharging phases of the test system is realized via a microcontroller supported hardware structure. In the scope of the thesis study, a UC module composed of five serially connected UC cells is constructed. Constant current and constant power tests are applied to the constructed UC module. The performance of the implemented UC test system is investigated by means of computer simulations and experimental results. Further, basic electrical behaviour of the constructed UC module is evaluated and the parameters are extracted experimentally.

This thesis presents a parallel-series two-bridge DC/DC converter topology with the ability to operate with ZVS over a wide input and load range. The intended application is power conditioning systems (PCS) of photovoltaic (PV) arrays used in hybrid renewable energy system architectures. The proposed topology provides two degrees of freedom which allows the PV-PCS to regulate the DC-link voltage, while tracking the maximum power point (MPP) of the PV array. This topology distributes the main power into two bridges and the phase-shift between the two bridges and provides another degree of freedom for the PCS to track the MPP. The proposed topology is also able to achieve soft-switching over a wide range. The power conditioning system shows a modular structure to efficiently transfer the power to the load as the main power is divided between two bridges. In addition, the proposed control scheme provides complete decoupling between the input side controller from the output side controller in order to perform MPPT and regulate the the DC-link voltage simultaneously. A 2kW Experimental prototype has been provided to validate the feasibility and performance of the converter. Experimental results prove that the converter is able to regulate the DC-link voltage and track the maximum power extracted from the PV array simultaneously. / Thesis (Master, Electrical & Computer Engineering) -- Queen's University, 2012-04-18 19:51:43.405

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Master of Science / Department of Electrical and Computer Engineering / Sanjoy Das / Noel Schulz / Electrical power, although convenient form of energy to distribute and use, cannot easily be stored in large quantities economically. Most electrical power generated by utility plants is consumed simultaneously in real time. However, in some cases, energy storage systems become crucial when power generated from sources does not fulfill peak power load demand in a power system or energy storage systems are needed as backup. Due to these reasons, various technologies such as batteries, ultracapacitors (UC), superconducting magnetic energy storage (SEMS) and flywheels are beneficial options for energy storage systems. Shipboard power systems must use one or more energy storage systems in order to backup the existing power system if locally generated power is unavailable. This will lessen the effect of voltage sags on power quality, and improve system reliability. This report mainly focuses on the design of a Boost DC-DC converter and the integration of that converter with a previously designed battery storage model, as well as the effect of varying loads at the end of the converter.

Recent portable electronic technologies require the power management circuit be efficient, small and cost effective. The switched-capacitor (SC) converter provides a trade-off between the efficiency, the size and the cost that is desirable in many of these new portable technologies. This dissertation investigates different circuit techniques and SC converter topologies to make the SC converters fully adapt to the portable system requirements. To make the SC converter efficient over a wide range of input and output voltages, a family of SC power stages with multiple gain ratio (GR) is developed. Multiple GR allows the converter to provide step-down or step-up voltage conversion while increasing the average efficiency of the converter. These power stages are also capable of providing interleaving regulation that has been proved to be effective in reducing the input and the output noise of the converter. Unlike conventional interleaving, the technique developed in this research uses fewer switches and capacitors. The research also contributes in developing circuit techniques such as charge recycling in the bottom plate parasitic capacitors, local gate driving and adaptive body biasing to reduce the power loss in monolithic SC converter implementation. To control the SC power stage for accurate regulation and fast transient response, a control scheme named adaptive gain/pulse control is developed. The research also investigates the use of multipath compensation scheme in SC converters for ultra fast and low noise performance. The techniques and the topologies developed for SC converters in this research can be effectively implemented in the portable devices to reduce cost, and improve efficiency which leads to longer battery life and circuit implementation using smaller areas.

Offshore wind power is attracting increasing levels of research and investment. The use of HVDC transmission and the development of DC grids are topics with similar high levels of interest that go hand in hand with the development of large scale, far from shore wind farms. Despite increased capital cost of some components, DC power transmission can have significant advantages over AC transmission, in particular in the offshore environment. These advantages are well established for large scale, long distance point to point transmission. This thesis assesses the suitability of a multi-terminal DC power collection network, with short cables and relatively small amounts of power, addresses a number of the technical challenges in realising such a network and shows methods for overall system cost reduction. Technical and modelling challenges result from the interaction between power electronic DC-DC converters and the cables in a DC transmission network. In particular, the propagation of the ripple current in bipole DC transmission cables constructed with a metallic sheath and armour is examined in detail. The finite element method is used to predict the response of the cable to the ripple current produced by the converters. These results are used along with wave propagation theory to demonstrate that cable design plays a crucial role in the behaviour of the DC system. The frequency dependent cable models are then integrated with time domain DC-DC converter models. The work in the thesis is, broadly, in two parts. First, it is demonstrated that care and accuracy are required in modelling the cables in the DC transmission system and appropriate models are implemented and validated. Second, these models are combined with DC-DC converter models and used to demonstrate the practicality of the DC grid, make design recommendations and assess its suitability when compared with alternative approaches (e.g. AC collection and/or transmission).

Este trabalho tem como principal objetivo apresentar uma investigação e uma metodologia de projeto, até o presente momento inédita, de uma topologia de um conversor ca-cc trifásico de comutação forçada. Através da análise desenvolvida neste trabalho, determina-se um modelo matemático do conversor ca-cc para os quatro modos que determinam o processo da comutação nesse circuito. Esse modelo resulta em sistemas de equações fundamentais na forma de equações diferenciais, que são resolvidos com a finalidade de determinar o comportamento do circuito do conversor durante o processo de comutação e de obter uma metodologia de projeto. Com o objetivo de validar a investigação e o método de projeto foi implementada simulação computacional, no programa Simmon, dos intervalos de comutação do conversor ca-cc de comutação forçada. Essa estrutura, que durante a sua operação emprega tanto a comutação forçada como a natural, quando comparada com os conversores de comutação natural apresenta várias vantagens, como um alto fator de potência e a eliminação dos harmônicos de baixa ordem na linha ca (utilização da comutação forçada com a técnica de modulação por largura de pulso PWM), como mostra vátios trabalhos publicados, que estão desctitos na parte de referências bibliográficas deste texto. / The main objective of this work is to present an investigation and a design method, which up to now is not available in the literature, of a three-phase force commutated ac-dc convetier. From the analysis developed in this work one obtains the mathematical model of the ac-dc converter for its four modes of commutation, which determine the commutation process in the converter circuit. The fundamental equations, which have been written in the form of differential equations, are solved to determine the behaviour of the converter circuit during commutation, and also to obtain a design method. To validate the analysis and the design procedure, computer simulation of the commutation intervals of the ac-dc converter was implemented using the program Simnon. The three-phase ac-dc converter, which uses both forced and line commutation, when compared with the conventional line commutated converter, presents several advantages as a high power factor and the elimination of lower harmonics of the ac line (utilization of the forced commutation and the pulse width modulation strategy), as it is shown in several published works, which can be found in the references of this work.

Este trabalho apresenta um conversor CC - CC baseado em Capacitores Chaveados de 6 fases e tempos intercalados com o objetivo de coletar energia fotovoltaica projetado em tecnologia CMOS de 130 nm para ser usado em aplicações em Internet das Coisas e Nós Sensores. Ele rastreia o máximo ponto de entrega de energia de um painel fotovoltaico policristalino de 3 cm x 3 cm através de modulação da frequência de chaveamento com o objetivo de carregar baterias. A razão da tensão de circuito aberto foi a estratégia de rastreio escolhida. O conversor foi projetado em uma tecnologia CMOS de 130 nm e alcança uma eficiência de 90 % para potencias de entrada maiores do que 30 mW e pode operar com tensões que vão de 1.25 até 1.8 V, resultando em saídas que vão de 2.5 até 3.6, respectivamente. Os circuitos periféricos também incluem uma proteção contra sobre tensão na saída de 3.6 V e circuitos para controle, que consomem um total máximo de potência estática de 850 A em 3.3 V de alimentação. O layout completo ocupa uma área de 300 x 700 m2 de silício. Os únicos componentes não integrados são 6x100 nF capacitores.

Power electronics have a significant role in modern electrical devices, for instance, hybrid electric vehicles. Power electronics are the technology in between the source and the load circuits and can convert the power from dc to ac or from dc to ac. There are also many types of dc-dc converters, like such as boost and buck converters, which exhibit switching ripple behavior. A boost converter increases the output voltage (with respect to the input voltage) and reduces the output current. A buck converter decreases the output voltage and increases the output current. Many models are used to predict the behavior of the boost and buck converters. The detailed (DET), state-space averaged (SSA), and generalized averaging method (GAM) models are capable of predicting the average behavior of dc-dc converters. For DET and GAM models, the rippling behavior can also be predicted. These models differ in terms of required run time, existence of constant equilibrium points, and accuracy. The DET model has a long run time and does not have constant equilibrium, but it is very accurate. The SSA technique is a mathematical and time-invariant model that capable of describing the behavior of a dc-dc boost converters. It can derive the small signal ac equations of a switching converter and is used to illustrate the average behavior of any linear or nonlinear system in converters. The SSA does not take extensive runtime simulation and has constant equilibrium points, and can be applied to continuous, discrete and sample data systems. The GAM model can predict the average and ripple behavior in power electronic systems and has constant equilibrium and fast run time. However, it has a numerical stability issue. The integrator stabilized multifrequency averaging (ISMFA) model is employed to solve the stability issue in the GAM model, but it is a complicated dynamic method and has restrictions in its process. In the present study, a simplified but stable GAM model is introduced to predict the average and ripple behavior of boost dc-dc converters and to overcome the limitations of other methods. In this work, the stabilized GAM model has been used for a dc-dc boost converters. The stability of the proposed model is analyzed. The performance of the improved GAM model is compared with the DET, SSA, and GAM models. The results show that the stabilized GAM model is stable with the additional poles created by the GAM assignable by parameter choice. The new GAM model predicts the same results as the existing GAM method without the underlying stability concerns. The stabilized GAM model exhibits constant ii equilibrium point and requires significantly lower run times than the DET model, but it is also able to predict the ripple performance of the converter. The stabilized GAM model does not take a long run time, is less complicated, has fewer restrictions, has constant equilibrium and internal stability, and has more straightforward implementation than other models, like the ISMFA model. It represents a suitable alternative to DET models when high accuracy simulations are desired without long simulation run times.