A system to improve efficiency performance of a DC-DC converter is simulated and built. The proposed system combines multiple DC-DC converters in parallel and implements a digital control scheme and load-share controller. A model of the system is developed in MATLAB Simulink and the model demonstrates the improved converter’s efficiency particularly at low load conditions. This simulation is then designed into a hardware system running three DC-DC converters in parallel, controlled by a microcontroller and a load-share controller. The hardware also confirms the simulation results, although some hardware refinements are evident as simulation results are superior. The system is designed to be scalable in the number of converters and the total output power, as well as being DC-DC converter topology-independent. Simulation results show the system maintaining better than 88 % efficiency over almost 90 % of the load range of the system. This system could be implemented where dynamic loads typically occur, such as in electric vehicle charging.

This thesis explores high voltage converter circuits for MEMS applications using micromachined devices. A novel MEMS based tunable DC-DC converter has been developed. Conventional high voltage converters based on charge pumps are unable to convert voltages to higher than few tens of volts due to power handling limitations of the CMOS components. In order to overcome this limitation a high voltage circuit has been proposed, which when integrated with micromachined switches will generate output voltages in the range of 100 Volts. The converter is based on a two phase switched capacitor circuit, and allows regulation of voltage conversion ratio. Three prototype circuits have been built for proof of concept. A test program has been written for synchronized CPLD based control of the switched capacitors. Individual capacitor fabrication technology is explored using two methods - Porous Silicon and DRIE processing. A micromachined capacitor bank has also been fabricated in silicon using a novel process sequence which provides for critical real estate savings and integration benefits. It enables on-chip integration of numerous microcapacitors, without losing customized configurability of the capacitor bank. The technique utilizes polyimide to facilitate lithography on a highly contoured surface. Plain capacitors have been fabricated on silicon with oxide-nitride-oxide stack being used as the dielectric to provide a building block for further fabrication of a variety of capacitors.

Digitally controlled switching DC-DC converters have recently emerged as an attractive alternative to conventional switching converters based on analog control techniques. This research focuses on eliminating the issues associated with the state of the art switching converters by proposing three novel control techniques: (1) a digitally controlled Buck-Boost converter uses a fully synthesized constant ON/OFF time-based fractional-N controller to regulate the output over a 3.3V-to-5.5V input voltage range and provides seamless transition from buck to buck-boost modes (2) a hysteretic buck converter that employs a highly digital hybrid voltage/current mode control to regulate output voltage and switching frequency independently (3) a 10MHz continuous time PID controller using time based signal processing which alleviates the speed limitations associated with conventional analog and digital. All the three techniques employ digitally assisted control techniques and require no external compensation thus making the controllers fully integrated and highly cost effective. / Graduation date: 2013 / Access restricted to the OSU Community at author's request from June 25, 2012 - June 25, 2014

In this dissertation, new high frequency link power conversion systems for the fuel cell power conditioning are proposed to improve the performance and optimize the cost, size, and weight of the power conversion systems. The first study proposes a new soft switching technique for the phase-shift controlled bi-directional dc-dc converter. The described dc-dc converter employs a low profile high frequency transformer and two active full-bridge converters for bidirectional power flow capability. The proposed new soft switching technique guarantees soft switching over wide range from no load to full load without any additional circuit components. The load range for proposed soft switching technique is analyzed by mathematical approach with equivalent circuits and verified by experiments. The second study describes a boost converter cascaded high frequency link direct dc-ac converter suitable for fuel cell power sources. A new multi-loop control for a boost converter to reduce the low frequency input current harmonics drawn from the fuel cell is proposed, and a new PWM technique for the cycloconverter at the secondary to reject the low order harmonics in the output voltages is presented. The performance of the proposed scheme is verified by the various simulations and experiments, and their trade-offs are described in detail using mathematical evaluation approach. The third study proposes a current-fed high frequency link direct dc-ac converter suitable for residential fuel cell power systems. The high frequency full-bridge inverter at the primary generates sinusoidally PWM modulated current pulses with zero current switching (ZCS), and the cycloconverter at the secondary which consists of only two bidirectional switches and output filter capacitors produces sinusoidally modulated 60Hz split single phase output voltage waveforms with near zero current switching. The active harmonic filter connected to the input terminal compensates the low order input current harmonics drawn from the fuel cell without long-term energy storage devices such as batteries and super capacitors.

This thesis mainly presents the design and implementation of a flyback converter with single-stage power factor correction. In the beginning, we propose different power factor collection (PFC) techniques referring to the inductor current of converter under three kinds of operation modes. In the continuous mode, we adopt the nonlinear-carrier control (NLC). Then, in the discontinuous mode and boundary mode, voltage-follower control (VFC) and transition mode technique control (TM) are adopted respectively. As to the converter analysis, we derive and verify the results of a small-signal model and perform equivalent circuit analysis by state-space averaging method, loss-free resistor (LFR) model, averaging method for two-time-scale system (AM), and current injected equivalent circuit approach (CIECA). Results derived from the above-mentioned models are compared and verified to be accurate of the system model. Furthermore, the control function and element design are implemented by simulation. We perform a PI controller to achieve better power factor based on results of analysis of the time and frequency domains analysis. Finally, three sets of different hardware are fabricated and verified depending on measured result and theoretical simulation.

Switching mode DC/DC converters are critical building blocks in portable devices and hence their power efficiency, accuracy and cost are a major issue. The primary focus of this thesis is to address these critical issues.This thesis focuses on the different methods of feedback control loop which are employed in the switching mode DC/DC converters such as voltage mode control and current mode control. It also discusses about the structure of buck converter and tries to find an efficient solution for stepping-down the DC voltage level in ultra-low power applications. Based on this analysis, a 20 MHz voltage mode DC/DC buck converter with an on-chip compensated error amplifier in 65 nm CMOS process is designed and implemented.The power efficiency has been improved by sizing the power switches to have a low parasitic output and gate capacitances to reduce the capacitive and gate-drive losses. Also the error amplifier biasing current is chosen a small value (12.5 μA) to reduce the power dissipations in the control loop of the system. The maximum 84% power efficiency is achieved at 1.1 V to 500 mV conversion, above 81% efficiency can be achieved at load current from 0.5 mA to 1.26 mA. Due to wide bandwidth error amplifier and proper compensation network the fast transient response with settling time around 45 μs is achieved.

This thesis work describes the implementation perspective of an integrated high efficiency DC-DC converter implemented in 65 nm CMOS. The implemented system employs the Buck converter topology to down-convert the input battery voltages. This converter offers its use as a power management unit in portable battery operated devices. This thesis work includes the description of a basic Buck converter along with the various key equations involved which describe the Buck operation as well as are used to deduce the requirements for the various internal building blocks of the system. A detailed description of the operation as well as the design of each of the building blocks is included. The implemented system can convert the input battery voltage in the range of 2.3 V to 3.6 V into an output supply voltage of 1.6 V. The system uses dual-mode feedback control to maintain the output voltage at 1.6 V. For the low load currents the PFM feedback control is used and for the higher load currents the PWM feedback control is used. This converter can supply load currents from 0 to 300 mA with efficiency above 85%. The static line regulation of the system is < 0.1% and the load regulation of the system is < 0.3%. A digital soft-start circuit is implemented in this system. The system also includes the capability to trim the output voltage in ~14 mV steps depending on the 4-bit input digital code.

Switching power converters are an indispensable part of every battery-operated consumer electronic product, nourishing regulated voltages to various subsystems. In these circuits, sensing the inductor current is not only necessary for protection and control but also is critical to be done in a lossless and accurate fashion for state-of-the-art advanced control techniques, which are devised to optimize transient response, increase the efficiency over a wide range of loads, eliminate off-chip compensation networks, and integrate the power inductor. However, unavailability of a universal, integrable, lossless, and accurate current-sensing technique impedes the realization of those advanced techniques and limit their applications. Unfortunately, use of a conventional series sense resistor is not recommended in high-performance, high-power switching regulators where more than 90% efficiency is required because of their high current levels. A handful of lossless current-sensing techniques are available but their accuracies are significantly lower than the traditional sense resistor scheme. Among available lossless but not accurate techniques, an off-chip, filter-based method that uses a tuned filter across the inductor to estimate current flow and its accuracy is dependent on the inductance and its equivalent series resistance (ESR) was selected for improvement because of its inherent continuous and low-noise operation. A schemes is proposed to adapt the filter technique for integration by automatically adjusting bandwidth and gain of an on-chip programmable gm-C filter to the off-chip power inductor during the system start-up through measuring the inductance and its ESR with on-chip generated test currents. The IC prototype in AMI s 0.5-um CMOS process achieved overall DC and AC gain errors of 8% and 9%, respectively, at 0.8 A DC load and 0.2 A ripple currents for inductors from 4 uH-14 uH and ESR from 48 mOhm to 384 mOhm when lossless, state-of-the-art schemes achieve 20 40% error and only when the nominal specifications of power component (power MOSFET or inductor) are known. Moreover, the proposed circuit improved the efficiency of a test bed current-mode controlled switching regulator by more than 2.6% at 0.8 A load compared to the traditional sense resistor technique with a 50 mOhm sense resistor.

The systems which contain coarsely quantized signals are commonly found in applications where the actuators and/or sensors can only output a finite number of levels. This thesis focuses on the problem of synthesizing a finite-level control force for a certain control task, first presenting a systematic design method based on the theory of sliding modes and then applying it to the designs of the class-D audio amplifier and synchronous buck converter. At the first part, a novel three-level modulation technique for a class-D audio amplifier is designed by the sliding mode control theory. The simulated and experimental results conform to the excellent performance of this three-level modulation scheme. In particular, the proposed modulation scheme improves the poor efficiency of a conventional two-level class-D audio amplifier when the audio input signal is small, also excludes the output LC filter. The experiment shows that the designed three-level class-D amplifier achieves a minimum total harmonic distortion plus noise of 0.039% and an efficiency of 85.18%. At the second part, the controller of a synchronous buck converter is designed. The proposed self-oscillating controller stabilizes the buck converter in sliding mode, without the need of a triangular wave generator like the conventional PWM method. A 12V/1.5V synchronous buck converter with proposed control is built in the laboratory. The experiment shows 0.66% of the static output ripple and 3% of the load regulation error in response to the 15A step change of the load current at a slew rate of 50A/£gs.

The traditional AC/DC rectifier usually results in low power factor and serious harmonic distortion and it will bring about the serious pollution to power system. This thesis proposes boost power factor correction technique to solve these problems. First, we aim at power factor correction circuit which need input voltage sensing, to study its operating principle and design consideration, then design applicable voltage compensator by the frequency analysis and perform the simulation and implementation using the developed criterion. In order to prevent the shortcoming that power factor correction circuits with input voltage sensing and complexity is raised for a multiplier must be added to controller, we develop the power factor correction circuit without input voltage sensing. We perform the operating principle and control function by simulation, develop hardware scheme by analog components and place load variation to measure power factor and total harmonic distortion. According to experimental results and simulation, we confirm the new power factor correction circuit. When the full load is placed, the power factor can achieve 0.99 and the total harmonic distortion is lower than 8%.