Three different chip design topics associated with their respective applications are proposed in this thesis. The first topic is the implementation of an FIFO memory design for 8-to-32 data exchange bus. An FIFO memory architecture is proposed to be utilized in data exchange between processing units which possess non-homogeneous bus widths. Neither arbiter logics nor modules are required in such a design to determine input sequences or output sequences. Hence, the delay is drastically shortened. The second topic is focused on the implementation of an analog front-end of digital cordless headset baseband controller. The integrated analog and digital interface IC provides an interface for analog and digital communication. It converts an analog signal into an 8-bit digital signal, which will be processed by the baseband controller. It also converts an 8-bit digital voice data into an analog voice signal. In addition, a built-in oscillator is included in the design, which provides a global clock signal. The third topic is to carry out an DC/DC converter with a built-in voltage detector. The converter can convert 1.5V input voltage to 2.7V output voltage. A portable system can use only one single battery to power on by this circuit. It also contains a voltage detector to indicate whether the output voltage meets the pre-determined level.

In this thesis analysis and design of a wide input range DC-DC converter is proposed along with a robust power control scheme. The proposed converter and its control is designed to be compatible to a fuel cell power source, which exhibits 2:1 voltage variation as well as a slow transient response. The proposed approach consists of two stages: a primary three-level boost converter stage cascaded with a high frequency, isolated boost converter topology, which provides a higher voltage gain and isolation from the input source. The function of the first boost converter stage is to maintain a constant voltage at the input of the cascaded DC-DC converter to ensure optimal performance characteristics with high efficiency. At the output of the first boost converter a battery or ultracapacitor energy storage is connected to take care of the fuel cell slow transient response (200 watts/min). The robust features of the proposed control system ensure a constant output DC voltage for a variety of load fluctuations, thus limiting the power being delivered by the fuel cell during a load transient. Moreover, the proposed configuration simplifies the power control management and can interact with the fuel cell controller. The simulation results and the experimental results confirm the feasibility of the proposed system.

This thesis presents the design of a step-up DC-DC converter with on-chip coupled inductors. Circuit theory of DC-DC converters in general is presented, after which a mathematical model of a step up converter is developed. A circuit implementation optimized from results of the mathematical model follows. For a completely integrated step-up converter, the inductor size is reduced by increasing the frequency of operation and using a circuit topology that employs coupled inductors. Spiral inductors are also studied to achieve maximum quality factor and inductance. A fast PWM control system is used to regulate the high-frequency converter. The fabrication was done in standard TSMC 0.18-$\mu$m digital CMOS process for four circuits, including one with a conventional topology and the others with a coupled inductor topology with varying inductor geometries. Measurement results from a fabricated prototype have been presented, demonstrating the functionality of the four circuits with coupled inductors on the fabricated chip and the improvement of the coupled solution over the conventional design. It is demonstrated that the circuits with coupled inductors have a significant improvement in performance based on conversion ratio and efficiency. Finally, the design process is evaluated and recommendations are made for future work. Furthermore, a new self-oscillating and robust control system is proposed that enables simpler and more efficient regulation for high-frequency converters such as one developed for this thesis.

Improved transient performance and converter miniaturization are the major driving factors behind high frequency operation of switching power supplies. However, high speed operation is limited by topology, control, semiconductor, and packaging technologies. The inherent mitigation of switching loss in resonant converters makes them prime candidates for use when the limits of switching frequency are pushed. The goal of this thesis is to address two areas that practically limit the achievable switching frequency of resonant topologies. Traditional control methods based on single cycle response are impractical at high frequency; forcing the use of pulse density modulation (PDM) techniques. However, existing pulse density modulation strategies for resonant converters in dc/dc applications suffer from: • High semiconductor current stress. • Slow response and large filter size determined by the low modulating frequency. • Possibly operating at fractions of resonant cycles leading to switching loss; thereby limiting the modulating frequency. A series resonant converter with variable frequency PDM (VF-PDM) with integral resonant cycle control is presented to overcome the limitations of existing PDM techniques to enable efficient operation with high switching frequency and modulating frequency. The operation of the circuit is presented and analyzed, with a design procedure given to achieve fast transient performance, small filter size, and high efficiency across the load range with current stress comparable to conventional control techniques. It is shown that digital implementation of the controller can achieve favourable results with a clock frequency four times greater than the switching frequency. Driving the synchronous rectifiers is a considerable challenge in high current applications operating at high switching frequency. Resonant gate drivers with continuous inductor current experience excessive conduction loss, while discontinuous current drivers are subject to slow transitions and high peak current. Current source drivers suffer from high component count and increased conduction loss when applied to complementary switches. A dual-channel current source driver is presented as a means of driving two complementary switches. A single coupled inductor with discontinuous current facilitates low conduction loss by transferring charge between the MOSFET gates to reduce the number of semiconductors in the current path, and reducing the number of conduction intervals. The operation of the circuit is analyzed, and a design procedure based on minimization of the total synchronous rectifier loss is presented. Implementation of the digital logic to control the driver is discussed. Experimental results at megahertz operating frequencies are presented for both areas addressed to verify the theoretical results. / Thesis (Ph.D, Electrical & Computer Engineering) -- Queen's University, 2012-09-09 20:43:56.997

The proposed research objective is to develop, test, and evaluate a mixer and charger-supply CMOS IC that derives and mixes energy and power from mixed sources to accurately supply a miniaturized system. Since the energy-dense source stores more energy than the power-dense source while the latter supplies more power than the former, the proposed research aims to develop an IC that automatically selects how much and from which source to draw power to maximize lifetime per unit volume. Today, the state of the art lacks the intelligence and capability to select the most appropriate source from which to extract power to supply the time-varying needs of a small system. As such, the underlying objective and benefit of this research is to reduce the size of a complete electronic system so that wireless sensors and biomedical implants, for example, as a whole, perform well, operate for extended periods, and integrate into tiny spaces.

The United Nations has declared 2012 the ``International Year of Sustainable Energy for All''. A substantial portion of the world's population (some 1.3 billion people) currently live without electricity and development efforts to reach them are progressing relatively slowly. This thesis follows the development of a technology which can enable community owned and operated microgrids to emerge based solely on the local supply and demand of that community. Although this thesis ends with the technical analysis of a DC/DC converter, there is a significant amount of background to cover in order to properly understand the context in which it will be used. After providing an introduction into typical rural electrification efforts and pointing out some of the shortcomings of these projects, this thesis introduces some cutting edge efforts which combine solar home system technology with cellular technology and discusses the benefits of such a marriage of technology. Next, the research proposes some tweaks to this novel technology and provides a high-level economic demonstration of the spread of solar home systems in a community based on these modifications. It then takes this concept even further and proposes the addition of a DC/DC converter which could turn these individual solar home systems into a proper microgrid. This thesis elaborates on the development process of simulating such a microgrid in PSCAD, including the individual components of a solar home system and the specific task of designing the converter which would form the backbone of the proposed microgrid. The final simulations and analyses demonstrate a microgrid that is both technically and economically feasible for developing world applications.

abstract: During the past decade, different kinds of fancy functions are developed in portable electronic devices. This trend triggers the research of how to enhance battery lifetime to meet the requirement of fast growing demand of power in portable devices. DC-DC converter is the connection configuration between the battery and the functional circuitry. A good design of DC-DC converter will maximize the power efficiency and stabilize the power supply of following stages. As the representative of the DC-DC converter, Buck converter, which is a step down DC-DC converter that the output voltage level is smaller than the input voltage level, is the best-fit sample to start with. Digital control for DC-DC converters reduces noise sensitivity and enhances process, voltage and temperature (PVT) tolerance compared with analog control method. Also it will reduce the chip area and cost correspondingly. In battery-friendly perspective, current mode control has its advantage in over-current protection and parallel current sharing, which can form different structures to extend battery lifetime. In the thesis, the method to implement digitally average current mode control is introduced; including the FPGA based digital controller design flow. Based on the behavioral model of the close loop Buck converter with digital current control, the first FPGA based average current mode controller is burned into board and tested. With the analysis, the design metric of average current mode control is provided in the study. This will be the guideline of the parallel structure of future research. / Dissertation/Thesis / M.S. Electrical Engineering 2011

Made available in DSpace on 2014-06-11T19:22:32Z (GMT). No. of bitstreams: 0 Previous issue date: 2011-12-15Bitstream added on 2014-06-13T18:49:30Z : No. of bitstreams: 1 silva_lsc_me_ilha.pdf: 2144752 bytes, checksum: 39f1f729cd628eedd60a6b582fefd576 (MD5) / Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq) / Este trabalho propõe um conversor CA-CC, modulado por largura de pulso (PWM), de elevado fator de potência, dotado de um controle variável da razão cíclica. O estágio de potência do conversor pré-regulador do fator de potência (PFP) proposto é composto por múltiplas células entrelaçadas. A integração das técnicas de entrelaçamento (interleaving) à técnica de eliminação da ponte retificadora da entrada (bridgeless) busca diminuir as perdas de energia e distribuir os esforços de corrente nos semicondutores da estrutura conversora de potência. O levantamento bibliográfico foi realizado com intuito de analisar resultados e características de conversores CA-CC baseados em estruturas PFP boost modificadas. Comparações foram realizadas levando em consideração as características de distorção harmônica, fator de potência, complexidade do circuito de controle, eficiência energética, esforços nos semicondutores de potência e emissão de interferência eletromagnética (IEM). O conversor proposto é então equacionado e os valores dos componentes acumuladores de energia determinados são escritos como função das especificações de projeto. Análises gráficas indicam o comportamento da distorção harmônica e do fator de potência da estrutura atuando em diferentes níveis de tensão. Simulações são realizadas como forma de comprovar a eficácia do sistema conversor no que se refere à correção do fator de potência e à distribuição dos esforços nos semicondutores de potência. Os principais resultados estão dispostos em tabelas comparativas, que indicam um fator de potência praticamente unitário. O sistema de regulação da tensão saída, testado via simulação computacional, apresenta resultados que demonstram boa dinâmica na resposta transitória e erro nulo a regime frente às variações de carga e afundamentos na... / This paper proposes an AC-DC converter, pulse width modulated (PWM) with high power factor and a variable duty cycle control. The power factor preregulator (PFP) converter proposed is composed of multiple bridgeless boost interleaved cells. The integration of these techniques allows a reduction in the energy losses and sharing the stress in power semiconductors. The literature review was performed in order to analyze the results and characteristics of AC-DC converters based on modified PFC boost structures. Comparisons were made taking into account the characteristics of harmonic distortion, power factor, complexity of control circuitry, energy efficiency, current stress in power semiconductors, and emission of electromagnetic interference (EMI). The proposed converter is mathematically equated and the values of the reactive components are written as a function of design specifications. Graphical analysis indicates the behavior of harmonic distortion and power factor of the structure at different voltage levels. Simulations are performed in order to demonstrate compliance of the converter system with respect to the power factor correction and distribution efforts in the power semiconductors. The main results are arranged in comparative tables which indicate power factor very closed to unity. The control system applied to the converter was evaluated through the computer simulations which showed good dynamics at transient response and null steady-state error faced to load variations and sags in the voltage supply. The prototype for the power stage implemented in the laboratory operated according... (Complete abstract click electronic access below)

Dans les nombreuses études actuelles sur le photovoltaïque, on assiste à de grands progrès tant dans le domaine des cellules à haut rendement énergétique, que sur les structures liées à l'exploitation. Afin de tirer parti de toute l'énergie produite, il a paru de tout premier ordre d'orienter les recherches sur les architectures parallèles en bus haute tension. Pour la génération de hautes tensions il est impératif d'utiliser des convertisseurs spécialement adaptés. En effet, si on utilise des convertisseurs classiques on se heurte à la problématique des pertes dans les composants de puissance, et notamment le transistor MOSFET de commutation utilisé pour le découpage. Une première étude a permis de vérifier que les contraintes de tension entraînent pour le transistor des pertes importantes aux tensions élevées. Cette première étude montre que seuls les transistors de faible tension inférieure à 100V ont des caractéristiques intéressantes pour notre application. Une recherche systématique a abouti à l'élaboration d'un convertisseur Boost à couplage magnétique. Grâce au recyclage des énergies parasites, les essais montrent que ce montage est bien adapté à notre application permettant d'obtenir des rendements de plus de 90%. Parmi les différentes stratégies d'extraction de puissance, le MPPT à incrément de conductance a été choisi pour ses qualités de précision et de facilité de mise en œuvre. Chaque panneau équipé d'un convertisseur envoie la puissance recueillie sur le bus haute tension, lui même relié à un onduleur de type SMA / In various studies on photovoltaic, major progresses have been observed, both concerning the cells and also in the field of their use. In order to take advantage of the energy it has been paramount to focus on parallel High Voltage bus. This High Voltage generation requires dedicated converters. In fact, using classical converters implicates important losses in the MOSFET used for switching. In a prior study we could ascertain important losses on transistors when submitted to high voltages as we assumed. It was shown then that only the transistors supporting a voltage less than 100V can be used for our application. A systematic investigation led to the Magnetically Coupled Boost converters. Thanks to the recycling of parasitic losses, our tests show an efficiency superior than 90%. Among the different power extraction strategies, the incremental conductance MPPT was used because of its top of the arts performances and convenience. Every DC/DC implemented panel converter supplies the HVDC bus which, itself, is connected to the SMA inverter

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