Analog-to-digital converters are inevitable in the modern communication systems and there is always a need for the design of low-power converters. There are different A/D architectures to achieve medium resolution at medium speeds and among all those Cyclic/Algorithmic structure stands out due to its low hardware complexity and less die area costs. This thesis aims at discussing the ongoing trend in Cyclic/Algorithmic ADCs and their functionality. Some design techniques are studied on how to implement low power high resolution A/D converters. Also, non-ideal effects of SC implementation for Cyclic A/D converters are explored. Two kinds of Cyclic A/D architectures are compared. One is the conventional Cyclic ADC with RSD technique and the other is Cyclic ADC with Correlated Level Shift (CLS) technique. This ADC is a part of IMST Design + Systems International GmbH project work and was designed and simulated at IMST GmbH. This thesis presents the design of a 12-bit, 1 Msps, Cyclic/Algorithmic Analog-to-Digital Converter (ADC) using the “Redundant Signed Digit (RSD)” algorithm or 1.5-bit/stage architecture with switched-capacitor (SC) implementation. The design was carried out in 130nm CMOS process with a 1.5 V power supply. This ADC dissipates a power of 1.6  mW when run at full speed and works for full-scale input dynamic range. The op-amp used in the Cyclic ADC is a two-stage folded cascode structure with Class A output stage. This op-amp in typical corner dissipates 631 uW power at 1.5 V power supply and achieves a gain of 77 dB with a phase margin of 64° and a GBW of 54 MHz at 2 pF load.

It is essential to secure the implementation of cryptosystems in embedded devices agains side-channel attacks. Namely, in order to resist differential (DPA) attacks, randomization techniques should be employed to decorrelate the data processed by the device from secret key parts resulting in the value of this data. Among the countermeasures that appeared in the literature were those that resulted in a random representation of the key known as the binary signed digit representation (BSD). We have discovered some interesting properties related to the number of possible BSD representations for an integer and we have proposed a different randomization algorithm. We have also carried our study to the $\tau$-adic representation of integers which is employed in elliptic curve cryptosystems (ECCs) using Koblitz curves. We have then dealt with another randomization countermeasure which is based on randomly splitting the key. We have investigated the secure employment of this countermeasure in the context of ECCs.

It is essential to secure the implementation of cryptosystems in embedded devices agains side-channel attacks. Namely, in order to resist differential (DPA) attacks, randomization techniques should be employed to decorrelate the data processed by the device from secret key parts resulting in the value of this data. Among the countermeasures that appeared in the literature were those that resulted in a random representation of the key known as the binary signed digit representation (BSD). We have discovered some interesting properties related to the number of possible BSD representations for an integer and we have proposed a different randomization algorithm. We have also carried our study to the $\tau$-adic representation of integers which is employed in elliptic curve cryptosystems (ECCs) using Koblitz curves. We have then dealt with another randomization countermeasure which is based on randomly splitting the key. We have investigated the secure employment of this countermeasure in the context of ECCs.

Since the Industrial Revolution onward, the technology involved in the music arts caused the works to be a lot of copies, production and distribution. Like early LPs, cassettes, and recent CDs, digital format files and so on, not only changed the way of listening and media habits of audience, but also affected the artists' creative thoughts. For this phenomenon, Adorno and other Frankfurt School members who advocated the concept of ¡§culture industry¡¨ thought mass production could lead to a decline in music quality, resulting in kitsch, superficial cultural goods, and losing its authenticity. Is the situation really so pessimistic? Nowadays, the conception of production and consumption of music has been very different from the past. Do we living in the digital age be able to distinguish which is kitsch, and further to interpret the contemporary authenticity of music arts? In this study, I want to focus on the two core concepts: kitsch and authenticity, and the characteristic of music arts to explain. From Benjamin and Adorno's theoretical context, I try to explore how the evolution of technology eliminate the ¡§aura¡¨ of traditional works, and then caused qualitative changes to the classical music and the popular music as representatives of high culture and popular culture. The boundary between the two is getting indistinct with the advent of postmodern context. In addition, I want to reveal the inherent authenticity of the popular culture by discussing the aspect of its rebellious and subversive ideology, and give another interpretation of the kitsch colure in Adorno¡¦s point. Furthermore, the technology revolution provides new perspectives and techniques for musical creation, and also transforms the meaning of kitsch culture. Here, I attempt to clarify producers / creators how to construct the contemporary music aesthetics, and find out the forward strategy of getting rid of kitsch, returning to the populace. Another approach in this study is consumers¡¦ listening models, including attentively static listening and dynamic body senses, to develop a multi dimension authenticity according to the individual¡¦s different situations and listening attitude. Finally, I explore how the special mobile listening model in the postmodern consumer society associated with the Baudrillard's consumption theory, and try to figure out, in the shadow of late capitalism, how to reject integration and incorporation of kitsch culture, and discover the possible practice of being authentic.

No description available.

Hearing loss has a prevalence of 10.3% in New Zealand, with the Māori population being disproportionately affected compared to the non-Māori population. Hearing loss is an impairment that is under-recognised, under-reported and under-treated. This can be explained by the many existing barriers – the shortage of audiological services, financial cost to an individual seeking treatment, the stigma of both hearing loss and hearing aids, and healthcare seeking rates, particularly among the Māori population. This study aimed to develop a Māori language adaptive digit triplet test that could be offered remotely via the telephone and Internet as a hearing-screening test. Three sets of recordings were made of digit triplets spoken in te reo Māori by a female speaker. Two of these sets were selected for normalisation in speech noise. Normal-hearing participants (8 listeners) with hearing thresholds ≤20 dB HL were tested to establish the intelligibility of the individual recorded digits at various signal-to-noise ratios (-13, -10.5, -8 and -5.5 dB). Psychometric functions were fitted to the intelligibility data, and the digits in each position of the triplet that had the steepest slope were selected as the final test stimuli. The level of each selected digit was then adjusted to achieve equal intelligibility as measured at the midpoints of the psychometric functions. These digits were then assembled into eight equivalent lists of similar difficulty, ready for pilot testing. Due to low participant numbers, the pilot testing phase was not completed. Further development of this test continues as the focus of a follow-on study.

Presbycusis, or age-related hearing loss, is one of the most common chronic conditions to affect adults. On average individuals wait seven years from the time they notice a hearing impairment to the time they seek help from a hearing professional. This delay may have wide reaching implications for public health in the coming decades, as aging populations become more prevalent and as further research assesses the relationship between hearing loss and mental health conditions such as depression and dementia. The development of the New Zealand Hearing Screening Test (NZHST) aims to fulfil a need for a robust hearing screening test that individuals can access from home. This digit triplet test (DTT) will be particularly valuable for those in rural areas where audiological services are sparse and for those who have mobility issues which restrict attendance at clinical appointments. In order to accommodate as many New Zealanders as possible, the NZHST will have two versions, an internet version and a land-line telephone version; both of which can be delivered into their home in either New Zealand English or Te Reo Māori. This research is the third instalment in the development of the NZHST. The current research is divided into three parts; the verification of the New Zealand English DTT for the internet version, the pilot study for the Te Reo Māori DTT for the internet version, and the normalisation of the New Zealand English DTT for the telephone version. In the verification process, 50 individuals with various audiometric thresholds listened to 3 lists of 27 New Zealand English digit triplets, presented in three conditions; binaurally and to each ear separately via an internet interface. In the pilot study, 27 participants with various audiometric thresholds listened to 3 lists of 27 Te Reo Māori digit triplets via a software interface on a laptop computer. The normalisation process involved 10 individuals with normal hearing (average air-conduction pure tone thresholds of ≤ 20 dB HL) listening to 168 New Zealand English digit triplets under two different noise conditions; one as continuous speech noise and the other a noise with spectral and temporal gaps (STG noise) presented via a software interface on a laptop computer. Four conditions of the 168 digits were presented; once to each ear for the continuous noise, and once to each ear for the STG noise. Significant correlations were found between the binaural DTT and PTA (R = 0.66), and between the monaural ear DTT and PTA (R = 0.73) for the verification. The binaural DTT had a test sensitivity of 94% and a specificity of 88%. Pilot study correlation between binaural DTT and PTA was R = 0.61, and was R = 0.63 between monaural DTT and PTA; while the binaural sensitivity (100%) and specificity (100%) of the Te Reo DTT was affected by the very small number of participants with hearing loss (n = 4). The normalisation revealed that detection of the digit triplets was easier when STG noise (Lmid = -11.5 dB SNR, SD = 1.6 dB) was used as a masker, rather than continuous noise (Lmid = -8.9 dB SNR, SD = 1.4 dB).

No description available.

Nos últimos anos, os sistemas integrados em silício (SOCs - Systems-on-Chip) têm se tornado menos imunes a ruído, em decorrência dos ajustes necessários na tecnologia CMOS (Complementary Metal-Oxide-Silicon) para garantir o funcionamento dos transistores com dimensões nanométricas. Dentre tais ajustes, a redução da tensão de alimentação e da tensão de limiar (threshold) tornam os SOCs mais suscetíveis a falhas transientes, principalmente aquelas provocadas pela colisão de partículas energéticas que provêm do espaço e encontram-se presentes na atmosfera terrestre. Quando uma partícula energética de alta energia colide com o dreno de um transistor que está desligado, ela perde energia e produz pares elétron-lacuna livres, resultando em uma trilha de ionização. A ionização pode gerar um pulso transiente de tensão que pode ser interpretado como uma mudança no sinal lógico. Em um circuito combinacional, o pulso pode propagar-se até ser armazenado em um elemento de memória. Tal fenômeno é denominado Single-Event Transient (SET). Como a tendência é que as dimensões dos dispositivos fabricados com tecnologia CMOS continuem reduzindo por mais alguns anos, a ocorrência de SETs em SOCs operando na superfície terrestre tende a aumentar, exigindo a adoção de técnicas de tolerância a falhas no projeto de SOCs. O presente trabalho tem por objetivo avaliar circuitos somadores tolerantes a falhas transientes encontrados na literatura. Duas arquiteturas de somadores foram escolhidas: Ripple Carry Adder (RCA) e Binary Signed Digit Adder (BSDA). O RCA foi escolhido por ser o tipo de somador de menor custo e por isso, amplamente utilizado em SOCs. Já o BSDA foi escolhido porque utiliza o sistema numérico de dígito binário com sinal (Binary Signed Digit – BSD). Por ser um sistema de representação redundante, o uso de BSD facilita a aplicação de técnicas de tolerância a falhas baseadas em redundância de informação. Os somadores protegidos avaliados foram projetados com as seguintes técnicas: Redundância Modular Tripla (Triple Modular Redundancy - TMR) e Recomputação com Entradas e Saídas Invertidas (RESI), no caso do RCA, e codificação 1 de 3 e verificação de paridade, no caso do BSDA. As 9 arquiteturas de somadores foram simuladas no nível elétrico usando o Modelo Tecnológico Preditivo (Predictive Technology Model - PTM) de 45nm e considerando quatro comprimentos de operandos: 4, 8, 16 e 32 bits. Os resultados obtidos permitiram quantificar o número de transistores, o atraso crítico e a potência média consumida por cada arquitetura protegida. Também foram realizadas campanhas de injeção de falhas, por meio de simulações no nível elétrico, para estimar o grau de proteção de cada arquitetura. Os resultados obtidos servem para guiar os projetistas de SOCs na escolha da arquitetura de somador tolerante a falhas mais adequada aos requisitos de cada projeto. / In the past recent years, integrated systems on a chip (Systems-on-chip - SOCs) became less immune to noise due to the adjusts in CMOS technology needed to assure the operation of nanometric transistors. Among such adjusts, the reductions in supply voltage and threshold voltage make SOSs more susceptible to transient faults, mainly those provoked by the collision of charged particles coming from the outer space that are present in the atmosphere. When a heavily energy charged particle hits the drain region of a transistor that is at the off state it produces free electron-hole pairs, resulting in an ionizing track. The ionization may generate a transient voltage pulse that can be interpreted as a change in the logic signal. In a combinational circuit, the pulse may propagate up to the primary outputs and may be captured by the output storage element. Such phenomenon is referred to as Single-Event Transient (SET). Since it is expected that transistor dimensions will continue to reduce in the next technological nodes, the occurrence of SETs at Earth surface will increase and therefore, fault tolerance techniques will become a must in the design of SOSs. The present work targets the evaluation of transient fault-tolerant adders found in the literature. Two adder architectures were chosen: the Ripple-Carry Adder (RCA) and the Binary Signed Digit Adder (BSDA). The RCA was chosen because it is the least expensive and therefore, the most used architecture for SOS design. The BSDA, in turn, was chosen because it uses the Binary Signed Digit (BSD) system. As a redundant number system, the BSD paves the way to the implementation of fault-tolerant adders using information redundancy. The evaluated fault-tolerant adders were implemented by using the following techniques: Triple Module Redundancy (TMR) and Recomputing with Inverted Inputs and Outputs (RESI), in the case of the RCA, and 1 out of 3 coding and parity verification, in the case of the BSDA. A total of 9 adder architectures were simulated at the electric-level using the Predictive Technology Model (PTM) for 45nm in four different bitwidths: 4, 8, 16 and 32. The obtained results allowed for quantifying the number of transistors, critical delay and average power consumption for each fault-tolerant architecture. Fault injection campaigns were also accomplished by means of electric-level simulations to estimate the degree of protection of each architecture. The results obtained in the present work may be used to guide SOS designers in the choice of the fault-tolerant adder architecture that is most likely to satisfy the design requirements.

Made available in DSpace on 2014-06-11T19:27:25Z (GMT). No. of bitstreams: 0 Previous issue date: 2010-03-12Bitstream added on 2014-06-13T19:56:10Z : No. of bitstreams: 1 berlingieri_ma_me_jabo.pdf: 1229129 bytes, checksum: 914f852c063ecbfa177b5697c287aeef (MD5) / Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq) / Nesta pesquisa foram investigados aspectos anatômicos e biométricos da face flexora dos dígitos de 20 novilhas mestiças da raça Nelore, com idades entre 24 e 36 meses, criadas em sistema extensivo. O material foi proveniente de matadouro sob Fiscalização do Serviço de Inspeção Oficial e mantido sob congelamento a -18°C até o momento da dissecação. Após tricotomia e limpeza das regiões distais ao metacarpo e metatarso, as faces palmar e plantar dos dígitos foram dissecadas in natura e as estruturas anatômicas identificadas e medidas com auxílio de paquímetro universal. As mensurações foram feitas em milímetros (mm) e incluíram o comprimento, a largura e a espessura das estruturas anatômicas digitais. A técnica de dissecação in natura foi considerada útil para a execução deste estudo e as estruturas identificadas e mensuradas incluíram os ligamentos acessórios distais dos paradígitos, ligamentos anulares palmares e plantares, bainha digital tendínea, ligamentos anulares proximais e distais, ligamentos interdigitais distais, tendões flexores digitais superficiais e profundos e a manica flexoria. Os dados biométricos obtidos indicam diferenças (p≤0,05) entre membros, antímeros e dígitos, especialmente nas estruturas anatômicas localizadas distalmente. Devido à escassez de estudos biométricos sobre o assunto, os achados deste trabalho podem servir como valores de referência para a faixa etária de novilhas avaliadas e contribuir em pesquisas morfológicas futuras / In the present work anatomic and biometric studies of the distal aspect in the flexor aspect of digits were carried out for 20 cross-breed heifer of Nelore breed aging around 24-36 months raised in an extensive regiment. The materials came from shamble under the Official Fiscalization of Inspect Service and were kept under freezing at -18°C until dissection. After the clipper and cleaning the distal areas, from metacarpus to metatarsus, the structures were dissected and measured by using a universal caliper rule (mm) on length (proximal-distal), widht (abaxial-axial) and thickness (dorso-palmar or dorso-plantar). The dissected structures included the paradigits distal accessories ligaments, palmar and plantar annular ligaments and tendon digital sheath, proximal and distal annular ligaments, interdigital distal ligament, superficial digital flexor tendon and deep digital flexor tendon and manica flexoria. The measured data indicate differences (p≤0,05) among the limb, right, left and respective digits mainly in the more distal analyzed structures. Due to scarcity of biometric studies about this topic, the data found in this work might be useful as a reference for the analyzed group, as well in the anatomic detailed structures which are essential to understanding many of the pathological process of locomotor apparatus in cattle