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Design of a fixed-point polar receiver for OFDM-based wireless LANAltamimi, Amro Faisal Mohammed 18 October 2011 (has links)
This thesis studies implementation-related issues in OFDM-based digital receivers, using the IEEE 802.11a WLAN standard as a specific wireless technology, where the data rate ranges from 6 Mbps to 54 Mbps. Our goal is to expose and exploit the possibility of scaling of the receiver computational complexity in relation to variable data rate requirements. To facilitate such computational scalability, we propose and evaluate the use of the polar coordinates during data processing in the frequency domain. We also evaluate the impact of various fixed-point precision settings during data processing in both the time domain and the frequency domain. We have found that for the 6-Mbps and 54-Mbps data rates the appropriate fixed-point word length should be 15 bits and 20 bits, respectively. While evaluating different fixed-point precision settings, we found that simulations times were prohibitively long. To address this issue, we also propose an alternative 5-step simulation procedure that significantly reduces the simulation time needed to evaluate any given fixed-point setting option. / Graduate
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Διερεύνηση τεχνικών διαφορισμού στους ψηφιακούς δέκτες των σύγχρονων ασύρματων δικτύωνΝικολάου, Δημήτριος 25 January 2010 (has links)
Αντικείμενο αυτής της διπλωματικής εργασίας είναι η διερεύνηση των τεχνικών διαφορισμού στους ψηφιακούς δέκτες των σύγχρονων ασύρματων δικτύων. / Purpose of this paper is the examination of combining techniques at digital receivers of modern wireless networks.
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Analysis and Dynamic Range Enhancement of the Analog-to-Digital Interface in Multimode Radio ReceiversFox, Brian L. 25 February 1997 (has links)
The rapidly developing wireless market has spawned a multitude of different standards for cellular, PCS, and wireless data. To allow users the ability to access services conforming to disparate standards, multimode handsets capable of software reconfiguration are needed. These "software radios" are distinguished from their traditional counterparts by their strong reliance on digital channel filtering and demodulation which may be reprogrammed to receive different standards. In these radios, higher dynamic range is required from the analog portion, most notably, the analog-to-digital converter (ADC).
This research examines through analysis and simulation the performance requirements of analog-to-digital converters for use in radios which are conformant to the AMPS, IS-54, GSM, and IS-95 cellular standards. Simulations reveal the degradation in performance under conditions of off-channel interference, fading, and converter nonlinearities. Included in this analysis is the design of automatic gain control (AGC) for narrowband and IS-95 spread spectrum systems to optimize quantization noise and distortion due to A/D overload. Lastly, methods for improving the dynamic range of the analog-to-digital interface such as nonuniform quantization, companding, and dither are presented. The development of a novel A/D using a direct-sequence pseudo-noise (DSPN) technique in conjunction with an asymmetrical quantizer is presented and compared with standard dither techniques. Advantages of this technique compared to ordinary ADC's include an almost one bit improvement in resolution, quantization noise whitening, elimination of A/D offsets, and the ability to simultaneously digitize multiple analog signals with a single quantizer. The technique requires no synchronization and is easily implemented. / Master of Science
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ON SYMBOL TIMING RECOVERY IN ALL-DIGITAL RECEIVERSGhrayeb, Ali A. 10 1900 (has links)
International Telemetering Conference Proceedings / October 27-30, 1997 / Riviera Hotel and Convention Center, Las Vegas, Nevada / Sandia National Laboratories (SNL) currently achieves a bandwidth efficiency (h ) of 0.5 to 1.0 bps/Hz by using traditional modulation schemes, such as, BPSK and QFSK. SNL has an interest in increasing the present bandwidth efficiency by a factor of 4 or higher with the same allocated bandwidth (about 10 MHz). Simulations have shown that 32- QAM trellis-coded modulation (TCM) gives a good bit error rate (BER) performance, and meets the requirements as far as the bandwidth efficiency is concerned. Critical to achieving this is that the receiver be able to achieve timing synchronization. This paper examines a particular timing recovery algorithm for all-digital receivers. Timing synchronization in a digital receiver can be achieved in different ways. One way of achieving this is by interpolating the original sampled sequence to produce another sampled sequence synchronized to the symbol rate or a multiple of the symbol rate. An adaptive sampling conversion algorithm which performs this function was developed by Floyd Gardner in 1993. In the present work, his algorithm was applied to two different modulation schemes, BPSK and 4-ary PAM. The two schemes were simulated in the presence of AWGN and ISI along with Gardner’s algorithm for timing recovery, and a fractionally spaced equalizer (T/2 FSE) for equalization. Simulations show that the algorithm gives good BER performance for BPSK in all the situations, and at different sampling frequencies, but unfortunately poor performance for the 4-ary PAM scheme. This indicates that Gardner’s algorithm for sampling conversion is not suitable for multi-level signaling schemes.
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Algoritmo de escalonamento para aplicações em uma grade computacional extensível aos receptores de sinais digitais de televisão / Scheduling algorithm for applications in a computational grid extensible to receivers of television digital signalBatista, Bruno Guazzelli 30 June 2011 (has links)
OGrid Anywhere é um middleware de grade computacional ponto-aponto (P2P), capaz de agrupar em uma organização virtual ou federação qualquer equipamento dotado de recursos computacionais, inclusive receptores digitais. O objetivo deste projeto de mestrado apresentado nesta monografia é desenvolver e avaliar algoritmos de escalonamento que possibilitem uma distribuição adequada de processos nos elementos da grade computacional proposta pelo Grid Anywhere. Foram realizados experimentos utilizando o simulador GridSim, simulando um ambiente definido por esse middleware. Por meio dessa junção entre Grades Computacionais e TV Digital, pretende-se promover a inclusão digital permitindo que recursos computacionais sejam compartilhados de maneira a possibilitar que usuários com receptores limitados executem aplicações que demandem mais recursos que aqueles ofertados pelo hardware / GRid Anywhere is a middleware for grid computing peer-to-peer (P2P), capable of bringing together into a virtual organization or federation any equipment having computing resources, including digital receivers. The objective of this masters project presented in this monograph is to develop and evaluate scheduling algorithms that allow an adequate distribution of applications in computational grid elements proposed by the Grid Anywhere. Experiments were carried out using the GridSim simulator, simulating an environment defined by the middleware. Through this joint between Grid Computing and Digital TV, it is possible to promote digital inclusion by allowing computing resources to be shared, so as to enable users with limited receivers to run applications that require more resources than those offered by the hardware
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Algoritmo de escalonamento para aplicações em uma grade computacional extensível aos receptores de sinais digitais de televisão / Scheduling algorithm for applications in a computational grid extensible to receivers of television digital signalBruno Guazzelli Batista 30 June 2011 (has links)
OGrid Anywhere é um middleware de grade computacional ponto-aponto (P2P), capaz de agrupar em uma organização virtual ou federação qualquer equipamento dotado de recursos computacionais, inclusive receptores digitais. O objetivo deste projeto de mestrado apresentado nesta monografia é desenvolver e avaliar algoritmos de escalonamento que possibilitem uma distribuição adequada de processos nos elementos da grade computacional proposta pelo Grid Anywhere. Foram realizados experimentos utilizando o simulador GridSim, simulando um ambiente definido por esse middleware. Por meio dessa junção entre Grades Computacionais e TV Digital, pretende-se promover a inclusão digital permitindo que recursos computacionais sejam compartilhados de maneira a possibilitar que usuários com receptores limitados executem aplicações que demandem mais recursos que aqueles ofertados pelo hardware / GRid Anywhere is a middleware for grid computing peer-to-peer (P2P), capable of bringing together into a virtual organization or federation any equipment having computing resources, including digital receivers. The objective of this masters project presented in this monograph is to develop and evaluate scheduling algorithms that allow an adequate distribution of applications in computational grid elements proposed by the Grid Anywhere. Experiments were carried out using the GridSim simulator, simulating an environment defined by the middleware. Through this joint between Grid Computing and Digital TV, it is possible to promote digital inclusion by allowing computing resources to be shared, so as to enable users with limited receivers to run applications that require more resources than those offered by the hardware
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Architecture and algorithms for the implementation of digital wireless receivers in FPGA and ASIC: ISDB-T and DVB-S2 casesRodrigues De Lima, Eduardo 21 March 2016 (has links)
[EN] The first generation of Terrestrial Digital Television(DTV) has been in service for over a decade. In 2013, several countries have already completed the transition from Analog to Digital TV Broadcasting, most of which in Europe. In South America, after several studies and trials, Brazil adopted the Japanese standard with some innovations. Japan and Brazil started Digital Terrestrial Television Broadcasting (DTTB) services in December 2003 and December 2007 respectively, using Integrated Services Digital Broadcasting - Terrestrial (ISDB-T), also known as ARIB STD-B31.
In June 2005 the Committee for the Information Technology Area (CATI) of Brazilian Ministry of Science and Technology and Innovation MCTI approved the incorporation of the IC-Brazil Program, in the National Program for Microelectronics (PNM) . The main goals of IC-Brazil are the formal qualification of IC designers, support to the creation of semiconductors companies focused on projects of ICs within Brazil, and the attraction of semiconductors companies focused on the design and development of ICs in Brazil.
The work presented in this thesis originated from the unique momentum created by the combination of the birth of Digital Television in Brazil and the creation of the IC-Brazil Program by the Brazilian government. Without this combination it would not have been possible to make these kind of projects in Brazil. These projects have been a long and costly journey, albeit scientifically and technologically worthy, towards a Brazilian DTV state-of-the-art low complexity Integrated Circuit, with good economy scale perspectives, due to the fact that at the beginning of this project ISDB-T standard was not adopted by several countries like DVB-T.
During the development of the ISDB-T receiver proposed in this thesis, it was realized that due to the continental dimensions of Brazil, the DTTB would not be enough to cover the entire country with open DTV signal, specially for the case of remote localizations far from the high urban density regions. Then, Eldorado Research Institute and Idea! Electronic Systems, foresaw that, in a near future, there would be an open distribution system for high definition DTV over satellite, in Brazil. Based on that, it was decided by Eldorado Research Institute, that would be necessary to create a new ASIC for broadcast satellite reception. At that time DVB-S2 standard was the strongest candidate for that, and this assumption still stands nowadays. Therefore, it was decided to apply to a new round of resources funding from the MCTI - that was granted - in order to start the new project.
This thesis discusses in details the Architecture and Algorithms proposed for the implementation of a low complexity Intermediate Frequency(IF) ISDB-T Receiver on Application Specific Integrated Circuit (ASIC) CMOS. The Architecture proposed here is highly based on the COordinate Rotation Digital Computer (CORDIC) Algorithm, that is a simple and efficient algorithm suitable for VLSI implementations. The receiver copes with the impairments inherent to wireless channels transmission and the receiver crystals. The thesis also discusses the Methodology adopted and presents the implementation results. The receiver performance is presented and compared to those obtained by means of simulations.
Furthermore, the thesis also presents the Architecture and Algorithms for a DVB-S2 receiver targeting its ASIC implementation. However, unlike the ISDB-T receiver, only preliminary ASIC implementation results are introduced. This was mainly done in order to have an early estimation of die area to prove that the project in ASIC is economically viable, as well as to verify possible bugs in early stage. As in the case of
ISDB-T receiver, this receiver is highly based on CORDIC algorithm and it was prototyped in FPGA. The Methodology used for the second receiver is derived from that used for the ISDB-T receiver, with minor additions given the project characteristics. / [ES] La primera generación de Televisión Digital Terrestre(DTV) ha estado en servicio por más de una década. En 2013, varios países completaron la transición de transmisión analógica a televisión digital, la mayoría de ellas en Europa. En América del Sur, después de varios estudios y ensayos, Brasil adoptó el estándar japonés con algunas innovaciones. Japón y Brasil comenzaron a prestar el servicio de Difusión de Televisión Digital Terrestre (DTTB) en diciembre de 2003 y diciembre de 2007 respectivamente, utilizando Radiodifusión Digital de Servicios Integrados Terrestres (ISDB-T), también conocida como ARIB STD-B31.
En junio de 2005, el Comité del Área de Tecnología de la Información (CATI) del Ministerio de Ciencia, Tecnología e Innovación de Brasil - MCTI aprobó la incorporación del Programa CI-Brasil, en el Programa Nacional de Microelectrónica (PNM). Los principales objetivos de la CI-Brasil son la formación de diseñadores de CIs, apoyar la creación de empresas de semiconductores enfocadas en proyectos de circuitos integrados dentro de Brasil, y la atracción de empresas de semiconductores interesadas en el diseño y desarrollo de circuitos integrados.
El trabajo presentado en esta tesis se originó en el impulso único creado por la combinación del nacimiento de la televisión digital en Brasil y la creación del Programa de CI-Brasil por el gobierno brasileño. Sin esta combinación no hubiera sido posible realizar este tipo de proyectos en Brasil. Estos proyectos han sido un trayecto largo y costoso, aunque meritorio desde el punto de vista científico y tecnológico, hacia un Circuito Integrado brasileño de punta y de baja complejidad para DTV, con buenas perspectivas de economía de escala debido al hecho que al inicio de este proyecto, el estándar ISDB-T no fue adoptado por varios países como DVB-T.
Durante el desarrollo del receptor ISDB-T propuesto en esta tesis, se observó que debido a las dimensiones continentales de Brasil, la DTTB no sería suficiente para cubrir todo el país con la señal de televisión digital abierta, especialmente para el caso de localizaciones remotas, apartadas de las regiones de alta densidad urbana. En ese momento, el Instituto de Investigación Eldorado e Idea! Sistemas Electrónicos, previeron que en un futuro cercano habría un sistema de distribución abierto para DTV de alta definición por satélite en Brasil. Con base en eso, el Instituto de Investigación Eldorado decidió que sería necesario crear un nuevo ASIC para la recepción de radiodifusión por satélite, basada el estándar DVB-S2.
En esta tesis se analiza en detalle la Arquitectura y algoritmos propuestos para la implementación de un receptor ISDB-T de baja complejidad y frecuencia intermedia (IF) en un Circuito Integrado de Aplicación Específica (ASIC) CMOS. La arquitectura aquí propuesta se basa fuertemente en el algoritmo Computadora Digital para Rotación de Coordenadas (CORDIC), el cual es un algoritmo simple, eficiente y adecuado para implementaciones VLSI. El receptor hace frente a las deficiencias inherentes a las transmisiones por canales inalámbricos y los cristales del receptor. La tesis también analiza la metodología adoptada y presenta los resultados de la implementación.
Por otro lado, la tesis también presenta la arquitectura y los algoritmos para un receptor DVB-S2 dirigido a la implementación en ASIC. Sin embargo, a diferencia del receptor ISDB-T, se introducen sólo los resultados preliminares de implementación en ASIC. Esto se hizo principalmente con el fin de tener una estimación temprana del área del die para demostrar que el proyecto en ASIC es económicamente viable, así como para verificar posibles errores en etapa temprana. Como en el caso de receptor ISDB-T, este receptor se basa fuertemente en el algoritmo CORDIC y fue un prototipado en FPGA. La metodología utilizada para el segundo receptor se deriva de la utilizada para el re / [CAT] La primera generació de Televisió Digital Terrestre (TDT) ha estat en servici durant més d'una dècada. En 2013, diversos països ja van completar la transició de la radiodifusió de televisió analògica a la digital, i la majoria van ser a Europa. A Amèrica del Sud, després de diversos estudis i assajos, Brasil va adoptar l'estàndard japonés amb algunes innovacions. Japó i Brasil van començar els servicis de Radiodifusió de Televisió Terrestre Digital (DTTB) al desembre de 2003 i al desembre de 2007, respectivament, utilitzant la Radiodifusió Digital amb Servicis Integrats de (ISDB-T), coneguda com a ARIB STD-B31.
Al juny de 2005, el Comité de l'Àrea de Tecnologia de la Informació (CATI) del Ministeri de Ciència i Tecnologia i Innovació del Brasil (MCTI) va aprovar la incorporació del programa CI Brasil al Programa Nacional de Microelectrònica (PNM). Els principals objectius de CI Brasil són la qualificació formal dels dissenyadors de circuits integrats, el suport a la creació d'empreses de semiconductors centrades en projectes de circuits integrats dins del Brasil i l'atracció d'empreses de semiconductors centrades en el disseny i desenvolupament de circuits integrats.
El treball presentat en esta tesi es va originar en l'impuls únic creat per la combinació del naixement de la televisió digital al Brasil i la creació del programa Brasil CI pel govern brasiler. Sense esta combinació no hauria estat possible realitzar este tipus de projectes a Brasil. Estos projectes han suposat un viatge llarg i costós, tot i que digne científicament i tecnològica, cap a un circuit integrat punter de baixa complexitat per a la TDT brasilera, amb bones perspectives d'economia d'escala perquè a l'inici d'este projecte l'estàndard ISDB-T no va ser adoptat per diversos països, com el DVB-T.
Durant el desenvolupament del receptor de ISDB-T proposat en esta tesi, va resultar que, a causa de les dimensions continentals de Brasil, la DTTB no seria suficient per cobrir tot el país amb el senyal de TDT oberta, especialment pel que fa a les localitzacions remotes allunyades de les regions d'alta densitat urbana.. En este moment, l'Institut de Recerca Eldorado i Idea! Sistemes Electrònics van preveure que, en un futur pròxim, no hi hauria a Brasil un sistema de distribució oberta de TDT d'alta definició a través de satèl¿lit. D'acord amb això, l'Institut de Recerca Eldorado va decidir que seria necessari crear un nou ASIC per a la recepció de radiodifusió per satèl¿lit. basat en l'estàndard DVB-S2.
En esta tesi s'analitza en detall l'arquitectura i els algorismes proposats per l'execució d'un receptor ISDB-T de Freqüència Intermèdia (FI) de baixa complexitat sobre CMOS de Circuit Integrat d'Aplicacions Específiques (ASIC). L'arquitectura ací proposada es basa molt en l'algorisme de l'Ordinador Digital de Rotació de Coordenades (CORDIC), que és un algorisme simple i eficient adequat per implementacions VLSI. El receptor fa front a les deficiències inherents a la transmissió de canals sense fil i els cristalls del receptor. Esta tesi també analitza la metodologia adoptada i presenta els resultats de l'execució. Es presenta el rendiment del receptor i es compara amb els obtinguts per mitjà de simulacions.
D'altra banda, esta tesi també presenta l'arquitectura i els algorismes d'un receptor de DVB-S2 de cara a la seua implementació en ASIC. No obstant això, a diferència del receptor ISDB-T, només s'introdueixen resultats preliminars d'implementació en ASIC. Això es va fer principalment amb la finalitat de tenir una estimació primerenca de la zona de dau per demostrar que el projecte en ASIC és econòmicament viable, així com per verificar possibles errors en l'etapa primerenca. Com en el cas del receptor ISDB-T, este receptor es basa molt en l'algorisme CORDIC i va ser un prototip de FPGA. La metodologia utilitzada per al segon receptor es deriva de la utilitzada per al receptor I / Rodrigues De Lima, E. (2016). Architecture and algorithms for the implementation of digital wireless receivers in FPGA and ASIC: ISDB-T and DVB-S2 cases [Tesis doctoral no publicada]. Universitat Politècnica de València. https://doi.org/10.4995/Thesis/10251/61967 / TESIS
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