An analysis is presented on current-mode control of a magnetic amplifier post regulator. Small-signal models for a magnetic amplifier reset method are developed for post regulators operating in continuous conduction mode. A design procedure is given and experimental verification of the model is provided. / Master of Science

Open-loop stability analysis of multi-loop current-injected switching regulator is performed using a small signal model containing a power stage, an error processor and a duty cycle pulse modulator. Two design constraints and the effects of various critical control circuit parameters are pinpointed and the analysis-based design guidelines are established in order to optimize the switching regulator performances. In addition, an external ramp slope is proposed to obtain the optimal performance and eliminate the 50% duty cycle instability when operated in constant frequency mode. The effects of the second stage output filter are also examined. / Master of Science

Power management components can be found in a host of different applications ranging from portable hand held gadgets to modern avionics to advanced medical instrumentations, among many other applications. Low-dropout (LDO) linear regulators are particularly popular owing to their: ease of use, low cost, high accuracy, low noise, and high bandwidth. With all its glory, however, it tends to underperform switched-mode power supplies (SMPS) when with comes to power conversion efficiency, although the later generates a lot of ripple at its output. With the growing need to improve system efficiency (hence longer battery life) without degrading system performance, many high end (noise sensitive) applications such as data converters, RF transceivers, precision signal conditioning, among others, use high efficiency SMPS with LDO regulators as post-regulators for rejecting the ripple generated by SMPS. This attribute of LDO regulators is known as power supply rejection (PSR). With the trend towards increasing switching frequency for SMPS, to minimize PC board real estate, it is becoming ever more difficult for LDO regulators to suppress the associate high frequency ripple since at such high frequencies, different parasitic components of the LDO regulator start to deteriorate its PSR performance. There have been a handful of different techniques suggested in the literature that can be used to achieve good PSR performance at higher frequencies. However, each of these techniques suffers from a number of drawbacks ranging from reduced efficiency to increased cost to increased solution size, and with the growing demand for higher efficiency and smaller power supplies, these techniques have their clear limitations. The objective of this research project is to develop a novel current-mode LDO regulator that can achieve good high frequency PSR performance without suffering from the afore mentioned drawbacks. The proposed architecture was fabricated using a proprietary 1.5 um Bipolar process technology, and the measurement results show a PSR improvement of 20dB (at high frequencies) over conventional regulators. Moreover, the proposed LDO regulator requires a small 15nF output capacitor for stability, which is far smaller than some of the currently used techniques.

Thesis (M.S.) -- Mississippi State University. Department of Electrical and Computer Engineering. / Title from title screen. Includes bibliographical references.