Master of Science / Department of Electrical and Computer Engineering / Balasubramaniam Natarajan / Noel Schulz / With increasing costs for fuel there is a growing interest in improving fuel efficiency and performance of military vehicles by employing (1) hybrid drive train architecture; (2) reliable vehicle power system structure, and (3) effective power management strategies of multiple power sources (engine, battery and ultracapacitor) and vehicle electrical loads. However, current ruled-based power management strategies that focus primarily on traction fail to meet the rapidly increasing requirements of military vehicles, including: (1) better fuel economy; (2) the ability to support pulsed power weapon loads; (3) maintaining battery SOC for power offloading applications, and (4) the ability to perform load scheduling of vehicle non-traction electrical loads to save energy. In this thesis, we propose an optimal control based algorithm in conjunction with a rule-based control strategy to optimally manage three power sources (engine, battery and pulsed power supply module) and an effective power management solution for vehicle non-traction electrical loads such that: (1) all traction, non-traction and pulsed power needs are met; (2) power drawn from the engine for specific mission is minimized; (3) a certain desired battery SOC is guaranteed for offloading power, and (4) the ability to perform load scheduling based on different mission requirements. The proposed approach is validated using simulation of a mission specific profile and is compared with two other popular control strategies. The improvements in power efficiency, desired SOC level and ability to perform optimal load scheduling are demonstrated.

Master of Science / Department of Electrical and Computer Engineering / Dwight D. Day / Over the last several years, the use of Field Programmable Gate Arrays, or FPGAs, has become increasingly popular in the embedded systems field. However, FPGAs are typically used only as a coprocessor or dedicated DSP. This project proposes that an embedded system can realize a performance gain over a traditional microprocessor-based design and be made more flexible and extensible by using an FPGA as the primary processing device in the embedded system. Basing a design on an FPGA also allows new features to be much more rapidly developed and integrated into the system. This will be shown by designing an FPGA based embedded system for Surface Systems & Instruments’ Walking Profiler device. The system will include support for rotary encoders, an incline sensor for data collection, and an Ethernet protocol for communication with a Windows computer. The implementation of a sub sampling distance measuring algorithm will be used to demonstrate the tradeoffs between hardware, software, and development times.

Master of Science / Department of Electrical and Computer Engineering / William Kuhn / Studies of Silicon-on-Sapphire (SOS) CMOS device operation in cryogenic environments are presented. The main focus was to observe the characteristic changes in high, medium and low threshold SOS NFETs as well as SOS silicide blocked (SN) resistors when the operational temperature is in the devices’ freeze-out range below 77 Kelvin. The measurements taken will be useful to any integrated circuit (IC) designer creating devices based on an SOS process intended to operate in cryogenic environments such as superconducting electronics and planetary probes. First, a 1N4001 rectifier and a 2N7000 NFET were tested to see how freeze-out effects standard diode and MOS devices. These devices were tested to see if the measurement setup could induce carrier freeze-out. Next, SOS devices were studied. Data was collected at room temperature and as low as 5 Kelvin to observe resistance changes in an SN resistor and kink effect, threshold voltage shifts and current level changes in transistors. A 2μm high threshold NFET was tested at room temperature, 50 Kelvin, 30 Kelvin and 5 Kelvin to observe effects on I-V curves at different temperatures with-in the freeze-out range. A 2μm medium threshold NFET was tested down to 56 Kelvin to see if the behavior is similar to the high threshold FET. A 2μm intrinsic, or low threshold, NFET was also tested with the assumption it would be the most susceptible to carrier freeze-out. All of the devices were found to behave well with only mild effects noted.

Doctor of Philosophy / Department of Electrical and Computer Engineering / Balasubramaniam Natarajan / Caterina Scoglio / Many physical and engineered systems (e.g., smart grid, transportation and biomedical systems) are increasingly being monitored and controlled over a communication network. These systems where sensing, communication, computation and real time control are closely integrated are referred to as cyber physical systems (CPS). Cyber physical systems present a plethora of challenges related to their design, analysis, optimization and control. In this dissertation, we present some fundamental methodologies to analyze the optimization of physical systems over a communication network. Specifically, we consider a medium voltage DC shipboard smart grid (SSG) reconfiguration problem as a test case to demonstrate our approach. The main goal of SSG reconfiguration is to change the topology of the physical power system by switching circuit breakers, switches, and other devices in the system in order to route power effectively to loads especially in the event of faults/failures. A majority of the prior work has focused on centralized approaches to optimize the switch configuration to maximize specific objectives. These methods are prohibitively complex and not suited for agile reconfiguration in mission critical situations. Decentralized solutions proposed do reduce complexity and implementation time at the cost of optimality. Unfortunately, none of the prior efforts in this arena address the cyber physical aspects of an SSG. This dissertation aims to bridge this gap by proposing a suite of methods to analyze both centralized and decentralized SSG reconfigurations that incorporate the effect of the underlying cyber infrastructure. The SSG reconfiguration problem is a mixed integer non convex optimization problem for which branch and bound based solutions have been proposed earlier. Here, optimal reconfiguration strategies prioritize the power delivered to vital loads over semi-vital and non vital loads. In this work, we propose a convex approximation to the original non convex problem that significantly reduces complexity of the SSG reconfiguration. Tradeoff between power delivered and number of switching operations after reconfiguration is discussed at steady state. Second, the distribution of end-to-end delay associated with fault diagnosis and reconfiguration in SSG is investigated from a cyber-physical system perspective. Specifically, a cross-layer total (end-to-end) delay analysis framework is introduced for SSG reconfiguration. The proposed framework stochastically models the heterogeneity of actions of various sub-systems viz., the reconfiguration of power systems, generation of fault information by sensor nodes associated to the power system, processing actions at control center to resolve fault locations and reconfiguration, and information flow through communication network to:(1) analyze the distribution of total delay in SSG reconfiguration after the occurrence of faults; and (2) propose design options for real-time reconfiguration solutions for shipboard CPS, that meet total delay requirements. Finally, the dissertation focuses on the quality of SSG reconfiguration solution with incomplete knowledge of the overall system state, and communication costs that may affect the quality (optimality) of the resulting reconfiguration. A dual decomposition based decentralized optimization in which the shipboard system is decomposed into multiple separable subsystems with agents is proposed. Specifically, agents monitoring each subsystem solve a local concave dual function of the original objective while neighboring agents share information over a communication network to obtain a global solution. The convergence of the proposed approach under varying network delays and quantization noise is analyzed and comparisons with centralized approaches are presented. Results demonstrate the effectiveness as well as tradeoffs involved in centralized and decentralized SSG reconfiguration approaches.

Doctor of Philosophy / Department of Electrical and Computer Engineering / Ruth Douglas Miller / This dissertation presents the design of a novel multi-level inverter with FACTS capability for small to mid-size (10–20kW) permanent-magnet wind installations using modular multi-level converter (MMC) topology. The aim of the work is to design a new type of inverter with D-STATCOM option to provide utilities with more control on active and reactive power transfer of distribution lines. The inverter is placed between the renewable energy source, specifically a wind turbine, and the distribution grid in order to fix the power factor of the grid at a target value, regardless of wind speed, by regulating active and reactive power required by the grid. The inverter is capable of controlling active and reactive power by controlling the phase angle and modulation index, respectively. The unique contribution of the proposed work is to combine the two concepts of inverter and D-STATCOM using a novel voltage source converter (VSC) multi-level topology in a single unit without additional cost. Simulations of the proposed inverter, with 5 and 11 levels, have been conducted in MATLAB/Simulink for two systems including 20 kW/kVAR and 250 W/VAR. To validate the simulation results, a scaled version (250 kW/kVAR) of the proposed inverter with 5 and 11 levels has been built and tested in the laboratory. Experimental results show that the reduced-scale 5- and 11-level inverter is able to fix PF of the grid as well as being compatible with IEEE standards. Furthermore, total cost of the prototype models, which is one of the major objectives of this research, is comparable with market prices.

Master of Science / Department of Electrical and Computer Engineering / Punit Prakash / Microwave ablation is a minimally invasive therapeutic modality used for the treatment of cancer in various organs. In this procedure, microwave energy is sent through a thin antenna placed inside the tumor. The microwave energy radiated from the antenna generates heat which kills the tumor cells by necrosis. During multiple-applicator microwave ablation, geometric estimates of treatment outcome are typically obtained by assuming parallel insertion of the applicators. This assumption is based on the guidelines provided in the brochures of antenna manufacturing companies. This assumption is flawed because it is rare to insert the antennas in parallel configuration due to the flexible nature of the antennas and the presence of intervening organs. Furthermore, movement of patients during the treatment procedure alters the position of the antennas. In order to see the effect of non-parallel insertion of antennas, model-based treatment planning may be instructive. Treatment planning can also determine the changes needed to be made for prospective ablation therapy if the antennas are not positioned in their ideal parallel configuration. This thesis provides a detailed computational comparison of the skewed configurations of microwave antennas to their closest parallel configurations. The metric used for com-paring the similarity between the cases is Dice Similarity Coefficient (DSC). Experimental results to validate the computational data are also discussed. Computations were done by using realistic cases of antenna positions obtained from Rhode Island Hospital.

Master of Science / Department of Electrical Engineering / William Kuhn / Q-enhanced Filters have been researched extensively, but have not been often implemented into receiver architectures due to inherent challenges in the design and stability of these filters. However, recent works have successfully addressed Q-enhanced filter designs which are viable for receiver implementation with tuning algorithms to achieve temperature stability. This work continues these efforts with the redesign of a Two-Pole Q-Enhanced Band-Pass filter tested at narrower fractional bandwidths than previous work of less than one percent and considers potential significant improvements in receiver performance using this filer. The Q-enhanced filter redesign ports the existing filter to a new integrated circuit technology which performs better at higher frequencies. The redesign in particular addresses problems in the previous design. The frequency divider design is modified, resistance tuning is added, and additional modifications to the overall filter functionality are implemented. General problems in obtaining an ideal passband shape by eliminating unwanted coupling are addressed. The supporting software for the tuning algorithm is modified to use analog controls and shown to achieve further narrowed bandwidths of 5 MHz and 2.5 MHz at center frequencies of 500 MHz, which are demonstrated to be temperature stable. Future software modifications are described to prepare the existing code base for the new filter design. Potential applications for a Q-enhanced filter include improving the performance of receiver designs. One of the most important performance parameters of a receiver is its spurious response rejection. To explore this behavior, an automated test system is developed to characterize receivers, and four receivers are tested. The test results are presented in a novel graphical display, which is used to evaluate receiver performance and compare receivers. These results motivated the development of a potential modified superheterodyne receiver architecture using the Q-enhanced filter as an image filter and an IF filter. The viability of this receiver design is tested and shown to provide significant improvements to receiver’s spurious rejection response.

Master of Science / Department of Electrical and Computer Engineering / W. B. Kuhn / An analysis of frequency pulling in a varactor-tuned LC VCO under coupling from an on-chip PA is presented. The large-signal behavior of the VCO's inversion-mode MOS varactors is outlined, and the susceptibility of the VCO to frequency pulling from PA aggressor signals with various modulation schemes is discussed. We show that if the aggressor signal is aperiodic, band-limited, or amplitude-modulated, the varactor-tuned LC VCO will experience frequency pulling due to time-modulation of the varactor capacitance. However, if the aggressor signal has constant-envelope phase modulation, VCO pulling can be eliminated, even in the presence of coupling, through careful choice of VCO frequency and divider ratio. Additional mitigation strategies, including new inductor topologies and system-level architectural choices, are also examined. The analysis is then applied to improve a fully-integrated half-duplex UHF micro- transceiver in which signal coupling between the LO and PA caused frequency pulling that prevented the use of QPSK signaling at certain data rates. We determine that a VCO operating at 4x transmit frequency will be naturally insensitive to pulling from QPSK signals. To validate the proposed solution, a prototype IC containing a pair of QPSK transmitters with integrated 100mW Class-C PAs was designed and fabricated in 0.18um SOI. The transmitters--one utilizing a 2x VCO, one utilizing a 4x VCO-- were designed to closely match the performance of the original microtransceiver when transmitting QPSK data. The transmitter with the 2x VCO experienced frequency pulling from the PA while transmitting QPSK data, but the transmitter with the 4x VCO did not, thereby confirming the analysis in this work. A revision of the microtransceiver was designed in 0.5 [mu]m SOS utilizing an off- chip PA inductor to reduce signal coupling with the VCO. A second revision of the microtransceiver with two prototype transmitters was designed in 0.25 [mu]m SOS uti- lizing 4x VCOs and figure-8 VCO inductors for maximum insensitivity to pulling from QPSK and band-limited modulation, as well as other design improvements that leverage the higher f[subscript]t of the smaller process. Both revisions also include a hardware FSK modulator, a new charge pump, and a redesigned fractional-N synthesizer to attenuate a divided-reference spur in the IF output. These revisions of the radio will enable future researchers to focus on system-level applications where highly-integrated medium-power transceivers with fully-functioning IQ modulation are needed.

Master of Science / Electrical and Computer Engineering / Steven Warren / Medical device interoperability and re-configurability continue to be important areas of research toward the realization of verifiable medical systems that can be rapidly assembled to meet the needs of specific patients. This thesis addresses the modularized design of a patient-controlled analgesia (PCA) pump to be used within the context of the Medical Device Coordination Framework (MDCF), an open source framework under development by Kansas State University and the University of Pennsylvania that is informed by the Integrated Clinical Environment (ICE) specification managed by the MD PnP program and its collaborators. The thesis illustrates how to set up the MDCF development environment with Eclipse so that a developer can create software for both a remote MDCF console and a local PCA pump, where ICE channels are used for message transmission. Software development on the MDCF console side includes the development of apps that communicate with a local PCA pump through ICE channels and (b) the development of a GUI that can be launched from an MDCF console to configure, control, and monitor a PCA pump. Software development on the PCA pump side includes the creation of (a) ICE channels that can communicate with an MDCF console and (b) multiple threads for corresponding UART ports that support a modularized design. Several hardware modules were implemented to demonstrate the modularized design approach: an alarm module, a patient button module, a pump module, and a control panel module. These modules employ BeagleBone, Arduino, and MSP430 boards. Status information is displayed on an MDCF console GUI, a PCA pump GUI, and a local LCD screen. An enhanced PCA pump or general medical sub-system with more modules can be developed using a similar method by connecting individual modules to UART ports and then creating the corresponding threads to support device-console communication.

Master of Science / Electrical and Computer Engineering / Dwight D. Day / Synchronization is one of the most critical steps in a wireless communication system. With the system having limited energy resources, low power devices and designs are key aspects of the design process. Digital communication and decoding is discussed along with how synchronization is part of communication. The parameters for wireless communication are outlined and how the system can be simplified in order to reduce power consumption for the network is investigated. The background for the Body Area Network Board which was created for the project, Biosensor Networks and Telecommunication Subsystems for Long Duration Missions, EVA Suits, and Robotic Precursor Scout Missions, is discussed along with some synchronization background as well as some previously researched demodulators designed for limited preambles. With limited-length preambles, oversampling is needed to achieve synchronization. This research investigates what minimum oversampling ratio is needed in a simplified system to still achieve packet synchronization and several synchronization words were compared. The parameters for packet synchronization are outlined as well the impulse noise model used for simulation. For the simulation and the test setup, several oversampling ratios and synchronization words are compared using probability of miss detection and probability of false detection. The oversampling ratio of 16 was shown to be a critical point where increasing the oversampling rate above 16 had diminishing returns. In terms of probability of miss detection, the 7-bit Barker sequence along with the start of frame delimiter for IEEE 802.15.4 had better performance compared to the start of frame delimiter for Ethernet and the sequence 01010111.