• Refine Query
  • Source
  • Publication year
  • to
  • Language
  • 906
  • 337
  • 177
  • 171
  • 72
  • 65
  • 55
  • 27
  • 25
  • 19
  • 15
  • 12
  • 10
  • 8
  • 5
  • Tagged with
  • 2146
  • 517
  • 460
  • 310
  • 301
  • 228
  • 226
  • 211
  • 183
  • 183
  • 176
  • 173
  • 167
  • 167
  • 164
  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
291

Ultra-Low Power Ultra-Fast Hybrid CNEMS-CMOS FPGAs

Sirigiri, Vijay Krishna January 2011 (has links)
No description available.
292

An Integer-Based Approach for Back Projection of Wide Area Imagery

Sundlie, Paul 11 May 2012 (has links)
No description available.
293

An Arbitrary Precision Integer Arithmetic Library for FPGA s

Kalathungal, Akhil, M.S. January 2013 (has links)
No description available.
294

A Hardware Implementation of Hough Transform Based on Parabolic Duality

Ramesh, Naren 27 October 2014 (has links)
No description available.
295

A Comparative Study of PDSP and FPGA Design Methodologies for DSP System Design

Deodhar, Prasad 13 October 2014 (has links)
No description available.
296

Efficient Arithmetic Fourier Transform Implementation to Detect Potential Electromigration Failures in FPGAs

Rayaprolu, Sai Deepa January 2011 (has links)
No description available.
297

DNA PATTERN MATCHING ON LOOSELY COUPLED RECONFIGURABLE SYSTEMS

SARELLA, HANANIEL 27 May 2005 (has links)
No description available.
298

HARDWARE IMPLEMENTATION OF A NOVEL ENCRYPTION ALGORITHM

KRISHNAN, AKHIL 03 April 2006 (has links)
No description available.
299

HARDWARE IMPLEMENTATIONS FOR SYSTOLIC COMPUTATION OF THE JACOBI SYMBOL

VEDANTAM, KIRAN K. January 2006 (has links)
No description available.
300

GAPLA: A GLOBALLY ASYNCHRONOUS LOCALLY SYNCHRONOUS FPGA ARCHITECTURE

JIA, XIN 04 April 2007 (has links)
No description available.

Page generated in 0.0171 seconds