Thesis (Ph. D.)--University of Texas at Austin, 2006. / Vita. Includes bibliographical references.

Thesis (Ph.D.)--Hong Kong University of Science and Technology, 2006. / Includes bibliographical references (leaves 101-110). Also available in electronic version.

Thesis (Ph.D.)--Hong Kong University of Science and Technology, 2007. / Includes bibliographical references (leaves 79-82). Also available in electronic version.

Thesis (Ph. D.)--University of Texas at Austin, 2007. / Vita. Includes bibliographical references.

Thesis (M.S.)--Oregon Graduate Center, 1987.

Thesis (Masters Diploma (Electrical Engineering)--Cape Technikon, Cape Town,1991 / A detailed study into the development of a three phase motor drive, inverter and microprocessor controller using a scalar control method. No mathematical modelling of the system was done as the drive was built around available technology. The inverter circuit is of a Vo~tage source inverter configuration whicp uses MOSFETs switching at a base frequency of between 1.2 KHz and 2 KHz. Provision has been made for speed control and dynamic braking for special applications, since the drive is not going to be put into a specific application as yet, it was felt that only a basic control should be implemented and space should be left for special requests from prospective customers. The pulses for the inverter are generated from the HEF 4752 I.e. under the control of the micro processor thus giving the processor full control over the inverter and allowing it to change almost any parameter at any time. Although the report might seem to cover a lot of unimportant ground it is imperative that the reader is supplied with the back-ground information in order to understand where A.e. drives failed in the past and where A.e. drives are heading in the future. As well as where this drive seeks to use available technology to the best advantage.

Charge transport in semiconductor channels of organic field-effect transistors (FETs) depends largely on the molecular ordering of organic semiconductor molecules. This is particularly demanding for polymer-based FETs, where channel semiconductors are non-molecular in nature, and generally form semiconductor films of low crystallinity. As a result, great theoretical and practical interests have been directed towards facile solution processes that can transform a low molecular weight (MW) and low mobility conjugated polymer into a high crystalline order and high-mobility semiconductor. This research focuses on developing effective strategies for achieving high mobility as well as other desirable FET properties through properly controlling the morphology and molecular ordering of conjugated polymer channel layers. The relationships between morphologic/microstructural properties of the polymer semiconductor films and charge transport characteristics in the films are systematically investigated and elucidated. The purpose of this work is to achieve high performance solution-processed polymer FETs with high mobility, excellent ambient stability, and performance uniformity that display practical significance for application in next-generation electronics. In the first part of this thesis, functionalization of the gate dielectric surface by grafting highly ordered and dense coverage of hybrid silane self-assembled monolayers (SAMs) is discussed. A two-step solution-processed method using a combination of trichlorooctadecylsilane (OTS-18) and trichlorooctylsilane (OTS-8) has been developed to create high-performance hybrid dual-silane SAM on the surface of silicon dioxide (SiO2), thus enabling the achievement of both high field-effect mobility and current on/off ratio, together with other desirable FET properties. The hybrid SAM approach is also adopted for attaining high performing polymer FETs using a different SAM agent combination of phenyltrichlorosilane (PTS) and OTS-18. With the progress in functionalizing the surface of gate dielectric insulator by two-step grafting SAMs, the advancement in enhancing the crystalline structural order of the polymer channel layer is highlighted. This was realized by the incorporation of polar insulator of polyacrylonitrile (PAN) into the polymer semiconductor solution at appropriate loadings, enabling the formation of excellent semiconductor films with high crystalline order. PAN serves as an efficient mediating medium for the crystallization of polymer semiconductor, leading to the creation of large crystalline domains within the PAN matrix. A 1̃0-nm thick semiconductor layer with richer semiconductor crystalline domains is constructed near the vicinity of the gate dielectric surface, facilitating efficient charge conduction in the channel semiconductor. Enhancements in field-effect mobility by as much as about one order in magnitude and current on/off ratio of two to three orders in magnitude have been realized in polymer FETs. PAN incorporation also dramatically enhances the stability and processability of semiconductor solutions, enabling rapid fabrication of channel semiconductors in polymer FETs via common graphic art printing techniques such as inkjet printing for practical adoption. Another unique facile solution process which transforms a lower-MW and low-mobility conjugated polymer, e.g., diketopyrrolopyrrole-dithienylthieno[3,2-b] thiophene (DPP-DTT), into a high crystalline order and high-mobility nanowire network for high performance polymer FETs has been also developed in this work. This approach involves solution fabrication of a channel semiconductor film using a lower MW DPP-DTT/polystyrene blend system. With the help of cooperative shifting motions of polystyrene chain segments, an interpenetrating nanowire semiconductor network is readily self-assembled and crystallized out in the polystyrene matrix, and thereby providing significantly enhanced mobility (over 8 cm2 V-1 s-1) and current on/off ratio (107). Finally, the concept of generating polymer nanowire network in the effective photoactive channel is extended for the development of highly sensitive near-infrared (NIR) organic phototransistors (OPTs). The NIR-OPTs based on DPP-DTT nanowire network exhibit high responsivity of 2̃46 A W-1 under an NIR illumination source with the wavelength of 850 nm at a low intensity of ̃0.1 mW cm-2. This value is over one order in magnitude higher than that of the structurally identical planar DPP-DTT thin film based OPTs. The high performance of the nanowire network-based phototransistors is attributed to the excellent hole transport ability, reduced density of the structural defects in the polymer nanowire network, and improved contact at the channel layer/electrode interfaces. The high sensitivity and low cost solution-fabrication process render this OPT technology appealing and practically viable for application in large area NIR sensors.

M.Ing. (Electrical and Electronic Engineering) / This thesis covers the development of the Mosmatrix, a high speed, high power switch which is implemented with an array of mosfet switching elements. The switching performance of the Mosmatrix proves that is is possible to employ existing semiconductor technology to switch pulses of 1,5 Joule, several hundred Ampere at several kilovolt, in the microsecond and sub-microsecond regime. The switch has demonstrated rates of current rise in the order of lOkA per J.1s during tumon without the use of tum-on snubbers (magnetic assist) . The rate of current fall during tum-off has been of the same magnitude. No other switch has demonstrated this level of repetitive current interrupt ability. The work covers the properties, switching requirements anc' switching performance of mosfet switching elements as well as the development of an isolated drive circuit.

by Tse Man Siu. / Thesis (M.Phil.)--Chinese University of Hong Kong, 1988. / Bibliography: leaves 203-210.

Thesis (Ph. D.)--University of Texas at Austin, 2006. / Vita. Includes bibliographical references.