Les transmissions optiques en espace libre pour des liaisons satellite-satellite ou satellite-sol sont en plein essor. Les systèmes les plus performants aujourd’hui reposent sur l’utilisation de laser à état solide ou d’émetteurs en configuration Master Oscillator Power Amplifier (MOPA) comprenant une source laser, un modulateur externe et un amplificateur fibré type Erbium Doped Fiber Amplifier (EDFA). Ces deux types de sources laser présentent plusieurs inconvénients qui peuvent être rédhibitoires dans le cadre d’applications spatiales : poids et taille élevés, sensibilité aux radiations, forte consommation de puissance. C’est sur ce constat que s’appuie ce travail de thèse qui consiste en le développement de MOPA de haute puissance à 1,5μm intégrés monolithiquement sur InP. La thèse a vu la conception de deux types de MOPAs, l’un avec des guides en arête (shallow ridge) et l’autre avec des guides enterrés (Semi-Insulating Buried Heterostructure ou SIBH). Des simulations de propagation et de mode optique ont pu valider les dessins des guides. Ces MOPAs incluent un laser DFB, un modulateur à électro-absorption et un amplificateur évasé. Plusieurs angles d’évasement ont été testés. La fabrication en salle blanche des composants a permis plusieurs développements technologiques, notamment les étapes de fabrication de MOPA et de SOA évasés en SIBH. Les MOPA shallow ridge réalisés démontrent une puissance de 380 mW en CW et un fonctionnement monomode spectral. Des mesures de S21 ont ensuite été réalisées sur des MOPA et des SOA SIBH de puissance de structure similaire aux MOPA SIBH. Ces mesures ont permis le développement d’un modèle de fonction de transfert de SOA. Le modèle basé sur des paramètres mesurables donne une excellente concordance avec les mesures et permet de trouver le temps de vie des porteurs. Des mesures de diagramme de l’oeil sur des SOA modulés directement ont été effectuées. Bien que le taux d’extinction soit faible (<1 dB), la modulation à 5 Gbps ou 10 Gbps donne un oeil ouvert, limité par la puissance du générateur de signaux numériques. Ces résultats ouvrent la voie vers la recherche de points d’opération et de configurations optimales pour des MOPA et SOA pour des applications transmissions de données. / Free space optical transmissions for satellite-satellite or satellite-ground links are booming. The most effective transmission systems rely on the use of a solid state laser or a Master Oscillator Power Amplifier (MOPA) laser emitter consisting in a laser source, an external modulator and an Erbium Doped Fiber Amplifier (EDFA). These emitters present several drawbacks : high weight and dimensions, high sensitivity to radiations, high power consumption. The PhD work is based on this observation and aims to develop high power MOPA emitting at 1.5μm monolithically integrated on InP.The PhD consisted in the conception of two MOPA types, one with a shallow ridge waveguide and the other with buried guides (Semi-Insulating Buried Heterostructure or SIBH). Propagation and optical mode simulations allowed us to validate the waveguide dimensions. The MOPAs include a DFB laser, an electro-optic modulator and a flared amplifier. Several taper angles are designed. The fabrication process in clean room allowed several technological achievements, especially the fabrication of SIBH MOPA and tapered SOA.We demonstrated 380 mW CW of optical power and a spectral single mode operation with the shallow ridge MOPAs. S21 measurements were also done on MOPAs and SIBH SOAs with a structure similar to the fabricated MOPAs. These measurements allowed us to develop a transfer function model for SOA. The model is based on measurable parameters and showed an excellent fit with the measurements, allowing us to find carrier lifetimes. Eye diagrams on directly modulated SOA are done. The extinction ratio i slow (<1 dB) but the eye is open at 5 Gbps and 10 Gbps, limited by the RF power of the numerical signal generator. These results pave the way to the investigation of optimal points of operation and configurations for high power MOPA and SOA for data transmission.

Electromagnetic interference (EMI) is a major concern in inverter motor drive systems. The sources of EMI have been commonly identified as high switching dv/dt and di/dt rates interacting with inverter parasitic components. The reduction of parasitic components relies on highly integrated circuit layout and packaging. This is the way to deal with noise path. On the other hand, switching dv/dt and di/dt can be potentially reduced by soft-switching techniques; thus the intensity of noise source is reduced. In this paper, the relation between the dv/dt di/dt and the EMI generation are discussed. The EMI sources of a hard-switching single-phase PWM inverter are identified and measured with separation of common-mode and differential-mode noises. The noise reduction in an auxiliary resonant snubber inverter (RSI) is presented. The observation of voltage ringing and current ringing and the methods to suppress these ringing in the implementation of RSI are also discussed. The test condition and circuit layout are described as the basis of the study. And the experimental EMI spectra of both hard- and soft-switching inverter are compared. The effectiveness and limitation of the EMI reduction of the ZVT-RSI are also discussed and concluded. The control interface circuit and gate driver design are described in the appendix. The implementation of variable charging time control of the resonant inductor current is also explained in the appendix. / Master of Science

No description available.

No description available.

This thesis documents a study of bonding stress and the reliability of GaAs-based lasers for high-power applications. GaAs-based lasers were bonded to oxygen-free high- conductivity (OFHC) copper heat sinks using a eutectic PbSn solder or a silver-filled conductive epoxy, and life tested. Epoxy-bonded devices were observed to have a larger failure rate on life test than solder-bonded devices. Bonding stress, as measured by the degree of polarization (DOP) of photoluminescence, was found to be the largest in epoxy-bonded devices. As well, the type of heat sink and bonding adhesive affected the stress in the laser material, with bonding stress increasing when there was a larger mismatch of coefficients of thermal expansion between the laser material, adhesive and heat sink. The reliability of the lasers was affected by the amount of force applied to unbonded laser chips. As the applied force increased on a chip centred on a groove, the rate of degradation in the output power increased. A limit in stress tolerance was observed in the lasers, which meant that larger amounts of stress would lead to increased rates of degradation in the output power. As well, the performance of lasers selected from a batch showing poor reliability degraded at an accelerated rate after several hours of operation under applied strain. / Thesis / Master of Engineering (ME)

DC/DC Power converter design has been following a trend of reducing size while also increasing performance for the last several years. This push for higher power output and smaller footprint and profile requires integration and higher switching frequencies in order to continue. Higher frequencies require physical integration to eliminate problems induced by parasitics, which increase losses. GE's Power Overlay and Philip's PCB integration schemes have been clear steps in the quest to reduce size with new system design techniques. However, both have downsides. GE Power Overlay embeds the devices inside a milled AlN ceramic cavity and then layers interconnections on top using polyimide dielectric interlayers. The milling of AlN ceramic is a very costly and time consuming task due to the brittleness of the material, and the interlayers add additional complexity to the fabrication process. Philip's PCB integration was primarily aimed at integrating passives along with the PCB process for reduction of size. Inductor windings and capacitive layers were built up along with FR4 epoxy layers using typical PCB fabrication methods. However, unlike GE's Power Overlay, the substrate material was several times lower in thermal conductivity which invariably has corresponding thermal penalties. The work presented here reconciles the good of both integration techniques. Initially called Embedded Power, alumina ceramic was used as the substrate and rather than milling holes for the devices, holes were laser cut all the way through and interconnections were made by using interlayers and sputtered copper deposition, similar to GE's method. Integration of passives was done using LTCC ferrite to make an inductor of thin profile, rather than embedding cores and windings inside PCB. However, fabrication remained time consuming due to numerous solder masking and sputtering steps and thermal performance was not optimized due to the use of alumina ceramic. A revised design method called Stacked Power is presented in this dissertation that follows on the work of Embedded Power, but improves on it by simplifying fabrication through the elimination of thermally-restrictive interlayers, as well as time consuming sputtering and electroplating of copper interconnections. Instead, AlN Direct Bonded Copper is used as a multifunctional material thanks to its many-times-greater thermal conductivity than PCB or alumina, solderable device dies are implemented in a vertical fashion, and interconnections are simply made using copper straps soldered into place. For applications where moisture contamination and breakdown isolation are potential problems, dip conformal coating can easily be applied, replacing laborious solder masking. The work in this dissertation describes the fabrication methodology for Stacked Power, demonstrates the thermal advantages, and shows examples of high-frequency buck converters that achieve super-high levels of power density in the smallest of volumes and require no more thermal management than modest airflow. The added cost incurred with aluminum nitride is traded for distinct advantages in terms of low-profile, low airflow requirements for the power output, capability of natural convection for use in locations where fans are prohibitive and compact size for ease of implementation. / Ph. D.

Over the past several years, energy efficiency and power density have become the top concerns for power conversion. Rising energy intensity leads to a higher cost of delivering power. Meanwhile, the demand for compact power supplies grows significantly. It requires power supplies with high efficiency, low profile and high power density. Dc-dc power conversion has been widely applied for industry, medial, military and airspace applications. Conventional PWM dc-dc converters have relatively low power transfer efficiency and low power density. In contrast, resonant dc-dc converters have numerous advantages for dc-dc power conversions. In this work, topologies and system optimization of resonant converters are investigated to meet challenges of high efficiency, high power density, low EMI, easy startup and over current protection. LLC resonant converters can achieve zero-voltage-switching (ZVS) for primary side devices and zero-current-switching (ZCS) for the secondary side rectifiers. The switching loss is minimized. LLC is very attractive to overcome the issues of conventional circuits. However, challenges still remain. First of all, for low-voltage high-current applications, the synchronous rectifier (SR) with lower conduction loss is a must for high efficiency. To solve the driving issues of SRs, a novel synchronous driving scheme is proposed. Experimental results demonstrate the considerable loss reduction with utilization of the proposed driving scheme. Secondly, dc-dc converters are required to meet EMI standard. This work proposes an EMI mode. Based on the proposed model, EMI analysis and noise attenuation techniques are proposed and verified by experiments. Thirdly, startup and over-load protection are another issues of LLC resonant converters. With proposed multi-element resonant converters, the current limit issues can be resolved. In addition, the proposed multi-element resonant converters can utilize higher-order harmonics to enhance power transfer. Fourthly, for high-current applications, the secondary side structure becomes very critical. An improved secondary side construction is proposed to alleviate ac termination losses and SR paralleling issues. Novel winding structures are proposed to reduce the winding loss. The magnetic integration technique is proposed and analyzed, and an optimal integrated transformer design is proposed, which has low loss and compact size. / Ph. D.

Since future microprocessors will have higher current in accordance with Moore's law, there are still challenges for voltage regulators (VRs). Firstly, high efficiency is required not only for easy thermal management, but also for saving on electricity costs for data centers, or battery life extension for laptop computers. At the same time, high power density is required due to the increased power of the microprocessors. This is especially true for data centers, since more microprocessors are required within a given space (per rack). High power density is also required for laptop computers to reduce the size and the weight. To improve power density, a high frequency is required to shrink the size of the output inductors and output capacitors of the multi-phase buck VR. It has been demonstrated that the output bulk capacitors can be eliminated by raising the VR control bandwidth to around 350kHz. Assuming the bandwidth is one-third of the switching frequency, a VR should run at 1MHz to ensure a small size. However, the efficiency of a 12V VR is very poor at 1MHz due to high switching losses. As a result, a 12V VR can only run at 300kHz to 600kHz, and the power density is very low. To attain high efficiency and high power density at the same time, two-stage power architecture was proposed. The concept is "Divide and Conquer". A single-stage VR is split into two stages to get better performance. The second stage has about 5V-6V input voltage; thus the duty cycle can be extended and the switching losses are greatly reduced compared with a single-stage VR. Moreover, a sub-20V MOSFET can be used to further improve the efficiency at high frequencies. The first stage of the proposed two-stage architecture is converting 12V to 5-6V. High efficiency is required for the first stage since it is in series with the second stage. Previous first stage which is a buck converter has good efficiency but bulky size due to low frequency operation. Another problem with using a buck converter is that light-load efficiency of the first stage is poor. To solve these problems, switched-capacitor voltage dividers are proposed. Since the first stage does not require voltage regulation, the sweet point for the voltage divider can be determined and high efficiency can be achieved. At the same time, since there are no magnetic components for the switched-capacitor voltage divider, high power density can be achieved. By very careful design, a power density of more than 2000W/in3 with more than 97% efficiency can be achieved for the proposed voltage divider. The light-load efficiency of the voltage divider can be as high as 99% by reducing the switching frequency at light load. As for the second stage, different low-voltage devices are evaluated, and the best device combinations are found for high-frequency operation. It has been demonstrated that 91% efficiency can be achieved with 600kHz frequency, and 89% efficiency can be achieved with a 1MHz frequency for the second stage. Moreover, adaptive on-time control method and a non-linear inductor structure are proposed to improve CCM and DCM efficiency for the second stage respectively. Previously the two-stage VR was only used as a CPU VR. The two-stage concept can also be applied to other systems. In this dissertation, the two-stage power architecture is applied to two different applications: laptop computers and high-end server microprocessors. The common characteristics of the two applications are their thermal design power (TDP) requirement. Thus the first stage can be designed with much lower power than the maximum system power. It has been demonstrated that the two-stage power architecture can achieve either higher efficiency or higher power density and a lower cost when compared with the single-stage VR. To get higher efficiency, a parallel two-stage power architecture, named sigma architecture, is proposed for VR applications. The proposed sigma VR takes advantage of the high-efficiency, fast-transient unregulated converter (DCX) and relies on this converter to deliver most of the output power, while using a low-power buck converter to achieve voltage regulation. Both the DCX converter and the buck converter can achieve around 90% efficiency when used in the sigma VR, which ensures 90% efficiency for the sigma VR. The small-signal model of the sigma VR is studied to achieve adaptive voltage positioning (AVP). The sigma power architecture can also be applied to low-power point of load (POL) applications to reduce the magnetic component size and improve the efficiency. Finally, the two-stage VR and the sigma VR are briefly compared. / Ph. D.

The growing demand for high voltage, compact pulsed power supplies has gained great attention. It requires power supplies with high power density, low profile and high efficiency. In this thesis, topologies and techniques are investigated to meet and exceed these challenges. Non-isolation type topologies have been used for this application. Due to the high voltage stress of the output, non-isolation topologies will suffer severe loss problems. Extremely low switching frequency will lead to massive magnetic volume. For non-isolation topologies, PWM converters can achieve soft switching to increase switching frequency. However, for this application, due to the large voltage regulation range and high voltage transformer nonidealities, it is difficult to optimize PWM converters. Secondary diode reverse recovery is another significant issue for PWM techniques. Resonant converters can achieve ZCS or ZVS and result in very low switching loss, thus enabling power supplies to operate at high switching frequency. Furthermore, the PRC and LCC resonant converter can fully absorb the leakage inductance and parasitic capacitance. With a capacitive output filter, the secondary diode will achieve natural turn-off and overcome reverse recovery problems. With a three-level structure, low voltage MOSFETs can be applied for this application. Switching frequency is increased to 200 kHz. In this paper, the power factor concept for resonant converters is proposed and analyzed. Based on this concept, a new methodology to measure the performance of resonant converters is presented. The optimal design guideline is provided. A novel constant power factor control is proposed and studied. Based on this control scheme, the performance of the resonant converter will be improved significantly. Design trade-offs are analyzed and studied. The optimal design aiming to increase the power density is investigated. The parallel resonant converter is proven to be the optimum topology for this application. The power density of 31 W/inch3 can be achieved by using the PRC topology with the constant power factor control. / Master of Science

The use of high-powered electrical energy systems requires an efficient and capable means to move electrical energy from one location to another while reducing energy losses. This paper describes the design and construction process of a high-powered busbar system that is to be implemented in pulsed-power applications. In order to obtain a robust system capable of handling in excess of 25kJ, both mechanical and electrical analyses were performed to verify a capable design. The following methodology describes how the Lorentz force was balanced with mechanical forces during the design process and then validated after construction was completed using the fundamental Maxwell equations and computer simulations. Main focuses include handling of EMF, high current density concentrations, and overall mechanical stability of the system and how these effects determine the physical design and implementation. In the end, a repeatable methodology is presented in the form of a design process that can be implemented in any system given the design criteria. / Master of Science