Because of the tough competition inthe telecom business there is aconstant push for higher capacity anddata rates and the companies producingthe telecommunications equipment needmore cost effective products to stayahead of competitors. It is thereforeinteresting to evaluate thepossibilities to use unlicensedfrequency bands at higher frequenciesas a complement to the traditionallower frequency bands. This study isfocusing on the 5.8 GHz band, which ismainly used for WLAN applications. Akey component in most transmitter (TX)designs is is the quadraturemodulator, which upconverts theinformation signal to desired carrierfrequency. In this study an attempt toevaluate the commercially availablequadrature modulator ADL5375 at 5.8GHz. An AWR Visual System Simulator(VSS) model based on measurements ofkey parameters of ADL5375 isconstructed. An attempt is made to seewhether a TX design can pass thespecifications set by 3rd GenerationPartnership Project (3GPP) for theLong Term Evolution (LTE) standard. Totest this an LTE signal source wasalso constructed. No certainconclusions can be drawn withoutputting the modulator in a complete(TX) design but the results indicatethat it might be possible to use it ina (TX) design for the 5.8 GHz band.

Les stations de base de télécommunications contemporaines pour les réseaux GSM / EDGE, WCDMA / HSPA et LTE sont de plus en plus complexes et à forte intensité énergétique. La solution privilégiée est un émetteur véritablement multi-standard. Modernes émetteurs des stations de base sont souvent multi-standard, en ce qu'ils peuvent supporter différentes normes ou de modes air-interface. Cependant, ce n'est pas réalisé par le fonctionnement simultané des normes différentes ou des «modes», mais par des moyens de reconfiguration, qui sont inefficaces et coûteux. Nous envisageons un émetteur entièrement multi-mode pratique capable de supporter simultanément GSM / EDGE, WCDMA / HSPA et LTE transporteurs. L'évolution des normes 3GPP vers un fonctionnement multi-mode est au stade embryonnaire. Pour contribuer à cet effort, notre travail revisite l'architecture traditionnelle de l'émetteur de station de base macro-cellule afin d'analyser et de définir les exigences de performance pour une plate-forme de radio cellulaire multi-standard. Notre analyse et la conception du système identifie également un goulot d'étranglement potentiel dans la chaîne multi-mode proposé, dont l'analyse est présentée. En conséquence, et enfin, nous proposons la conception d'un gain variable analogique modulateur en quadrature qui contourne le goulot d'étranglement, en soulignant la portée pour le développement futur et la validation de ce travail. Ce travail apporte également en avant quelques problèmes au niveau du système et met également en lumière les défis dans le fonctionnement des stations de base multi-standard. / Contemporary telecommunication Base-Stations for GSM/EDGE, WCDMA/HSPA and LTE are increasingly complex and energy intensive. The favoured solution is a truly multi-standard transmitter known as a single Radio Access Network (single-RAN). Modern base station transmitters are often multi-standard, in that they can support different air-interface standards or modes. However, this is achieved not through concurrent operation of the different standards or 'modes', but by means of reconfiguration, which is inefficient and expensive. We envision a practical, fully multi-mode transmitter capable of simultaneously supporting GSM/EDGE, WCDMA/HSPA and LTE carriers. The evolution of 3GPP standards towards multi-mode operation is in the nascent stage. To contribute to this effort, our work revisits the architecture of the traditional macro-cell Base-Station transmitter in order to analyse and define performance requirements for a multi-standard cellular radio platform. Our system analysis and design also identifies a potential bottleneck in the proposed multi-mode chain, for which analysis is presented. Consequently and lastly, we propose the conceptual design of a variable-gain Analog Quadrature Modulator that bypasses the bottleneck, highlighting scope for future development and validation of this work. This work also brings forth some system-level issues and also highlights challenges in the operation of multi-standard Base-Stations. Some of these include multi-mode signal crest-factor reduction, carrier-to-carrier interference mitigation, per-carrier power-control, etc.

[Formulae and special characters can only be approximated here. Please see the pdf version of the abstract for an accurate reproduction.] In In-phase/Quadrature (IQ) modulator generating Continuous-Phase-Frequency-Shift-Keying (CPFSK) signals, shortcomings in the implementation of the analogue reconstruction filters result in the loss of the constant envelope property of the output signal. Ripples in the envelope function cause undesirable spreading of the transmitted signal spectrum into adjacent channels when the signal passes through non-linear elements in the transmission path. This results in the failure of the transmitted signal in meeting transmission standards requirements. Therefore, digital techniques compensating for these shortcomings play an important role in enhancing the performance of the IQ modulator. In this thesis, several techniques to compensate for the irregularities in the I and Q channels are presented. The main emphasis is on preserving a constant magnitude and linear phase characteristics in the pass-band of the analogue filters as well as compensating for the imbalances between the I and Q channels. A generic digital pre-compensation model is used, and based on this model, the digital compensation schemes are formulated using control and signal processing techniques. Four digital compensation techniques are proposed and analysed. The first method is based on H2 norm minimization while the second method solves for the pre-compensation filters by posing the problem as one of H∞ optimisation. The third method stems from the well-known principle of Wiener filtering. Note that the digital compensation filters found using these methods are computed off-line. We then proceed by designing adaptive compensation filters that runs on-line and uses the “live” modulator input data to make the necessary measurements and compensations. These adaptive filters are computed based on the well-known Least-Mean-Square (LMS) algorithm. The advantage of using this approach is that the modulator does not require to be taken off-line in the process of calculating the pre-compensation filters and thus will not disrupt the normal operation of the modulator. The compensation performance of all methods is studied analytically using computer simulations and practical experiments. The results indicate that the proposed methods are effective and are able to provide substantial compensation for the shortcomings of the analogue reconstruction filters in the I and Q channels. In addition, the adaptive compensation scheme, implemented on a DSP platform shows that there is significant reduction in side-lobe levels for the compensated signal spectrum.

<p>The current consumption of the IQ modulator is a significant part of the totalcurrent consumption of a mobile transmitter platform and reducing it is of greatinterest. Also, as the WCDMA/LTE standards specifies full duplex transmissionsand Tx and Rx are most often using the same antenna, it is crucial to have asolution with low noise generation. Two new proposals have been studied with theaim to reduce the current consumption and noise contribution of the IQ modulator.</p><p>A current mode envelope tracking IQM is the first of the studied designs. Thisimplementation lowers the bias currents in the circuit in relation to the amplitudeof the baseband input signals, meaning that a low input amplitude results in alowering of the current consumption. It proves to be very efficient for basebandsignals with a high peak-to-average ratio. Simulations and calculations have shownthat an average current reduction of 56 % can be achieved for an arbitrary LTEbaseband signal.</p><p>The second is an entirely new passive mixer design where the baseband voltagesare sequentially copied to the RF node, removing the need for V-to-I conversion inthe mixer which reduces current consumption and noise. Results from simulationshas proven that this design is fully capable of improving both current consumptionas well as the noise levels. With an output power of 4.0 dBm, the power consumptionwas 43.3 mW, including clock generating circuits. This, combined with thefact that the design is small and simple, means that there is definitely a possibilityto replace the present IQM design with a passive mixer.</p>

The current consumption of the IQ modulator is a significant part of the totalcurrent consumption of a mobile transmitter platform and reducing it is of greatinterest. Also, as the WCDMA/LTE standards specifies full duplex transmissionsand Tx and Rx are most often using the same antenna, it is crucial to have asolution with low noise generation. Two new proposals have been studied with theaim to reduce the current consumption and noise contribution of the IQ modulator. A current mode envelope tracking IQM is the first of the studied designs. Thisimplementation lowers the bias currents in the circuit in relation to the amplitudeof the baseband input signals, meaning that a low input amplitude results in alowering of the current consumption. It proves to be very efficient for basebandsignals with a high peak-to-average ratio. Simulations and calculations have shownthat an average current reduction of 56 % can be achieved for an arbitrary LTEbaseband signal. The second is an entirely new passive mixer design where the baseband voltagesare sequentially copied to the RF node, removing the need for V-to-I conversion inthe mixer which reduces current consumption and noise. Results from simulationshas proven that this design is fully capable of improving both current consumptionas well as the noise levels. With an output power of 4.0 dBm, the power consumptionwas 43.3 mW, including clock generating circuits. This, combined with thefact that the design is small and simple, means that there is definitely a possibilityto replace the present IQM design with a passive mixer.

High-speed and high-resolution digital-to-analog converters (DACs) are vital components in all telecommunication systems. Radio-frequency digital-to-analog converter (RFDAC) provides high-speed and high-resolution conversion from digital domain to an analog signal. RFDACs can be employed in direct-conversion radio transmitter architectures. The idea of RFDAC is to utilize an oscillatory pulse-amplitude modulation instead of the conventional zero-order hold pulse amplitude modulation, which results in DAC output spectrum to have high energy high-frequency lobe, other than the Nyquist main lobe. The frequency of the oscillatory pulse can be chosen, with respect to the sample frequency, such that the aliasing images of the signal at integer multiples of the sample frequency are landed in the high-energy high-frequency lobes of the DAC frequency response. Therefore the high-frequency images of the signal can be used as the output of the DAC, i.e., no need to the mixing stage for frequency up-conversion after the DAC in the radio transmitter. The mixing stage however is not eliminated but it is rather moved into the DAC elements and therefore the local oscillator (LO) signal with high frequency should be delivered to each individual DAC element. In direct-conversion architecture of IQ modulators which utilize the RFDAC technique, however, there is a problem of finite image rejection. The origin of this problem is the different polarity of the spectral response of the oscillatory pulse-amplitude modulation in I and Q branches. The conditions where this problem can be alleviated in IQ modulator employing RFDACs is also discussed in this work. ΣΔ modulators are used preceding the DAC in the transmitter chain to reduce the digital signal’s number of bits, still maintain the same resolution. By utilizing the ΣΔ modulator now the total number of DAC elements has decreased and therefore the delivery of the high-frequency LO signal to each DAC element is practical. One of the costs of employing ΣΔ modulator, however, is a higher quantization noise power at the output of the DAC. The quantization noise is ideally spectrally shaped to out-of-band frequencies by the ΣΔ modulator. The shaped noise which usually has comparatively high power must be filtered out to fulfill the radio transmission spectral mask requirement. Semi-digital FIR filter can be used in the context of digital-to-analog conversion, cascaded with ΣΔ modulator to filter the out-of-band noise by the modulator. In the same time it converts the signal from digital domain to an analog quantity. In general case, we can have a multi-bit, semi-digital FIR filter where each tap of the filter is realized with a sub-DAC of M bits. The delay elements are also realized with M-bit shift registers. If the output of the modulator is given by a single bit, the semi-digital FIR filter taps are simply controlled by a single switch assuming a current-steering architecture DAC. One of the major advantages is that the static linearity of the DAC is optimum. Since there are only two output levels available in the DAC, the static transfer function, regardless of the mismatch errors, is always given by a straight line. In this work, the design of SDFIR filter is done through an optimization procedure where the ΣΔ noise transfer function is also taken into account. Different constraints are defined for different applications in formulation of the SDFIR optimization problem. For a given radio transmitter application the objective function can be defined as, e.g., the hardware cost for SDFIR implementation while the constraint can be set to fulfill the radio transmitter spectral emission mask.