Ce travail de thèse a pour sujet l'étude de transistors en couches minces (TFTs) à base d'Indium Gallium Zinc Oxide (IGZO). Nous nous sommes intéressés au procédé de réalisation des TFTs, et à la caractérisation des couches d'IGZO afin d'obtenir les caractéristiques au plus près de l'état de l'art. Nous avons également étudié le processus de passivation, paramètre identifié comme critique pour stabiliser les TFT et atteindre de bonnes performances.Dans un premier temps, nous avons mis au point les conditions du dépôt de la couche active, et de la réalisation des TFTs. Les analyses morphologiques et structurales ont montré l'absence de cristallites de couche, ainsi qu'une surface peu rugueuse. La densité des porteurs de charge de la couche IGZO diminue lorsque le débit d'oxygène, variable durant son dépôt, augmente. La couche active déposée à 200°C et à 4 sccm d'oxygène présente une densité de porteurs de charge de l'ordre de 1E17 cm-3, valeur adaptée au fonctionnement des TFTs.Dans un second temps, nous avons évalué l'influence d'un recuit sur les caractéristiques des TFTs. Nous avons mis en évidence que le recuit sous oxygène conduit à des TFTs opérationnels, tandis que celui sous azote ou en absence de recuit induisent une suppression de l'effet de champ. Nos études ont également montré qu'une température de recuit de 300°C est favorable aux performances des transistors. Les premiers TFTs présentent des mobilités entre 5 et 15 cm2/Vs, des rapports ION/IOFF de l'ordre de 1E7, et des pentes sous le seuil d'environ 0.3 V/décade. Les tensions de seuil (VT), quant à elles, demeurent faibles donc restent à améliorer.Pour finir, nous avons étudié l'impact d'une couche de passivation sur les TFTs, en raison de la dégradation des caractéristiques de ces derniers dans l'atmosphère ambiante. Les couches de SiO2 (déposée par PECVD) et d'Al2O3 (déposée par ALD) ont été étudiées. Nous avons mis en évidence que ces passivations peuvent dégrader les TFTs au lieu de les protéger. VT tend à se décaler dans le sens négatif lorsque l'on augmente l'épaisseur de la couche d'Al2O3 ou le débit de Silane durant le dépôt du SiO2. Une des raisons principales de ce phénomène est la présence de l'hydrogène généré lors de la passivation. Nous avons évalué les solutions pour éviter la dégradation lors du dépôt et assurer une bonne protection du TFT. / This thesis aims to study thin-film transistors (TFTs) based on Indium Gallium Zinc Oxide (IGZO) in the framework of applications in active matrix flat panel LCD and OLED display. The TFT fabrication process and the characterization of IGZO deposited film are two key studies in this thesis in order to obtain TFT electrical characteristics close to the state-of-the-art. We have also studied the passivation which is identified as crucial for stabilizing the TFT and achieving good performance.The deposition of the active layer and the fabrication process of TFT are firstly studied. Smooth surface of deposited films is demonstrated by AFM and the absence of the crystalline peak of the material is shown by X-ray diffraction. The density of charge carriers decreases with the increase of oxygen flow rate. The active layer deposited at 200°C and at 4 sccm of oxygen flow has a carrier density in the order of 1E17 cm-3 which is suitable for TFT operation. This condition is chosen to fabricate IGZO-based TFT in this thesis.In a second step, we have evaluated the influence of annealing condition on TFTs' electrical characteristics. Annealing in oxygen leads to operational TFTs while doing the same under nitrogen or the absence of annealing suppresses field-effect behavior. Our studies have also shown that annealing temperature of 300°C is suitable to obtain good performance of the transistors. From this study, we have obtained TFTs with high mobility (between 5 and 15 cm2/Vs), high ION/IOFF ratios (about 1E7), and reasonable sub threshold slope (about 0.3 V/decade). The threshold voltage (VT) however remains low (between -4 and -2 V) and needs to be improved.Finally, we have investigated the impact of a passivation layer on the performance of IGZO TFTs. SiO2 film (deposited by PECVD) and Al2O3 film (formed by ALD) were studied. We have observed that such passivation can degrade the TFTs rather than protecting them. Concretely, VT shifts in negative direction when increasing the Al2O3 layer thickness or the silane flow during SiO2 deposition. Principal reason for this shift is the presence of hydrogen which is generated during passivation. We have evaluated some solutions to reduce the degradation during deposition and ensure a good protection of the TFTs.

Indium-Gallium-Zinc-Oxide (a-IGZO) is an amorphous oxide semiconductor that has been attracting increasing attention for use in flat panel display and optoelectronic applications. This is largely due to IGZO’s high mobility at low processing temperatures. In this thesis, IGZO films were successfully grown on polyethylene naphthalate (PEN) substrates by RF magnetron sputtering at room temperature. These films were flexible, transparent and had a good Hall mobility (5-12 cm2/Vs). High quality metal oxide Schottky contacts were fabricated on these as-grown IGZO/PEN films with on-off rectification ratios of up to 108. These were then used as the gate contacts in transparent metal semiconductor field effect transistors (MESFETs). The performance and device stability of these IGZO/PEN MESFETs were investigated via a series of stress tests in both dark conditions and under illumination at different wavelengths in the visible spectrum. During constant voltage stress testing under illumination, the threshold voltage shifted by -0.54 V and 0.38 V for negative and positive gate biasing, respectively. These shifts proved reversible when devices were left in dark conditions for extended periods of time. The effect of persistent photoconductivity after exposure to different illumination sources was examined, with three potential passivation coatings to reduce this unwanted effect explored. Transparent IGZO/PEN MESFETs with an absolute transmission of up to 75% were achieved with the use of ITO ohmic contacts. These devices survived mechanical bending down to a radius of 7 mm with negligible variation in on-current and threshold voltage. This allows for the possibility of incorporating their use in future applications such as flexible transparent electronics.

abstract: This thesis work mainly examined the stability and reliability issues of amorphous Indium Gallium Zinc Oxide (a-IGZO) thin film transistors under bias-illumination stress. Amorphous hydrogenated silicon has been the dominating material used in thin film transistors as a channel layer. However with the advent of modern high performance display technologies, it is required to have devices with better current carrying capability and better reproducibility. This brings the idea of new material for channel layer of these devices. Researchers have tried poly silicon materials, organic materials and amorphous mixed oxide materials as a replacement to conventional amorphous silicon layer. Due to its low price and easy manufacturing process, amorphous mixed oxide thin film transistors have become a viable option to replace the conventional ones in order to achieve high performance display circuits. But with new materials emerging, comes the challenge of reliability and stability issues associated with it. Performance measurement under bias stress and bias-illumination stress have been reported previously. This work proposes novel post processing low temperature long time annealing in optimum ambient in order to annihilate or reduce the defects and vacancies associated with amorphous material which lead to the instability or even the failure of the devices. Thin film transistors of a-IGZO has been tested for standalone illumination stress and bias-illumination stress before and after annealing. HP 4155B semiconductor parameter analyzer has been used to stress the devices and measure the output characteristics and transfer characteristics of the devices. Extra attention has been given about the effect of forming gas annealing on a-IGZO thin film. a-IGZO thin film deposited on silicon substrate has been tested for resistivity, mobility and carrier concentration before and after annealing in various ambient. Elastic Recoil Detection has been performed on the films to measure the amount of hydrogen atoms present in the film. Moreover, the circuit parameters of the thin film transistors has been extracted to verify the physical phenomenon responsible for the instability and failure of the devices. Parameters like channel resistance, carrier mobility, power factor has been extracted and variation of these parameters has been observed before and after the stress. / Dissertation/Thesis / M.S. Electrical Engineering 2013

In this thesis work, novel planar nanodiodes (PNDs) using an amorphous indium-gallium-zinc oxide (IGZO) film as the active layer have been electrically characterised for the first time. Simulation techniques and experimental methods, such as e-beam lithography (EBL) and nanoimprint lithography (NIL), have been explored for these devices. In addition, a novel approach was realized that produced self-aligned contacts for the nanostructured devices. A preliminary parameter space for experimentation of the PNDs was ascertained by simulating the devices using a technology computer aided design (TCAD) simulator. In this study Silvaco’s ATLAS default IGZO material system was adopted. These simulations showed device performance to be heavily dependent on the carrier concentration of the film, owing to the high leakage current during the off-state of device operation. Furthermore, device geometry had a significant influence on the device’s electrical response. Channel width, length and trench width were all examined. Experimental characterisation of PNDs were attained by fabricating devices using EBL. These devices are the first to exhbit diode-like DC electrical response from an IGZO-based PND. Full current rectification was obtained with a rectification ratio of 10^4 for devices with a long, narrow channel with a width of 50nm and a length of 4μm. This particular device geometry had a turn-on voltage, Von, of 2.2V and did not breakdown within the −10V bias range tested. An output drive current of 0.1μA at 10V was obtained by the single PND device. It was also demonstrated that by increasing the channel width, Von could be reduced; however, rectification also diminished. It is reasoned that the exposed IGZO surface was subject to contamination from the ambient which changed the device’s electrical response after 17 days. An ultraviolet NIL (UV-NIL) technique was developed to produce the PNDs. This fabrication method offers a suitable route towards high-volume manufacture of these nanodevices, which is critical for them to be incorporated into a low-cost RF energy harvester. A novel NIL process was established in which the contact pads were self-aligned to within ~ 200nm of the channel by patterning both metal and semiconductor layers with a single imprint. DC electrical characterisation of the imprinted PNDs produced high rectifications ratios at a lower Von. The greater number of devices tested allowed a coarse parameter space for channel width and length to determined. PNDs with a channel aspect ratio (length divided by width) of more than 20 exhibited the greatest DC rectification of 10^4. An alumina capping layer was found to eliminate hysteresis in the electrical response; however, the greater permittivity value had no noticeable effect on device performance. Finally, a large-signal RF analysis is carried out on a device which suggest no deterioration in device perfromance up to at least 1GHz.

The characterization and fabrication of active matrix thin film transistors (TFTs) has been studied for an addressable microfluidic electrowetting channel device as application. A new transparent semiconductor material, Amorphous Indium Gallium Zinc Oxide (a-IGZO), is used for TFT, which shows high electrical performance rather than amorphous silicon based TFT; higher mobility and even higher transparency. The purpose of this dissertation is to optimize each TFT process including the optimization of a-IGZO properties to achieve robust device for application. To minimize hysteresis of TFT curves, the gate dielectric is discussed extensively in this dissertation. By optimizing gas ratio of NH3SiH4, it is found that the TFT with NH3 rich SiNx gate dielectric deposited with NH3/SiH4 =5.1 and stoichiometric SiO2 demonstrates best condition to reduce hysteresis. a-IGZO films is investigated as a function of power and substrate bias effect which affects to electrical performance; the higher power and substrate bias increase the carrier density in the film and mainly cause threshold voltage(VT) to shift in the negative gate voltage direction and mobility to increase, respectively. In addition, the powerful method to estimate the electrical properties of a-IGZO is proposed by calculating O2 and IGZO flux during sputtering in which the incorporation ratio with O2/IGZO ≈1 demonstrates the optimized a-IGZO film for TFT. It is confirmed that both physical and chemical adsorption affects the electrical property of a-IGZO channel by studying TFT-IV characteristics with different pressure and analyzing X-ray photoelectron spectroscopy (XPS), which mainly affects the VT instability. The sputtered SiO2 passivation shows better electrical performance. To achieve electrically compatible (lower back channel current) a-IGZO film to SiO2 sputter passivated device, a-IGZO TFTs require oxygen rich a-IGZO back channel by employing two step a-IGZO deposition process (2nd 10nm a-IGZO with PO2 = 1.5mTorr on 1st 40nm a-IGZO with PO2=1mTor). Electrowetting microfluidic channel device as application using a-IGZO TFTs is studied by doing preliminary test. The electrowetting channel test using polymer post device platform is candidate for addressable electrowetting microfluidic channel device driven by active matrix type a-IGZO TFT.

In this dissertation, the electrical characteristics of generally used hydrogenated amorphous silicon (a-Si:H) TFTs in LCD and newly risen amorphous indium-gallium-zinc oxide (a-IGZO) TFTs were studied. For modern mobile display and large-size flat panel display application, the traditional thin-film transistor-liquid crystal display (TFT-LCD) technology confronts with a lot of challenges and problems. In general, flexible displays must exhibit some bending ability; however, bending applies mechanical strain to electronic circuits and affects device characteristics. Therefore, the electrical characteristics of a-Si:H TFTs fabricated on stainless steel foil substrates with uniaxial bending were investigated at different temperatures. Experimental results showed that the on-state current and threshold voltage degraded under outward bending. This is because outward bending will induce the increase of band tail states, affecting the transport mechanism at different temperatures. In addition, for practical operation, the electrical characteristics of a-Si:H TFTs under flat and bending situations after AC/DC stress at different temperatures were studied. It was found that high temperature and mechanical bending played important roles under AC stress. The dependence between the accumulated sum of bias rising and falling time and the threshold voltage shifts under AC stress was also observed. Because a-Si:H is a photosensitive material, the high intensity backlight illumination will degrade the performance of a-Si:H TFTs. Thus, the photo-leakage current of a-Si:H TFTs under illumination was investigated at different temperatures. Experimental results showed that a-Si:H TFTs exhibited a pool performance at lower temperatures. The indirect recombination rate and the parasitic resistance (Rp) are responsible for the different photo-leakage-current trends of a-Si:H TFTs under varied temperature operations. To investigate the photo-leakage current, the a-Si:H TFTs were exposed to ultraviolet (UV) light irradiation. It was found that the photo current of a-Si:H TFTs was reduced after UV light irradiation. The detail mechanisms on reducing/increasing photo-leakage current by UV light irradiation were discussed. Recently, the oxide-based semiconductor TFT, especially a-IGZO TFT, is considered as one of promising candidates for active matrix flat-panel display. However, the a-IGZO TFT exists significant electrical instability issue and manufacturing problems. As a consequence, we investigated the effect of hydrogen incorporation on a-IGZO TFTs to reduce interface states between active layer and insulator. Experimental results showed that the electrical characteristics of hydrogen-incorporated a-IGZO TFTs were improved. The threshold voltage shift (£GVth) in hysteresis loop is suppressed from 4 V to 2 V due to the hydrogen-induced passivation of the interface trap states. Finally, we reported the effect of ambient environment on a-IGZO TFT instability. As a-IGZO TFTs were stored in atmosphere environment for 40 days, the transfer characteristics accompanying strange hump were observed during bias-stress. The hump phenomenon is attributed to the absorption of H2O molecule. Additionally, the sufficient electric field is also necessary to cause this anomalous transfer characteristic.

Pour réaliser des fonctions électroniques sur support souple, le transistor en couches minces (TFT) est indispensable. Cette thèse a pour objectif d’approfondir les connaissances sur ces dispositifs.L’état de l’art est synthétisé dans le chapitre 1. Cette partie présente tout d’abord les TFT et justifie l’utilisation de l’oxyde d’indium gallium zinc (IGZO). Ensuite les propriétés de cet oxyde semi-conducteur amorphe sont traitées ; et enfin le chapitre fait état des résultats obtenus avec des TFT en IGZO.Le chapitre 2 établie un lien entre les propriétés de l’IGZO et le dépôt par pulvérisation cathodique. L’étude des films a été réalisée par ellipsométrie spectroscopique. Celle-ci a mis en évidence des variations dans les propriétés optiques dues au temps de dépôt, à la concentration en oxygène et à la position sur le substrat. Ces résultats ont été comparés à des mesures de résistivité, pour comprendre plus précisément la cause de ces variations.Le chapitre 3 élabore un procédé complet permettant de réaliser des TFT sur support souple. Le choix des différents matériaux est discuté, et les différents outils de procédés sont adaptés afin de réaliser ces dispositifs. Les TFT obtenus sont caractérisés en fonction du temps de recuit et sous flexion. Ils ont atteint des mobilités 10 cm².V-1.s-1.Le chapitre 4 étudie le dépôt d’IGZO par impression jet d’encre. Une encre a été formulée et les différents paramètres d’impression ajustés. Afin de comparer les différentes techniques de dépôt, des TFT avec canal en IGZO imprimé ont été réalisé et les films imprimés ont été caractérisé par ellipsométrie spectroscopique. Ces dispositifs ont atteint des mobilités de 0,4 cm2.V-1.s-1. / In order to carry out electronics functions on flexible substrate, thin film transistor is essential. The aim of this thesis is to increase knowledge on this device.State of art of IGZO TFT is summarized in chapter 1. This part presents thin film transistor and justify the choice of IGZO as the semiconductor material. Then, properties of this amorphous oxide semiconductor are discussed. Finally, this chapter presents the results obtained in the literature for IGZO based thin film transistor.Chapter 2 establishes a link between IGZO properties and sputtering deposition. Films are studied by spectroscopic ellipsometry. Experiments show variations in optical properties due to deposition time, oxygen content and position on the wafer. Resistivity measurements are carried out to understand more deeply the causes of these variations.Chapter 3 develops a complete process to achieve TFT on flexible substrate. The choice of different materials and processes is discussed. The performances of the TFT are investigated versus the annealing time and characterized under mechanical stress. Mobility up to 10 cm2.V-1.s-1 can be achieved after an annealing at 300°C during 1h30. Mechanical stresses show a degradation of the transistor induced by cracks in the oxide layer.Chapter 4 focuses on IGZO's deposition by inkjet printing. An ink is formulated using metallic salts and a solvents mixture. The parameters of the printing system are also optimized. To compare the different techniques of deposition, printed IGZO TFTs are characterized and compared with the one fabricated with the standard PVD deposition technique. Mobility is relatively lower and equals 0.4 cm2.V-1.s-1.

Indium-gallium-zinc oxide (IGZO) and zinc-tin oxide (ZTO) are investigated for thin-film transistor (TFT) applications. Negative bias illumination stress (NBIS) is employed for electrical stability assessment. Unpassivated IGZO and ZTO TFTs suffer from severe NBIS instabilities. Zinc-tin-silicon oxide is found to be an effective passivation layer for IGZO and ZTO TFTs, significantly improving the NBIS stability. NBIS instabilities in unpassivated TFTs are attributed to an NBIS-induced desorption of chemisorbed oxygen from the channel layer top surface, exposing surface oxygen vacancies. A ZTSO layer protects the channel layer top surface from adsorbed gas interactions and also appears to reduce the density of oxygen vacancies. The best device architectures investigated with respect to TFT electrical performance are found to be staggered with aluminum electrodes for unpassivated TFTs and coplanar with ITO electrodes for ZTSO-passivated TFTs. Annealing in wet-O₂ is not found to be effective for improving the performance of IGZO or ZTO TFTs or for reducing the post-deposition annealing temperature. / Graduation date: 2012

In order to meet the requests of the application as pixel switch and current driver in next generation active-matrix liquid crystal displays (AMLCD) and active-matrix organic light-emitting diodes (AMOLED). The materials of low temperature poly-silicon (LTPS) and metal-oxide are supposed to be the most potential material for active layer of thin-film transistors (TFTs) due to their high mobility compared to the traditional amorphous silicon TFTs. Therefore, in order to make the LTPS TFTs and metal-oxide TFTs affordable for the practical applications, the understanding of instability and reliability is critically important. In the first part, we studied the nonvolatile memory characteristics of polycrystalline-silicon thin-film-transistors (poly-Si TFTs) with a silicon-oxide-nitride-oxide-silicon (SONOS) structure. As the device was programmed, significant gate induced drain leakage current was observed due to the extra programmed electrons trapped in the nitride layer which. In order to suppress the leakage current and thereby avoid signal misidentification, we utilized band-to-band hot hole injection method to counteract programmed electrons and this method can exhibit good sustainability because the injected hot holes can remain in the nitride layer after repeated operations. On the other hand, we also investigated the degradation behavior of SONOS-TFT under off-state stress. After the electrical stress, the significant on-state degradation indicates that the interface states accompanied with hot-hole injection. Moreover, the ISE-TCAD simulation tool was utilized to model the degradation mechanism and analyze trap states distribution. Furthermore, we also performed the identical off-state stress for the device with different memory states. The different degradation behavior under different memory states is attributed to the different overlap region of injected holes and trap states. In the second part, the degradation mechanism of indium-gallium-zinc oxide (IGZO) thin film transistors (TFTs) caused by gate-bias stress performed in the dark and light illumination was investigated. The parallel threshold voltage indicates that charge trapping model dominates the degradation behavior under positive gate-bias stress. However, the degradation of negative gate bias stress is much slighter than the positive gate bias stress since the IGZO material is hard to induced hole inversion layer. In addition, the hole mobility is much lower than electron resulting in ignorable hole trapping effect. On the other hand, the identical positive and negative gate bias stress performed under light illumination exhibit opposite degradation behavior compared with dark stress. This degradation variation under dark and light illumination can be attributed to the effectively energy barrier variation of electron and hole trapping. Furthermore, to further investigate the light induced instability for IGZO TFTs, the device with and without a SiOx passivation were investigated under light illumination. The experiment results indicate that oxygen adsorption and desorption dominate the light induced instability for unpassivated device and the trap states caused during the passivation layer deposition process will induce apparent subthreshold photo-leakage current under light illumination. In the third part, we investigated the degradation mechanism of IGZO TFTs under hot-carrier and self-heating stress. Under hot-carrier stress, except the electron trapping induced positive Vt shift, an apparent on-current degradation behavior indicates that trap states creation. On the other hand, the identical hot-carrier stress performed in the asymmetric source/drain structure exhibits different degradation behavior compared with symmetric source/drain structure. For asymmetric structure, the strong electrical field in the I-shaped drain electrode will induce channel hot electron injection near the drain side and cause asymmetric threshold voltage degradation. In this part we also investigated the degradation behavior under self-heating stress. The apparent positive threshold voltage (Vt) shift and on-current degradation indicate that the combination of trap states generation and electron trapping effect occur during stress. The trap states generation is caused by the combination of Joule heating and the large vertical field. Moreover, the Joule heating generated by self-heating operation can enhance electron trapping effect and cause larger Vt shift in comparison with the gate-bias stress. Finally, the electrical properties and photo sensitivity of dual gate IGZO TFTs were investigated. The asymmetric electrical properties and photo sensitivity under top gate and bottom gate operation is attributed to the variation of gate control region. Furthermore, the obvious asymmetric photo sensitivity can be utilized to the In-cell touch panel technology and lower the process cost compared with the traditional a-Si TFTs due to the elimination of black matrix.