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Multi-level inverters play a significant role in high power drive systems for induction motors. Interest in multi-level inverters started with the three-level, neutral point clamped (NPC) inverter. Now there are many topologies for higher number of levels such as the, flying capacitor and cascaded H-bridge etc. The advantage of multi-level inverters is the reduced voltage stress on the switching devices, lower dv/dt and lower harmonic content. The voltage space vector structure in a multi-level inverter has a hexagonal periphery similar to that in a two-level inverter. In the over-modulation region in multi-level inverters, there is the presence of lower order harmonics such as 5th and 7th in the output voltage, and this can be avoided by using a voltage space vector scheme with more than six polygonal voltage space vectors such as 12, 18, 24 etc. These polygonal voltage space vectors can be generated by using multi-level inverter topologies, by cascading two-level inverter structures with asymmetric DC-links. This thesis deals with the development of 12-sided and 18-sided polygonal voltage space vector schemes for induction motor drives. With the 12-sided polygonal structure, all the 5th and 7th harmonic orders and 6n±1, n=1, 3, 5.. are absent throughout the modulation range, and in the 18-sided voltage space vector scheme, 5th, 7th, 11th and 13th harmonics are absent throughout the modulation range. With the absence of the low order frequencies in the proposed polygonal space vector structures, high frequency PWM schemes are not needed for voltage control. This is an advantage over conventional schemes. Also, due to the absence of lower order harmonics throughout the modulation range, special compensated synchronous reference frame PI controllers are not needed in current controlled vector control schemes in over-modulation. In this thesis a method is proposed for generating 12-sided polygonal voltage space vectors for an induction motor fed from one side. A cascaded combination of three two-level inverters is used with asymmetrical DC-links. A simple space vector PWM scheme based only on the sampled reference phase amplitudes are used for the inverter output voltage control. The reference space vector is sampled at different sampling rates depending on the frequency of operation. The number of samples in a sector is chosen to keep the overall switching frequency around 1kHz, in order to minimize switching losses. The voltage space vectors that make up the two sides of the sector in which the reference vector lies, are time averaged using volt-sec balance, to result in the reference vector. In the proposed 12-sided PWM scheme all the harmonics of the order 6n±1, n=1, 3, 5... are eliminated from the phase voltage, throughout the modulation range. In multi-level inverters steps are taken to eliminate common-mode voltage. Common-mode voltage is defined as one third of the sum of the three pole voltages of the inverter for a three phase system. Bearings are found to fail prematurely in drives with fast rising voltage pulses and high frequency switching. The alternating common-mode voltage generated by the PWM inverter contributes to capacitive couplings from stator body to rotor body. This generates motor shaft voltages causing bearing currents to flow from rotor to stator body and then to the ground. There can be a flashover between the bearing races. Also a phenomenon termed EDM (Electro-discharge machining) effect occurs and may damage the bearings. Common-mode voltage has to be eliminated in order to overcome these effects. In multi-level inverters redundancy of space vector locations is used to eliminate common-mode voltages. In the present thesis a 12-sided polygonal voltage space vector based inverter with an open-end winding induction motor is proposed, in which the common-mode voltage variation at the poles of the inverter is eliminated. In this scheme, there is a three-level inverter on each side of the open-end winding of the induction motor. The three-level inverter is made by cascading two, two-level inverters with unequal DC-link voltages. Appropriate space vectors are selected from opposite sides such that the sum of the pole voltages on each side is a constant. Also during the PWM operation when the zero vector is applied, identical voltage levels are used on both sides of the open-end windings, in order to make the phase voltages zero, while the common-mode voltage is kept constant. This way, common-mode voltage variations are eliminated throughout the modulation range by appropriately selecting the voltage vectors from opposite ends. In this method all the harmonics of 6n±1, n=1, 3, 5.. and triplen orders are eliminated. In the 12-sided polygonal voltage space vector methods, the 11th and 13th harmonics though attenuated are not eliminated. In the 18-sided polygonal voltage space vector method the 11th and 13th harmonics are eliminated along with the 5th and 7th harmonics. This scheme consists of an open-end winding induction motor fed from one side by a two-level inverter and the other side by a three-level inverter comprising of two cascaded two-level inverters. Asymmetric DC-links of a particular ratio are present. The 12-sided and 18-sided polygonal voltage space vector methods have been first simulated using SIMULINK and then verified experimentally on a 1.5kW induction motor drive. In the simulation as well as the experimental setup the starting point is the generation of the three reference voltages v, vB and vC . A method for determining the sector in which the reference vector lies by comparing the values of the scaled sampled instantaneous reference voltages is proposed. For the reference vector lying in a sector between the two active vectors, the first vector is to be kept on for T1 duration and the second vector for T2 duration. These timing durations can be found from the derived formula, using the sampled instantaneous values of the reference voltages and the sector information. From the pulse widths and the sector number, the voltage level at which a phase in the inverter has to be maintained is uniquely determined from look-up tables. Thus, once the pole voltages are determined the phase voltages can be easily determined for simulation studies. By using a suitable induction motor model in the simulation, the effect of the PWM scheme on the motor current can be easily obtained. The simulation studies are experimentally verified on a 1.5kW open-end winding induction motor drive. A V/f control scheme is used for the study of the drive scheme for different speeds of operation. A DSP (TMS320LF2407A) is used for generating the PWM signals for variable speed operation. The 12-sided polygonal voltage space vector scheme with the motor fed from a single side has a simple power bus structure and it is also observed that the pole voltage is clamped to zero for 30% of the time duration of one cycle of operation. This will increase the overall efficiency. The proposed scheme eliminates all harmonics of the order 6n±1, n=1, 3, 5…for the complete modulation range. The 12-sided polygonal voltage space vector scheme with common-mode elimination requires the open-end winding configuration of the induction motor. Two asymmetrical DC-links are required which are common to both sides. The leg of the high voltage inverter is seen to be switched only for 50% duration in a cycle of operation. This will also reduce switching losses considerably. The proposed scheme not only eliminates all harmonics of the order 6n±1, n=1, 3, 5…for the complete modulation range, but also maintains the common-mode voltage on both sides constant. The common-mode voltage variation is eliminated. This eliminates bearing currents and shaft voltages which can damage the motor bearings. In the 18-sided polygonal voltage space vector based inverter, the 11th and 13th harmonics are eliminated along with the 5th and 7th. Here also an open-end winding induction motor is used, with a two-level inverter on one side and a three-level inverter on the other side. A pole of the two-level inverter is at clamped to zero voltage for 50% of the time and a pole of the three-level inverter is clamped to zero for 30% of the time for one cycle of operation. The 18-sided polygonal voltage space vectors show the highest maximum peak fundamental voltage in the 18-step mode of 0.663Vdc compared to 0.658Vdc in the 12-step mode of the 12-sided polygonal voltage space vector scheme and 0.637Vdc in the six-step mode of a two-level inverter or conventional multi-level inverter (where Vdc is the radius of the space vector polygon). Though the schemes proposed are verified on a low power laboratory prototype, the principle and the control algorithm development are general in nature and can be easily extended to induction motor drives for high power applications.

<p><a>Low reflow temperature solder interconnect technology based on Sn-Bi alloys is currently being considered as an alternative for Sn-Ag-Cu solder alloys to form solder interconnects at significantly lower melting temperatures than required for Sn-Ag-Cu alloys. </a></p> <p>A new low temperature interconnect technology based on Sn-Bi alloys is being considered for attaching Sn-Ag-Cu (SAC) solder BGAs to circuit boards at temperatures significantly lower than for homogeneous SAC joints. Microstructure development studies of reflow and annealing, including Bi diffusion and precipitation, are important in understanding mechanical reliability and failures paths in the resulting heterogeneous joints. Experiments in several SAC-SnBi geometries revealed that Bi concentration profiles deviate from local equilibrium expected from the phase diagram, with much higher local concentrations and lower volume fractions of liquid than expected during short-time high temperature anneals in the two-phase region. As annealing time increased and Sn grain coarsening occurred, the compositions and fractions revert to the phase diagram, suggesting an “anti-Scheil” effect. A Bi interface segregation model based on Bi segregation at Sn grain boundaries was developed to explain the Bi distribution characteristics in Sn during two-phase annealing process. </p> <p>Besides hybrid joints, microstructural evolution after reflow and aging, especially of intermetallic compound (IMC) growth at solder/pad surface finish interfaces in homogeneous SnBi LTS joints, is also important to understanding fatigue life and crack paths in the solder joints. This study describes intermetallic growth in homogeneous solder joints of Sn-Bi eutectic alloy and Sn-Bi-Ag alloys formed with electroless nickel-immersion gold (ENIG) and Cu-organic surface protection (Cu-OSP) surface finishes. Experimental observations revealed that, during solid state annealing following reflow, the 50nm Au from the ENIG surface finish catalyzed rapid (Au,Ni)Sn₄ intermetallic growth at the Ni-solder interface in both Sn-Bi and Sn-Bi-Ag homogeneous joints, which led to significant solder joint embrittlement during fatigue testing. Further study found that the growth rate of (Au,Ni)Sn₄ intermetallic could be reduced by In and Sb alloying of SnBi solders and is totally eliminated with Cu addition. Fatigue testing revealed Au embrittlement is always present in solder joints without Cu, even with In and Sb additions due to (Au,Ni)Sn₄ formation. The fatigue reliability of Cu-containing alloys is better on ENIG due to the formation of (Ni,Cu,Au)₆Sn₅ at the solder-surface finish interface instead of (Au,Ni)Sn₄.</p> <p>With the development of SnBi LTSs, a new generation alloy called HRL1 stands out for its outstanding reliability during thermal cycling and drop shock testing. This study focused on microstructure evolution in SnBi eutectic, SnBiAg eutectic and HRL1 solders (MacDermid Alpha) homogeneous joints and hybrid joints with SAC305 formed with ENIG and Cu-OSP surface finishes. Experimental results revealed that with more microalloying elements, HRL1 has significantly refined microstructure and slower Sn grain growth rate during solid-state aging compared with SnBi and SnBiAg eutectic alloys. Intermetallic compound growth study showed that during solid state annealing following reflow, the (50nm) Au from the ENIG finish catalyzed rapid (Au,Ni)Sn₄ intermetallic growth at the Ni-solder interface in both Sn-Bi and Sn-Bi-Ag homogeneous joints, which led to significant solder joint embrittlement during creep and fatigue loading. However, (Au,Ni)Sn₄ growth and gold embrittlement was completely eliminated for HRL1 due to Cu additions in it, and HRL1 has significantly better fatigue reliability than SnBi and SnBiAg eutectic alloys on both OSP and ENIG surface finishes.</p>

<div>This dissertation focuses on developing a series of mathematical models to understand the role of urban transportation system, urban mobility and information dissemination in the spreading process of infectious diseases within metropolitan areas. Urban transportation system serves as the catalyst of disease contagion since it provides the mobility for bringing people to participate in intensive urban activities and has high passenger volume and long commuting time which facilitates the spread of contagious diseases. In light of significant needs in understanding the connection between disease contagion and the urban transportation systems, both macroscopic and microscopic models are developed and the dissertation consists of three main parts. </div><div></div><div>The first part of the dissertation aims to model the macroscopic level of disease spreading within urban transportation system based on compartment models. Nonlinear dynamic systems are developed to model the spread of infectious disease with various travel modes, compare models with and without contagion during travel, understand how urban transportation system may facilitate or impede epidemics, and devise control strategies for mitigating epidemics at the network level. The hybrid automata is also introduced to account for systems with different levels of control and with uncertain initial epidemic size, and reachability analysis is used to over-approximate the disease trajectories of the nonlinear systems. The 2003 Beijing SARS data are used to validate the effectiveness of the model. In addition, comprehensive numerical experiments are conducted to understand the importance of modeling travel contagion during urban disease outbreaks and develop control strategies for regulating the entry of urban transportation system to reduce the epidemic size. </div><div></div><div>The second part of the dissertation develops a data-driven framework to investigate the disease spreading dynamics at individual level. In particular, the contact network generation algorithm is developed to reproduce individuals' contact pattern based on smart card transaction data of metro systems from three major cities in China. Disease dynamics are connected with contact network structures based on individual based mean field and origin-destination pair based mean field approaches. The results suggest that the vulnerability of contact networks solely depends on the risk exposure of the most dangerous individual, however, the overall degree distribution of the contact network determines the difficulties in controlling the disease from spreading. Moreover, the generation model is proposed to depict how individuals get into contact and their contact duration, based on their travel characteristics. The metro data are used to validate the correctness of the generation model, provide insights on monitoring the risk level of transportation systems, and evaluate possible control strategies to mitigate the impacts due to infectious diseases. </div><div></div><div>Finally, the third part of the dissertation focuses on the role played by information in urban travel, and develops a multiplex network model to investigate the co-evolution of disease dynamics and information dissemination. The model considers that individuals may obtain information on the state of diseases by observing the disease symptoms from the people they met during travel and from centralized information sources such as news agencies and social medias. As a consequence, the multiplex networks model is developed with one layer capturing information percolation and the other layer modeling the disease dynamics, and the dynamics on one layer depends on the dynamics of the other layer. The multiplex network model is found to have three stable states and their corresponding threshold values are analytically derived. In the end, numerical experiments are conducted to investigate the effectiveness of local and global information in reducing the size of disease outbreaks and the synchronization between disease and information dynamics is discussed. </div><div></div>

CAPES / Neste trabalho é apresentado o desenvolvimento e análise de arquiteturas de dissipadores de calor por redes de microcanais. As configurações em forma de redes são caracterizadas geometricamente por múltiplas ramificações no escoamento e variação nas escalas de comprimento e diâmetro hidráulico através de cada nível de ramificação. O momento tecnológico atual tem permitido a fabricação e a experimentação de redes de microcanais, todavia, verificou-se que as arquiteturas investigadas experimentalmente nos últimos anos têm parâmetros geométricos constantes através de seus níveis de ramificações, o que se denomina fractal. Neste trabalho utiliza-se a teoria constructal para projetar arquiteturas de redes com geometria variável e até três níveis de ramificação. Algumas hipóteses comumente empregadas no desenvolvimento de geometrias constructais em macroescala, como por exemplo, escoamento completamente desenvolvido e resistência térmica parede- fluido desprezível, são reconsideradas por se tratar de uma aplicação de microescala. Além disso, a geração de arquitetura é feita para um microchip de tamanho e razão de aspecto definidos. Como resultado, foi verificado que as redes constructais permitem uma redução significativa na queda de pressão em relação à redes fractais com mesmos níveis de ramificação. Foi demonstrado que a rede bifurcada com razão de diâmetros segundo a lei de Hess-Murray não é apropriada para dissipação de calor em dispositivos miniaturizados. Curvas de resistência térmica versus potência de bombeamento são mostradas para evidenciar a notória superioridade das redes constructais em relação às fractais. / The present work introduces microchannel nets architectures development and analysis for heat dissipation purposes. The net configurations are geometrically characterized by multiple flow ramifications and changes in length and hydraulic diameter scales through each ramification level. The current technological state has allowed manufacturing and experimentation of microchannel nets, however, it was found that architectures investigated experimentally in the past years have constant geometric parameters through their ramification levels, which is denominated fractal. In this study constructal theory is used to design net architectures with variable geometric parameters and up to three ramification levels. Some hypothesis commonly employed in macro scale analysis, for instance, fully developed flow and negligible wall-fluid thermal resistance, are reconsidered in order to comply with micro scale applications. Moreover, the architectures design is elaborated for a chip with fixed size and shape. As a result, It was verified that constructal nets allow a significant pressure drop decrease with respect to fractal nets with same ramification levels. It was demonstrated that the bifurcated net with diameter ratio according to Hess-Murray law is not appropriated for heat dissipation in miniaturized devices. Thermal resistance versus pumping power curves are shown in order to evidence the notorious superiority of constructal nets compared to fractal.

The aim of this study is to ascertain what misconceptions N2 students have about DC resistive circuits and how screencasts could effect on the rectification of these misconceptions. This study was conducted at the Kathu Campus of the Northern Cape Rural Further Education and Training College in the town Kathu in the arid Northern Cape. The empirical part of this study was conducted during the first six months of 2013. A design-based research (DBR) method consisting of four phases was used. DBR function is to design and develop interventions such as a procedure, new teachinglearning strategies, and in the case of this study a technology-enhanced learning (TEL) tool (screencast) with the purpose of solving a versatile didactic problem and to acquire information about the interventions of the TEL tool (screencast) on the learning of a student. In the first and second phase of DBR quantitative data for this research were gathered with the Determining and Interpreting Resistive Electric circuits Concepts Test (DIRECT) in order to determine the four most common misconceptions. The DIRECT test was conducted in the first trimester to find the misconceptions; the test was conducted in the second trimester also to confirm the misconceptions. Further quantitative data were collected from a demographic questionnaire. The qualitative data were collected by individual interviews in the fourth phase of the research project. Phase three of this study was the development of screencasts in the four most prominent misconceptions in DC resistive circuits of the students. The respondents of this study were non-randomly chosen and comprised of two groups, one in the first trimester of the year and one in the second trimester of the year, which enrolled for the N2 Electrical or Millwright courses. The respondents were predominant male and representing the three main cultural groups in the Northern Cape namely: Black, Coloured and White. The four misconceptions on DC resistive circuits that were identified were: (i) understanding of concepts, (ii) understanding of short circuit, (iii) battery as a constant current source, and (iv) rule application error. Screencasts clarifying the four misconceptions were developed and distributed to the respondents. On the foundation of the results of this research, it can be concluded that the students have several misconceptions around direct current resistive direct current circuits and that the use of TEL like screencasts can be used to solve some of these misconceptions. Screencasts could supplement education when they were incorporated into the tutoring and learning for supporting student understanding. The results of this research could lead to the further development and refinement of screencasts on DC resistive circuits and also useable guidelines in creating innovative screencasts on DC resistive circuits. / MEd (Curriculum Development), North-West University, Potchefstroom Campus, 2014

The aim of this study is to ascertain what misconceptions N2 students have about DC resistive circuits and how screencasts could effect on the rectification of these misconceptions. This study was conducted at the Kathu Campus of the Northern Cape Rural Further Education and Training College in the town Kathu in the arid Northern Cape. The empirical part of this study was conducted during the first six months of 2013. A design-based research (DBR) method consisting of four phases was used. DBR function is to design and develop interventions such as a procedure, new teachinglearning strategies, and in the case of this study a technology-enhanced learning (TEL) tool (screencast) with the purpose of solving a versatile didactic problem and to acquire information about the interventions of the TEL tool (screencast) on the learning of a student. In the first and second phase of DBR quantitative data for this research were gathered with the Determining and Interpreting Resistive Electric circuits Concepts Test (DIRECT) in order to determine the four most common misconceptions. The DIRECT test was conducted in the first trimester to find the misconceptions; the test was conducted in the second trimester also to confirm the misconceptions. Further quantitative data were collected from a demographic questionnaire. The qualitative data were collected by individual interviews in the fourth phase of the research project. Phase three of this study was the development of screencasts in the four most prominent misconceptions in DC resistive circuits of the students. The respondents of this study were non-randomly chosen and comprised of two groups, one in the first trimester of the year and one in the second trimester of the year, which enrolled for the N2 Electrical or Millwright courses. The respondents were predominant male and representing the three main cultural groups in the Northern Cape namely: Black, Coloured and White. The four misconceptions on DC resistive circuits that were identified were: (i) understanding of concepts, (ii) understanding of short circuit, (iii) battery as a constant current source, and (iv) rule application error. Screencasts clarifying the four misconceptions were developed and distributed to the respondents. On the foundation of the results of this research, it can be concluded that the students have several misconceptions around direct current resistive direct current circuits and that the use of TEL like screencasts can be used to solve some of these misconceptions. Screencasts could supplement education when they were incorporated into the tutoring and learning for supporting student understanding. The results of this research could lead to the further development and refinement of screencasts on DC resistive circuits and also useable guidelines in creating innovative screencasts on DC resistive circuits. / MEd (Curriculum Development), North-West University, Potchefstroom Campus, 2014

<div><div><div><p>This project aims to develop a cloud-based platform that integrates sensors with business intelligence for real-time energy management at the plant level. It provides facility managers, an energy management platform that allows them to monitor equipment and plant-level energy consumption remotely, receive a warning, identify energy loss due to malfunction, present options with quantifiable effects for decision-making, and take actions, and assess the outcomes. The objectives consist of:</p><ol><li><p>Developing a generic platform for the monitoring energy consumption of industrial equipment using sensors</p></li><li><p>Control the connected equipment using an actuator</p></li><li><p>Integrating hardware, cloud, and application algorithms into the platform</p></li><li><p>Validating the system using an Energy Consumption Forecast scenario</p></li></ol><p>A Demo station was created for testing the system. The demo station consists of equipment such as air compressor, motor and light bulb. The current usage of these equipment is measured using current sensors. Apart from current sensors, temperature sensor, pres- sure sensor and CO2 sensor were also used. Current consumption of these equipment was measured over a couple of days. The control system was tested randomly by turning on equipment at random times. Turning on the equipment resulted in current consumption which ensured that the system is running. Thus, the system worked as expected and user could monitor and control the connected equipment remotely.</p></div></div></div>

<div>In this thesis work, a novel approach for the design of a fractional order proportional integral</div><div>derivative (FOPID) controller is proposed. This design introduces a new time-varying FOPID controller</div><div>to mitigate a voltage spike at the controller output whenever a sudden change to the setpoint occurs. The</div><div>voltage spike exists at the output of the proportional integral derivative (PID) and FOPID controllers when a</div><div>derivative control element is involved. Such a voltage spike may cause a serious damage to the plant if it is</div><div>left uncontrolled. The proposed new FOPID controller applies a time function to force the derivative gain to</div><div>take effect gradually, leading to a time-varying derivative FOPID (TVD-FOPID) controller, which maintains</div><div>a fast system response and signi?cantly reduces the voltage spike at the controller output. The time-varying</div><div>FOPID controller is optimally designed using the particle swarm optimization (PSO) or genetic algorithm</div><div>(GA) to ?nd the optimum constants and time-varying parameters. The improved control performance is</div><div>validated through controlling the closed-loop DC motor speed via comparisons between the TVD-FOPID</div><div>controller, traditional FOPID controller, and time-varying FOPID (TV-FOPID) controller which is created</div><div>for comparison with all three PID gain constants replaced by the optimized time functions. The simulation</div><div>results demonstrate that the proposed TVD-FOPID controller not only can achieve 80% reduction of voltage</div><div>spike at the controller output but also is also able to keep approximately the same characteristics of the system</div><div>response in comparison with the regular FOPID controller. The TVD-FOPID controller using a saturation</div><div>block between the controller output and the plant still performs best according to system overshoot, rise time,</div><div>and settling time.</div>

<p>  </p> <p>Cold chain logistics comprise a large portion of transported pharmaceutical medications and raw materials which must be preserved at specified temperatures to maintain consumer safety and efficacy. An immutable record of temperatures of transported pharmaceutical goods allows for mitigation of temperature-related issues of such drugs and their raw components. The recording of this information on a blockchain creates such an immutable record of this information which can be readily accessed by any relevant party. This can allow for any components which have not been kept at the appropriate temperatures to be removed from production. These data can also be used as inputs for smart contracts or for data analytic purposes. </p> <p>A theoretical framework for such a system, referred to as “TempEnsure” is described, which provides digital capture of the internal temperature of temperature-controlled shipping containers. The data are recorded in a blockchain system. Real world testing of this system was not possible due to monetary constraints, but the functional elements of the system, as well as potential improvements for the system, are discussed.</p>