This thesis proposes a merging mechanism for multiple video surveillances in TCP networks. Merging video streams not only can benefit network administration but also reduce the waste of bandwidth. In this thesis, we design a Video-Merging Gateway (VMG) between cameras and control center to merge two video streams transmitted from cameras and received by control center. In the merging mechanism, we develop two modes: Interleave and Overlay. Interleave mode includes two operation types: Single Frame and Proportional. The former merges video streams by interleaving frames one by one from two cameras, and the latter merges video streams according to an FPS (frame per second) ratio between two cameras. Overlay mode vertically displays two video streams in separate frames on the web browser. We implement VMG on a Linux platform. In the interleave mode, we recalculate both the sequence number and the Ack number of a video packet, and create Ack packet for dropped frames while merging two TCP video streams. In the overlay mode, we modify the decoding messages in the frames and separate data between two video streams to avoid decoding errors. Finally, we analyze the complexity of merging algorithms. By carefully determining the timing for responding the created Ack based on Retransmission Time Out (RTO), packet retransmition can be avoided. In addition, we found out that the number of instructions to execute the algorithm is increased by multiple integers along with the picture sizes under interleave mode. As for overlay mode, the number of instructions is increased linearly along with the payload length and the total amount of data and Ack packets.

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MP3 compression format is essential categorized one of the MPEG (Moving Picture Experts Group) standards for digital audio compression nowadays. For its superiority and convenient,MP3 has been widely used in multimedia player and storage application. In this thesis, we use software/hardware co-design methodology to design the MP3 player system. In addition, system level scheduling is adopted to arrange the execute time of SW and HW and significantly reduce the hardware cost under the construct of real-time processing. We can obtain fewer extra hardware cost while attaining the goal of real- time playing system. In order to perform software/hardware partitioning, simulate and analyze the MP3 application program to find out the critical parts with high time complexity and regular computation. These parts with high time complexity, e.g. IMDCT and Poly Phase synthesis filter bank, then are implemented by hardware to achieve better system performance. We use high level synthesis concept to optimize the hardware part and integrate software and hardware¡Asuch that communication between software and hardware can be performed smoothly. Finally, MP3 player system is using verified by hardware¡Bsoftware co- verified methodology on an SoC development platform. In order to build a complete verification environment, we attach extra input and output interfaces to the SoC development platform, e.g. the network card and sound card. Write some driver to drive related peripheral device. Since OS is conducive to the operations between software and hardware, Linux OS is ported to the SoC platform to manage software and hardware resources and drive the peripheral devices.

In this work, a modified boost converter design has been implemented in a multiphase configuration with a condensed topology. The modified aspect of the design has already been proven to drastically reduce input current ripple by about 40% in a single-phase implementation. By placing two modified boost converters in parallel with interleaving main switches (multiphase), the input inductors and modified capacitors of the modified topology can be reduced to just one of each, lowering the number of components, size, and cost. Additionally, multiphase DC/DC converters lower input/output voltage and current ripples while delivering more power compared to single-phase converters. By combining the modified and multiphase benefits, this thesis creates a topology with low ripple and noise while providing high power capability. This thesis covers the analysis, simulation, hardware implementation, and testing of the Modified-Multiphase Boost Converter as well as an equivalent Standard-Multiphase Boost Converter for comparison. Simulation and hardware test results exhibited a 9% input current ripple reduction with the Modified-Multiphase design, presenting a high-power converter with considerable input noise reduction. Keywords: dc/dc, boost, multiphase, interleave, modified, power, ripple

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[pt] O principal objetivo deste trabalho é apresentar um novo método para visualização de variedades implícitas de dimensão 3 mergulhadas no R4. Esse método consiste primeiramente de um pré-processamento em CPU utilizando uma árvore 16-Tree e a Aritmética Intervalar para encontrar as regiões do domínio onde a variedade se encontra. Esses dados são posteriormente processados em GPU para efetuar a visualização, e para isso foi utilizada uma generalização da técnica Ray Casting. / [en] The main objective of this work is to present a new method for the visualization of implicit 3-manifolds in R4. This method consists primarily of a preprocessing in the CPU using a 16-tree and Interval Arithmetic to detect regions of the domain where the variety is present. These data are then processed in the GPU to perform the visualization, and for this a generalization of Ray Casting technique was adopted.

Recently, a novel technique for multi-user spread-spectrum mobile systems, the called interleave-division multiple-access (IDMA) scheme, was proposed by L. Ping etc. The advantage of IDMA is that it inherits many special features from code-division multiple-access (CDMA) such as diversity against fading and mitigation of the other-cell user interference. Moreover, it¡¦s capable of employing a very simple chip-by-chip iterative multi-user detection strategy. In this thesis, we investigate the performance of combining IDMA and orthogonal frequency-division multiplexing (OFDM) scheme. In order to improve the bit error rate performance, we applied low-density parity-check (LDPC) coding to the proposed scheme, named by LDPC Coded OFDM-IDMA Systems. Based on the aid of iterative multi-user detection algorithm, the multiple-access interference (MAI) and inter-symbol interference (ISI) could be canceling efficiently. In short, the proposed scheme provides an efficient solution to high-rate multiuser communications over multipath fading channels.