p. 1-102 / Submitted by Santiago Fabio (fabio.ssantiago@hotmail.com) on 2013-04-11T17:20:22Z No. of bitstreams: 1 Diss adriana.pdf: 796059 bytes, checksum: a96dcc9bb1e83552fa1cc9a84c444f01 (MD5) / Approved for entry into archive by Maria Creuza Silva(mariakreuza@yahoo.com.br) on 2013-04-11T19:20:30Z (GMT) No. of bitstreams: 1 Diss adriana.pdf: 796059 bytes, checksum: a96dcc9bb1e83552fa1cc9a84c444f01 (MD5) / Made available in DSpace on 2013-04-11T19:20:30Z (GMT). No. of bitstreams: 1 Diss adriana.pdf: 796059 bytes, checksum: a96dcc9bb1e83552fa1cc9a84c444f01 (MD5) Previous issue date: 2008 / Com o objetivo de analisar o processo de utilização dos instrumentos orçamentários (Plano Plurianual, Lei de Diretrizes Orçamentárias e Lei de Orçamento Anual) no planejamento e na programação das ações de uma Secretaria Municipal de Saúde, realizou-se um estudo de caso de abordagem qualitativa. O desenvolvimento da pesquisa contemplou, inicialmente, a coleta de dados por meio de entrevistas semiestruturadas e, a partir de então, a classificação dos dados de acordo com o plano de análise. As ferramentas de análise permitiram classificar os discursos dos gestores do nível central da Secretaria Municipal de Saúde, de acordo com as categorias e variáveis preestabelecidas, e traçar um paralelo entre os momentos estabelecidos na metodologia de Planejamento e Programação Locais de Saúde – PPLS e o uso dos instrumentos orçamentários, para que desta forma, fosse estabelecido o grau de utilização destes instrumentos. Verificou-se que o uso de tais instrumentos para o planejamento e a programação das ações de saúde no município é parcial e que as principais dificuldades de utilização foram decorrentes do próprio processo de orçamentação e de planejamento estabelecido. De igual forma, concluiu-se que as dificuldades também são resultantes do distanciamento entre os setores administrativo e financeiro e os demais setores da secretaria. Entretanto, foram identificados na pesquisa fatores que facilitaram o uso das ferramentas orçamentárias como, por exemplo, a participação na construção do Plano Plurianual e da Lei de Diretrizes Orçamentárias. Mudanças nos métodos de planejamento e no próprio processo orçamentário do município, incluindo fóruns para participação e capacitação dos gestores, foram indicadas como principais estratégias para aumentar o grau de utilização dos instrumentos orçamentários, o que certamente colaborará para transformar a situação identificada e, em tese, contribuir para a melhoria no desempenho da SMS. / Salvador

abstract: The increased adoption of Internet-of-Things (IoT) for various applications like smart home, industrial automation, connected vehicles, medical instrumentation, etc. has resulted in a large scale distributed network of sensors, accompanied by their power supply regulator modules, control and data transfer circuitry. Depending on the application, the sensor location can be virtually anywhere and therefore they are typically powered by a localized battery. To ensure long battery-life without replacement, the power consumption of the sensor nodes, the supply regulator and, control and data transmission unit, needs to be very low. Reduction in power consumption in the sensor, control and data transmission is typically done by duty-cycled operation such that they are on periodically only for short bursts of time or turn on only based on a trigger event and are otherwise powered down. These approaches reduce their power consumption significantly and therefore the overall system power is dominated by the consumption in the always-on supply regulator. Besides having low power consumption, supply regulators for such IoT systems also need to have fast transient response to load current changes during a duty-cycled operation. Supply regulation using low quiescent current low dropout (LDO) regulators helps in extending the battery life of such power aware always-on applications with very long standby time. To serve as a supply regulator for such applications, a 1.24 µA quiescent current NMOS low dropout (LDO) is presented in this dissertation. This LDO uses a hybrid bias current generator (HBCG) to boost its bias current and improve the transient response. A scalable bias-current error amplifier with an on-demand buffer drives the NMOS pass device. The error amplifier is powered with an integrated dynamic frequency charge pump to ensure low dropout voltage. A low-power relaxation oscillator (LPRO) generates the charge pump clocks. Switched-capacitor pole tracking (SCPT) compensation scheme is proposed to ensure stability up to maximum load current of 150 mA for a low-ESR output capacitor range of 1 - 47µF. Designed in a 0.25 µm CMOS process, the LDO has an output voltage range of 1V – 3V, a dropout voltage of 240 mV, and a core area of 0.11 mm2. / Dissertation/Thesis / Doctoral Dissertation Electrical Engineering 2018

Un facteur clé des systèmes portables, tels que les téléphones mobiles, est l'autonomie de la batterie qui dépend essentiellement de la source d'énergie, mais aussi de la façon dont sont gérés la tension et le courant qu'elle délivre, facteurs relatifs au régulateur et à son rendement. Les autres critères sont bien sûr la compacité et le coût, d'où la nécessité d'intégrer ces régulateurs de tension. Le premier chapitre présente brièvement trois types de régulateurs, ainsi que les contraintes imposées par les composants externes et la technologie de fabrication. Après avoir expliqué l'utilité de passer à une réalisation en technologie CMOS, le deuxième chapitre décrit le schéma final d'un régulateur linéaire (LDO, Low Drop-out), puis détaille sa stabilité et sa protection contre les courts-circuits. Pour cela, nous expliquons dans les deux cas la méthode habituellement utilisée, nous montrons ses limites dans le cadre de notre application, puis nous développons la solution adoptée qui consiste en une compensation Miller s'adaptant au courant de sortie pour sa stabilité et en un asservissement du courant de sortie plus performant pour limiter le courant de court-circuit. Des mesures sur silicium ont permis de valider les simulations effectuées lors de cette conception. Les alimentations à découpage sont une alternative à ces régulateurs linéaires, et procurent la possibilité d'élever la tension de batterie, mais nécessitent des éléments inductifs difficilement intégrables. Une étude de comportement statique permet de déterminer les pertes et le rendement de la structure choisie pour répondre à notre cahier des charges. L'analyse de sa stabilité par sa fonction de transfert complète ce chapitre. Les systèmes à pompe de charges sont abordés de façon succincte. Egalement basés sur le principe du découpage, ils sont un compromis entre les deux précédents principes et permettent, moyennant des pertes supplémentaires, d'éviter l'utilisation des composants inductifs.

Quelles sont les particules élémentaires et comment l'univers proviennent sont les principales forces motrices de la physique des hautes énergies. Afin de démontrer le modèle standard et découvrez la nouvelle physique, plusieurs détecteurs sont construits pour les expériences en physique des hautes énergies. Capteurs à pixels CMOS offrent un compromis attirant entre la vitesse de lecture, le budget matériel, la tolérance au rayonnement, la consommation d'énergie et la granularité, par rapport aux capteurs à pixels hybrides et des dispositifs à transfert de charge. Ainsi, les CPS sont un bon choix pour détecter les particules chargées dans les détecteurs de vertex et des télescopes de faisceau. La distribution de puissance devient un enjeu important dans les détecteurs à venir, puisque une quantité considérable de capteurs seront installés. Malheureusement, le «Independent Powering» échoue, comme l'approche traditionnelle. Afin de résoudre les problèmes de distribution de puissance et de fournir des tensions silencieuses, cette thèse se concentre sur la conception de la gestion de l'alimentation à faible bruit, à basse consommation d'énergie, de petite taille et sur-puce pleinement pour les CPS. Les CPS sont d'abord introduits en tirer les exigences de conception de la gestion de l'alimentation. La distribution de puissance dédiées à les CPS est ensuite proposé, dans laquelle la gestion de l'alimentation est utilisée comme seconde étape de conversion de puissance. Deux régulateurs sur-puce pleinement sont proposés pour générer la tension d'alimentation analogique et de la tension d'alimentation de référence requis par l'opération d'échantillonnage double corrélé, respectivement. Deux prototypes ont vérifié ces régulateurs. Ils peuvent répondre aux exigences des CPS. En outre, les techniques de gestion de l'alimentation et de la conception tolérance au rayonnement sont également présentés dans cette thèse. / What are the elementary particles and how did the universe originate are the main driving forces in the high energy physics. In order to further demonstrate the standard model and discover new physics, several detectors are built for the high energy physics experiments. CMOS pixel sensors (CPS) can achieve an attractive tradeoff among many performance parameters, such as readout speed, granularity, material budget, power dissipation, radiation tolerance and integrating readout circuitry on the same substrate, compared with the hybrid pixel sensors and charge coupled devices. Thus, the CPS is a good candidate for tracking the charged particles in vertex detectors and beam telescopes.The power distribution becomes an important issue in the future detectors, since a considerable amount of sensors will be installed. Unfortunately, the independent powering has been proved to fail. In order to solve the power distribution challenges and to provide noiseless voltages, this thesis focuses on the design of a low noise, limited area, low power consumption and full on-chip power management in CPS chips. The CPS are firstly introduced drawing the design requirements of the power management. The power distribution dedicated to CPS chips is then proposed, in which the power management is utilized as the second power conversion stage. Two full on-chip regulators are proposed to generate the analog power supply voltage and the reference voltage required by correlated double sampling operation, respectively. Two prototypes have verified these regulators. They can meet the requirements of CPS. Moreover, the power management techniques and the radiation tolerance design are also presented in this thesis.

This master’s thesis deals with the design of six channel SD, HD and 3G HD-SDI digital video signal converter to 10-Gigabit Ethernet. In the introductory part, the conception of designed device is formulated. The theoretical background is provided in four chapters, where main standards and design rules related to digital electronics’ design are analyzed. The emphasis is placed on signal integrity at high-speed interconnects. There mostly practical examples, calculations and simulations are utilized. The design part contains thorough description of main subsystems’ design, implementation of FPGA, SDI input channels and 10-Gigabit Ethernet PHY. In the final part, the first tests and measurements of the build prototype are summarized. As an example, the comparison of signal integrity simulation to measurement is provided.

Wireless communication technologies continue to evolve to meet the demand for increased data throughput. To achieve higher data throughput one approach is to increase the bandwidth. One problem related to very large bandwidths is the implementation of digital-to-analog converters with sampling rates roughly in the 5 to 20 GHz range. Traditionally, current-steering data converters have been the go-to choice but their linearity suffers at higher frequencies. An alternative to the current-steering digital-to-analog converter is the voltage-mode digital-to-analog converter, which is an attractive option for integration into digital intensive application-specific integrated circuits due to its digital-in-nature architecture. In this thesis, a resistive voltage-mode digital-to-analog converter with an integrated low-dropout voltage regulator is proposed for a sampling rate of 16 GSps. The proposed resistive voltage-mode digital-to-analog converter with an output impedance matched to a 100 Ω load, achieves a spurious-free dynamic range of 64 dBc and intermodulation distortion of 66 dBc for output frequencies up to 5.5 GHz in the worst process corner.

What are the elementary particles and how did the universe originate are the main driving forces in the high energy physics. In order to further demonstrate the standard model and discover new physics, several detectors are built for the high energy physics experiments. CMOS pixel sensors (CPS) can achieve an attractive tradeoff among many performance parameters, such as readout speed, granularity, material budget, power dissipation, radiation tolerance and integrating readout circuitry on the same substrate, compared with the hybrid pixel sensors and charge coupled devices. Thus, the CPS is a good candidate for tracking the charged particles in vertex detectors and beam telescopes.The power distribution becomes an important issue in the future detectors, since a considerable amount of sensors will be installed. Unfortunately, the independent powering has been proved to fail. In order to solve the power distribution challenges and to provide noiseless voltages, this thesis focuses on the design of a low noise, limited area, low power consumption and full on-chip power management in CPS chips. The CPS are firstly introduced drawing the design requirements of the power management. The power distribution dedicated to CPS chips is then proposed, in which the power management is utilized as the second power conversion stage. Two full on-chip regulators are proposed to generate the analog power supply voltage and the reference voltage required by correlated double sampling operation, respectively. Two prototypes have verified these regulators. They can meet the requirements of CPS. Moreover, the power management techniques and the radiation tolerance design are also presented in this thesis.

This master’s thesis deals with communication system design via the NFC and Wi-Fi interface. The thesis has two basic goals. The first goal is to create a device that is capable of storing of data and its subsequent transfer via the NFC interface. The second aim is to utilize this device for measuring various physical variables. The IoT technology is employed to fulfill the aforementioned goal. IoT technology is capable of visualizing data in real time and make them accessible via the Internet. The result of this work is an universal device, that contains the most popular communication interfaces, such as I2C, SPI and that is capable of processing measurement data from digital, analogue, and wireless sensors.