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A class of non-binary LDPC codesGilra, Deepak 30 September 2004 (has links)
In this thesis we study Low Density Parity Check (LDPC) and LDPC like codes over
non-binary fields. We extend the concepts used for non-binary LDPC codes to generalize
Product Accumulate (PA) codes to non-binary fields. We present simulation results that
show that PA codes over GF(4) performs considerably better than binary PA codes at
smaller block lengths and slightly better at large block lengths. We also propose a trellis
based decoding algorithm to decode PA codes and show that its complexity is
considerably lower than the message-passing algorithm.
In the second part of the thesis we study the convergence properties of non-binary PA
codes and non-binary LDPC codes. We use EXIT-charts to study the convergence
properties of non-binary LDPC codes with different mean column weights and show why
certain irregularities are better. Although the convergence threshold predicted by EXIT-charts
on non-binary LDPC codes is quite optimistic we can still use EXIT-charts for
comparison between non-binary LDPC codes with different mean column weights.
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Controlling the Error Floors of the Low-Density Parity-Check CodesZhang, Shuai Unknown Date
No description available.
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Design of structured nonbinary quasi-cyclic low-density parity-check codesLiu, Yue, Electrical Engineering & Telecommunications, Faculty of Engineering, UNSW January 2009 (has links)
Since the rediscovery, LDPC codes attract a large amount of research efforts. In 1998, nonbinary LDPC codes were firstly investigated and the results shown that they are better than their binary counterparts in performance. Recently, there is always a requirement from the industry to design applied nonbinary LDPC codes. In this dissertation, we firstly propose a novel class of quasi-cyclic (QC) LDPC codes. This class of QC-LDPC codes embraces both linear encoding complexity and excellent compatibility in various degree distributions and nonbinary expansions. We show by simulation results that our proposed QC-LDPC codes perform as well as their comparable counterparts. However, this proposed code structure is more flexible in designing. This feature may show its power when we change the code length and rate adaptively. Further more, we present two algorithms to generate codes with short girth and better girth distribution. The two algorithms are designed based on progressive edge growth (PEG) algorithm and they are specifically designed for quasi-cyclic structure. The simulation results show the improvement they achieved. In this thesis, we also investigate the believe propagation based iterative algorithms for decoding of nonbinary LDPC codes. The algorithms include sum-product (SP) algorithm, SP algorithm using fast Fourier transform, min-sum (MS) algorithm and complexity reduced extended min-sum (EMS) algorithm. In particular, we present the proposed modified min-sum algorithm with threshold filtering which further reduces the computation complexity.
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Υλοποίηση αποκωδικοποιητή LDPC με τεχνική αποκωδικοποίησης SISOΚάια, Χρυσούλα 09 January 2012 (has links)
Σε αυτή τη διπλωματική εργασία υλοποιήθηκε ένας LDPC αποκωδικοποιητής που χρησιμοποιεί τις βασικές αρχές της turbo αποκωδικοποίησης, εισάγοντας στα χαρακτηριστικά της αποκωδικοποίησης του το διάγραμμα trellis. O maximum a posteriori probability (MAP) αλγόριθμος χρησιμοποιείται σαν μια γέφυρα μεταξύ των LDPC και Turbo κωδικών. Οι LDPC κώδικες αντιμετωπίζονται ως μια αλυσιδωτή σύνδεση n υπέρ κωδικών, όπου ο κάθε υπέρ κώδικας έχει πλέον μια πιο απλή δομή trellis ώστε ο MAP αλγόριθμος να μπορεί να εφαρμοστεί. / In this thesis an LDPC decoder is implemented using the principles of turbo decoding, introducing the characteristics of the decoding of the trellis diagram . The maximum a posteriori probability (MAP) algorithm is used as a bridge between the LDPC and Turbo codes. The LDPC codes are treated as concatenated n supercodes, where each code has a simple trellis structure so that the MAP algorithm can be implemented.
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Studies on graph-based coding systemsSun, Jing 30 September 2004 (has links)
No description available.
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LDPC-OFDM: Channel Estimation and Power considerationsAlnabulsi, BASEL 29 April 2013 (has links)
Small cells are low-powered radio access nodes that operate in licensed and unlicensed spectrum that have a range of 10 meters to 200 meters, compared to a mobile macrocell which might have a range of a few kilometres. This dissertation proposes algorithms for the enhancement of small cells installed in high speed rails. The thesis addresses two main points: the link between the small cell and the base station, and the link between the end-users and the small cell. The channel between the small cell and the base station is a fast fading channel due to the mobility of the high speed rail. The first part of the thesis proposes methods to enhance the link between the small cell and the base station using Low-Density Parity-Check codes (LDPC) for fast fading channels. The proposed uses nonuniform reconstruction methods based on the soft output log-likelihood ratio (LLR) provided by the LDPC decoder. The LLRs provide information about the location of the symbols with high probability of being correct. The grid formed under the assumption
of a correlated Rayleigh channel affecting the transmitted data is highly nonuniform. Reconstruction of the channel under such assumptions is highly unstable. A signal-to-noise- ratio dependent regularization method is implemented to enhance the performance under imperfect Doppler spread estimation. The second part of the thesis proposes algorithms for the link between the end-user and the small cell. Since power efficiency is a major factor for end-users employing battery powered devices, we propose a Linear Programming (LP) algorithm for signal shaping to minimize the average transmitted power. The other problem the thesis addresses is the minimization of Peak-to-Average Power-Ratio (PAPR) of Orthogonal Frequency Division Multiplexing (OFDM) signals. The PAPR is minimized using a set of phase shifts for the constituting subcarriers of the OFDM signal. The set of phase shifts is determined using a LP approach that minimizes the complexity when the block length is high. A real-time implementation of some of the algorithms is carried out using the TMS320C6713 Texas Instruments board. The results for fixed-point versus floating-point implementation is shown for a different number of precision bits. / Thesis (Ph.D, Electrical & Computer Engineering) -- Queen's University, 2013-04-27 16:54:32.464
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Incremental Redundancy Low-Density Parity-Check Codes for Hybrid FEC/ARQ SchemesHur, Woonhaing 23 January 2007 (has links)
The objective of this dissertation is to investigate incremental redundancy low-density parity-check (IR-LDPC) codes for hybrid forward error correction / automatic repeat request (HybridARQ) schemes. Powerful capacity-approaching IR-LDPC codes are one of the key functional elements in high-throughput HybridARQ schemes and provide a flexible rate-compatible structure, which is necessary for low-complexity HybridARQ schemes.
This dissertation first studies the design and performance evaluation of IR-LDPC codes, which have good error rate performance at short block lengths. The subset codes of the IR-LDPC codes are compared to conventional random punctured codes and multiple dedicated codes. As a system model for this work, an adaptive LDPC coded system is presented. This adaptive system can confront the nature of time-varying channels and approach the capacity of the system with the aid of LDPC codes. This system shows remarkable throughput improvement over a conventional punctured system and, for systems that use multiple dedicated codes, provides comparable performance with low-complexity at every target error rate.
This dissertation also focuses on IR-LDPC codes with a wider operating code range because the previous IR-LDPC codes exhibited performance limitation related to the maximum achievable code rate. For this reason, this research proposes a new way to increase the maximum code rate of the IR-LDPC codes, which provides throughput improvement at high throughput regions over conventional random punctured codes. Also presented is an adaptive code selection algorithm using threshold parameters. This algorithm reduces the number of the unnecessary traffic channels in HybridARQ schemes.
This dissertation also examines how to improve throughput performance in HybridARQ schemes with low-complexity by exploiting irregular repeat accumulate (IRA) codes. The proposed adaptive transmission method with adaptive puncturing patterns of IRA codes shows higher throughput performance in all of operating code ranges than does any other single mode in HybridARQ schemes.
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Circuit Design of LDPC Decoder for IEEE 802.16e StandardChen, Cheng-Ho 30 August 2010 (has links)
In this thesis, a multi-rate LDPC (Low-Density Parity-Check code) decoder circuit is proposed for IEEE 802.16e standard. In the proposed circuit, we modify the overlapping structure for different code rate of the LDPC decoder to enhance the hardware utilization ratio and provide flexible parametric design. LDPC decoding is completed by the recursive operations between variable nodes and check nodes. We use Beneš network to implement the wire-routing of the operations between variable nodes and check nodes. However, the decoders with different code rates may result in different Beneš networks and increase the hardware complexity. We propose a modified overlapping structure to reduce the complexity of parallelized Beneš network and to increase the hardware utilization ratio.
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Code design for erasure channels with limited or noisy feedbackNagasubramanian, Karthik 15 May 2009 (has links)
The availability of feedback in communication channels can significantly increase the
reliability of transmission while decreasing the encoding and decoding complexity.
Most of the applications like cellular telephony, satellite communications and internet
involve two-way transmission. Hence, it is important to devise coding schemes which
utilize the advantages of feedback. Most of the results in code designs, which make
use of feedback, concentrate on noiseless and instantaneous feedback. But in real-time
systems, the feedback is usually noisy, and is available at the transmitter after some
delay. Hence, it is important that we characterize the gains obtained in this case over
that of one-way channels.
We consider binary erasure channels to keep the problem tractable. For the erasure channels with noisy feedback, we have designed and analyzed a concatenated
coding scheme, which achieves lower probability of error than any forward error correcting code of the same rate. Hence, it is shown that even noisy feedback can be
useful in increasing the reliability of the channel.
We have designed and analyzed a coding scheme using Low Density Parity Check
(LDPC) codes along with selective retransmission strategy, which utilizes the limited
(but noiseless), delayed feedback to achieve low frame error rates even with small
blocklengths, at rates close to capacity. Furthermore, our scheme provides a way
to trade off feedback bandwidth for reliability. The complexity of this scheme is
lower than that of a forward error correcting code (FEC) of same blocklength and comparable performance.
We have shown that our scheme performs better than the Automatic Repeat
Request (ARQ) protocol which makes use of 1 bit feedback to signal retransmissions.
For fair comparisons, we have also incorporated the rate loss due to the bits which
are fed back in addition to the retransmitted bits. Thus, we have shown that for
two-way communications with complexity and delay constraints, it is better to utilize
the availability of feedback than to use just FEC.
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Design techniques for graph-based error-correcting codes and their applicationsLan, Ching Fu 12 April 2006 (has links)
In ShannonÂs seminal paper, ÂA Mathematical Theory of CommunicationÂ, he defined ÂChannel Capacity which predicted the ultimate performance that transmission systems can achieve and suggested that capacity is achievable by error-correcting (channel) coding. The main idea of error-correcting codes is to add redundancy to the information to be transmitted so that the receiver can explore the correlation between transmitted information and redundancy and correct or detect errors caused by channels afterward. The discovery of turbo codes and rediscovery of Low Density Parity Check codes (LDPC) have revived the research in channel coding with novel ideas and techniques on code concatenation, iterative decoding, graph-based construction and design based on density evolution. This dissertation focuses on the design aspect of graph-based channel codes such as LDPC and Irregular Repeat Accumulate (IRA) codes via density evolution, and use the technique (density evolution) to design IRA codes for scalable image/video communication and LDPC codes for distributed source coding, which can be considered as a channel coding problem.
The first part of the dissertation includes design and analysis of rate-compatible IRA codes for scalable image transmission systems. This part presents the analysis with density evolution the effect of puncturing applied to IRA codes and the asymptotic analysis of the performance of the systems.
In the second part of the dissertation, we consider designing source-optimized IRA codes. The idea is to take advantage of the capability of Unequal Error Protection (UEP) of IRA codes against errors because of their irregularities. In video and image transmission systems, the performance is measured by Peak Signal to Noise Ratio (PSNR). We propose an approach to design IRA codes optimized for such a criterion.
In the third part of the dissertation, we investigate Slepian-Wolf coding problem using LDPC codes. The problems to be addressed include coding problem involving multiple sources and non-binary sources, and coding using multi-level codes and nonbinary codes.
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