The Internet plays an important role in modern society, and its network performance impacts billions of users every day. For many network applications, network latency has a large impact on the quality of experience for the end user. Due to a lack of extensive network latency monitoring, the observability of network latency in real networks is often limited. This poses a problem for understanding network latency on the Internet today, and for assessing the impact various solutions that aim to reduce network latency have once they are deployed in the wild. This thesis addresses shortcomings with current solutions for monitoring network latency, in particular the performance of passive monitoring solutions on general-purpose commodity hardware, aiming to enable more ubiquitous latency monitoring and ultimately provide a comprehensive view of real-world network latency. We utilize the recently emerging eBPF technology to implement passive network latency monitoring inside the Linux kernel. Through experiments on a testbed, we show that our solution can monitor packets at over an order of magnitude higher rates than comparable previous solutions, allowing it to successfully monitor the latency for multi-gigabit traffic on general-purpose commodity hardware. Additionally, we demonstrate the feasibility of continuously monitoring network latency by deploying our solution inside an Internet Service Provider and monitoring the network latency for all customer traffic. Through an extensive analysis of the collected latency data, we show large differences in how network latency is distributed across different parts of the network. / The Internet plays a vital role in modern society, and its performance affects billions of users daily. Network latency often has a significant impact on the end users' experience. However, due to limited monitoring of network latency, the observability of latency in real networks is often poor. This hinders our understanding of latency on the Internet today and makes it challenging to assess how the deployment of new networking technologies impacts latency. This thesis uses the emerging eBPF technology to improve the performance of passive network latency monitoring, aiming to enable latency monitoring on more network devices to create a more comprehensive view of latency on the Internet. By conducting controlled experiments on a testbed, we find that our solution is over an order of magnitude faster than previous solutions, making it possible to monitor multi-gigabit traffic on general-purpose commodity hardware. Furthermore, we demonstrate the feasibility of continuously monitoring latency by deploying our solution inside the network of an Internet Service Provider to monitor all their traffic. Our analysis of the latency data reveals large differences in how latency is distributed across different parts of the network.

Dans des systèmes numériques essentiellement latents, compenser la latence n’est pastrivial, en particulier lorsque les graphes de routage du signal sont complexes commec’est souvent le cas dans une station audionumérique (DAW).Tandis que le problème général est de nature mathématique, des complicationsapparaissent dans la conception de systèmes audio en temps réel à cause des contraintesdu matériel, de l’architecture du système, ou de l’ingénierie.Pour construire un système fournissant une compensation de latence sur l’intégralitédu graphe avec possibilité de connecter n’importe quelle source à n’importe quelledestination, uniquement décrire les mécanismes est insuffisant. Le système completdoit être conçu d’un bloc à l’aide de prototypes pour prendre en compte les limitationsdu monde réel.Cette recherche a été menée en utilisant Ardour, une station audionumériquelibrement disponible sous licence libre GPL. Cette thèse est autant un rapport deconception qu’une documentation de recherche.Une analyse complète des éléments de base et de leurs interactions est présentée.La plupart ont été implémentés au delà de la démonstration de faisabilité, dans lebut de combler l’écart entre les systèmes professionnels de production audio et ladocumentation librement accessible pour la recherche et le développement.Même si elle s’attache ostensiblement à Ardour, cette thèse décrit les conceptgénériques des station audio tels que les Ports, les pistes (Tracks), les bus (Busses)et les processeurs de traitement numériques du signal (Processors) ainsi que lesinteractions opérationnelles entre eux.Les concepts de base communs à toutes les entrées/sorties numériques sont expliquésainsi que les sources de latence. Les graphes de traitement et de latence sont illustréspour présenter une vue d’ensemble.Les problèmes généraux rencontrés lors de l’alignement temporel, tant local que / In inherently latent digital systems it is not trivial to compensate for latency, particularlyin situations of complex signal routing graphs as is the case in a Digital AudioWorkstation.While the general problem is of mathematical nature, design complexities arisein real-time audio systems due to constraints by hardware, system-architecture andengineering.To construct a system providing for full-graph latency compensation with anywhereto-anywhere routing capabilities, it is insufficient to merely describe mechanisms.The complete system has to be designed as one and prototyped to take real-worldlimitations into account.This research was carried out using Ardour, a digital audio workstation, whichis freely available under the GPL free-software licence. This thesis is as much adesign-report as it is research documentation.A complete breakdown of building-blocks and interaction is presented, most of whichhas also been implemented beyond a proof-of-concept with the goal to bridge the gapbetween professional audio production systems and freely accessible documentationfor research and development.While ostensibly focusing on Ardour, this thesis describes generic concepts of AudioWorkstations like Ports, Tracks, Busses, and DSP Processors, as well as operationalinteraction between them.Basic concepts common to all digital I/O processes an,d sources of latency areexplained, and process- and latency graphs are illustrated to provide a completepicture. General issues related to time-alignment, both local, and global, as wellas more DAW specific cases like parameter-automation and parallel-execution arediscussed. Algorithms are modelled with pseudocode where appropriate and applicationprogramming interfaces are presented as examples to concepts throughout the text.

In this thesis, two FPGA testbeds to demonstrate low-latency deterministic Guaranteed- Rate (GR) connections in packet switched networks such as the Internet of Things are developed. Each FPGA testbed consists of multiple simple Input Queued (IQ) switches or routers, interconnected in a given topology to form a forwarding-plane. Each switch has an associated switch controller with several programmable Lookup- Tables (LUTs). A Software Defined Networking (SDN) control plane can configure the switch controllers to establish the GR connections in the forwarding-plane of IP routers or layer- 2 packet switches. According to a recent paper in the IEEE Transactions on Networking; (1) The use of very low jitter GR connections can reduce queuing delays to negligible values, so that the end-to-end delays can be reduced to the buffer latency. (2) The routers, switches and links can operate at 100% loads, while simultaneously guaranteeing very low end- to-end latencies. The goal of the thesis is to evaluate these properties in real hardware clocked at MegaHertz clock rates. In the first testbed, a network of 8 simple IQ switches organized in a linear array is synthesized on an Altera Cyclone IV FPGA. 128 GR traffic flows were routed through the testbed to effectively saturate the switches and links. In the second testbed, a USA backbone topology with 26 simple IQ switches and 88 links is synthesized on the FPGA. Over 300 GR traffic flows were routed through the USA network to achieve utilizations exceeding 90%. In both testbeds, packets move through the forwarding plane at a clock rate of 65 MHz, transferring millions of packets per second, and statistics are recorded. Both testbeds con rm that traffic flows achieve deterministic GR service with minimum buffering, where end-to-end delays are effectively reduced to the fiber latency. These hardware testbeds demonstrate the technical feasibility of achieving deterministic GR services in a packet-switched network such as Internet of Things using simple FPGA switch controllers working with an SDN control plane. The technology also applies to networks of simple optical packet switches with minimal buffering. / Thesis / Master of Applied Science (MASc)

ÅF Digital Solutions AB are looking to replace their current legacy system for audio transmissions within aircrafts with a new system based on Ethernet. They also want the system to be as closely matching the current Audio Integration System as possible as well as preferably using commercial off the shelf components. The issue evaluated in this thesis is whether it is feasible to port the legacy protocol over to an Ethernet based solution with as few modifications as possible, what performance requirements are present on the Ethernet solution as well as what remaining capacity is available in the network. Furthermore is ÅF Digital Solutions AB interested in what avionics related Ethernet based protocols and standards are already present on the market.The work is conducted in two tracks - one track of experimental measurements and statistical analysis of the latency present in the proposed solutions and one track with a survey regarding the integration of the present Audio Integration System protocol into the propesed Ethernet based solutions. The study finds two standards present on the market: Avionics Full-Duplex Ethernet (AFDX) and Time-Triggered Ethernet (TTEthernet). Two prototype implementations are built, one implementing AFDX and one custom built upon Ethernet and UDP. The latency of these are measured and found to be largely similar at ideal conditions. Ethernet is found to be more flexible, whilst AFDX allow for interoperation with other manufacturers and TTEthernet facilitates strict timing requirements at the cost of specialised hardware. The bandwidth utilisation of AFDX at ideal conditions is found to be 0.980% per stream and for the Ethernet solution 0.979% per stream.It is proposed that ÅF Digital Solutions AB pursue a custom Ethernet based solution unless they require interoperability on the same network with other manufacturers as a custom solution with full control over the network allows the largest flexibility in regards to timings and load. If interoperability is required is AFDX proposed instead as it is a standardised protocol and without the, for ÅF Digital Solutions AB, unnecessary overhead of TTEthernet. / Åf Digital Solutions AB vill undersöka möjligheterna att byta sitt nuvarande legacysystem för kommunikation inom flygplan till ett Ethernet-baserat system. Detta på ett sätt som håller implementationen så nära deras nuvarande Audio Integration System som möjligt. Problemet som undersöks är huruvida det är rimligt att flytta legacyprotokollet till Ethernet med så lite modifikationer som möjligt. Utöver detta vill ÅF Digital Solutions AB veta prestandakraven som blir på en Ethernet-lösning samt hur mycket resterande kapacitet som eventuellt finns kvar för framtida användning. Vidare vill de veta vilka standarder som redan finns på marknaden.Arbetet genomförs genom två spår - ett med experimentella mätningar och statistisk analys och en med ett case-study av integrationen av Audio Integration System och Ethernet. Undersökningen finner två standarder på marknaden relaterat till avionik; Avionics Full-Duplex Ethernet (AFDX) samt Time-Triggered Ethernet (TTEthernet).Två prototyper byggs, en baserad på AFDX och en baserad på UDP och Ethernet. Latencyn för dessa två mäts och finns vara snarlika vid deras respektive ideala scenarion. Ethernet finns vara mer flexibelt, AFDX merinteroperabel och TTEthernet mer lämplig vid strikta tidskrav. Bandbreddsutnyttjandet för AFDX finns vara 0.980% vid ideala förhållanden och 0.979% för Ethernetvid ideala förhållanden.Det rekommenderas att ÅF Digital Solutions använder sig av en egenutformad Ethernetbaserad lösning om de inte har krav på interoperabilitet ty det ger mer flexibilietet gällande tidskrav, protokoll och dataflödet.

Over the last decade advances in multineuron simultaneous recording techniques have produced huge amounts of data. This has led to the investigation of probable temporal relationships between spike times of neurons as manifestations of the underlying network structure. But the huge dimensionality of data makes the search for patterns difficult. Although this difficulty may be surpassed by employing massive computing resources, understanding the significance and relation of these temporal patterns to the underlying network structure and the causative activity is still difficult. To find such relationships in networks of excitatory neurons, a simplified network structure of feedforward chains called "Synfire chains" has been frequently employed. But in a recurrently connected network where activity from feedback connections is comparable to the feedforward chain, the basic assumptions underlying synfire chains are violated. In the first part of this thesis we propose the first-spike-latency based analysis as a low complexity method of studying the temporal relationships between neurons. Firstly, spike latencies being temporal delays measured at a particular epoch of time (onset of activity after a quiescent period) are a small subset of all the temporal information available in spike trains, thereby hugely reducing the amount of data that needs to be analyzed. We also define for the first time, "Synconset waves and chains" as a sequence of first-spike-times and the causative neuron chain. Using simulations, we show the efficacy of the synconset paradigm in unraveling feedforward chains of excitatory neurons even in a recurrent network. We further create a framework for going back and forth between network structure and the observed first-spike-latency patterns. To quantify these associations between network structure and dynamics we propose a likelihood measure based on Bayesian reasoning. This quantification is agnostic to the methods of association used and as such can be used with any of the existing approaches. We also show the benefits of such an analysis when the recorded data is subsampled, as is the case with most physiological recordings. In the subsequent part of our thesis we show two sample applications of first-spike-latency analysis on data acquired from multielectrode arrays. Our first application dwells on the intricacies of extracting first-spike-latency patterns from multineuron recordings using recordings of glutamate injured cultures. We study the significance of these patterns extracted vis-a-vis patterns that may be obtained from exponential spike latency distributions and show the differences between patterns obtained in injured and control cultures. In a subsequent application, we study the evolution of latency patterns over several days during the lifetime of a dissociated hippocampal culture.

This thesis is focused on methods for nodes localization in Internet using latency prediction in synthetic coordinates systems. Thesis also deal with methods, which latency prediction between nodes is based on other systems. Among such a methods particularly belongs King, which uses DNS (domain name service). Furthermore, thesis deal with relevance of overlay networks in latency prediction and their use for different services. Practical part of this thesis concentrates on method for latency prediction in synthetic coordinate system Global Network positioning. There were made two programs for counting coordinates of landmarks and hosts in this system. Measurements and calculations made in this thesis, are focused to determine accuracy of latency prediction of this method and their evaluation is made at the end of thesis.

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Low Latency Low Loss Scalable Throughput (L4S) is a technology which aims to provide high throughput and low latency for the IP traffic, lowering also the probability of packet loss. To reach this goal, it relies on Explicit Con- gestion Notification (ECN), a mechanism to signal congestion in the network avoiding packets drop. The congestion signals are then managed at sender and receiver side thanks to scalable congestion control algorithms. Initially, in this work the challenges to implement L4S in a 5G network have been analyzed. Using a proprietary state-of-the-art network simulator, L4S have been imple- mented at the Packed Data Convergence Protocol layer in a 5G network. The 5G network scenario represents a context where the physical layer has a carrier frequency of 600 MHz, a transmission bandwidth of 9 MHz, and the proto- col stack follows the New Radio (NR) specifications. L4S has been adopted to support Augmented Reality (AR) video gaming traffic, using the IETF ex- perimental standard Self-Clocked Rate Adaptation for Multimedia (SCReAM) for congestion control. The results showed that when supported by L4S, the video gaming traffic experiences lower delay than without L4S support. The improvement on latency comes with an intrinsic trade-off between throughput and latency. In all the cases analyzed, L4S yields to average application layer throughput above the minimum requirements of high-rate latency-critical ap- plication, even at high system load. Furthermore, the packet loss rate has been significantly reduced thanks to the introduction of L4S, and if used in combi- nation with a Delay Based Scheduler (DBS), a packet loss rate very close to zero has been reached. / Low Latency Low Loss Scalable Throughput (L4S) är en teknik som syftar till att ge hög bittakt och låg fördröjning för IP-trafik, vilket också minskar sanno- likheten för paketförluster. För att nå detta mål förlitar det sig på Explicit Cong- estion Notification (ECN), en mekanism för att signalera "congestion", det vill säga köuppbyggnad i nätverket för att undvika att paketet kastas. Congestion- signalerna hanteras sedan vid avsändare och mottagarsida där skalbar anpass- ning justerar bittakten efter rådande omständigheter. I detta arbete har utma- ningarna att implementera L4S i ett 5G-nätverk analyserats. Sedan har L4S implementerats på PDCP lagret i ett 5G-nätverkssammanhang genom att an- vända en proprietär nätverkssimulator. För att utvärdera fördelarna med imple- menteringen har L4S-funktionerna använts för att stödja Augmented Reality (AR) videospelstrafik, med IETF-experimentella standard Self-Clocked Rate Adaptation for Multimedia (SCReAM) för bitrate-kontroll. Resultaten visade att med stöd av L4S upplever videospelstrafiken lägre latens än utan stöd av L4S. Förbättringen av latens kommer med nackdelen av en minskning av bit- takt som dikteras av den inneboende avvägningen mellan bittakt och latens. I vilket fall som helst är kapacitetsminskningen med L4S rimlig, eftersom goda kapacitetsprestanda har uppnåtts även vid hög systembelastning. Vidare har paketförlustfrekvensen reducerats avsevärt tack vare införandet av L4S, och om den används i kombination med en Delay baserad schemaläggare (DBS) har en paketförluster mycket nära noll uppnåtts.

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ITC/USA 2006 Conference Proceedings / The Forty-Second Annual International Telemetering Conference and Technical Exhibition / October 23-26, 2006 / Town and Country Resort & Convention Center, San Diego, California / As the rates and numbers of serial telemetry data streams increase, the cost of timely, efficient and robust distribution of those streams increases faster. Without alternatives to traditional pointto- point serial distribution, the complexity of the infrastructure will soon overwhelm potential benefits of the increased stream counts and rates. Utilization of multiplexing algorithms in Field- Programmable Gate Arrays (FPGA), coupled with universally available Internet Protocol (IP) switching technology, provides a low-latency, time-data correlated multi-stream distribution solution. This implementation has yielded zero error IP transport and regeneration of multiple serial streams, maintaining stream to stream skew of less than 10 nsec, with end-to-end latency contribution of less than 15 msec. Adoption of this technique as a drop-in solution can greatly reduce the costs and complexities of maintaining pace with the changing serial telemetry community.