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Thesis (M. S.)--Florida State University, 2005. / Advisor: Dr. Mark H. Weatherspoon, Florida State University, College of Engineering, Dept. of Electrical and Computer Engineering. Title and description from dissertation home page (viewed Sept. 19, 2005). Document formatted into pages; contains viii, 70 pages. Includes bibliographical references.

The filtered cathodic vacuum arc (FCVA) technique is a well established deposition method for wear resistant mechanical coatings. More recently, this method has attracted attention for growing ZnO based transparent conducting films. However, the potential of FCVA deposition to prepare ZnO layers for electronic devices is largely unexplored. This thesis addresses the use of FCVA deposition for the fabrication of active ZnO based electronic devices. The structural, electrical and optical characteristics of unintentionally doped ZnO films grown on different sapphire substrates were systematically investigated. The potential of FCVA to grow both polar and non-polar ZnO films was demonstrated. The resulting films showed considerable promise for device applications with properties including high transparency(> 90%), moderate intrinsic carrier concentrations (10¹⁷ - 10¹⁹ cm⁻³), electron mobilities up to 110 cm⁻²/Vs, low surface roughness (< 5 nm) and well-structured photoluminescence. Post-growth annealing in oxygen at temperatures up to 800 C produced significant improvements in the electronic and optical properties of these films, due to the formation of larger grains with lower inter-grain potential barriers. Silver oxide (AgOᵪ ) and iridium oxide (IrOᵪ) Schottky diodes fabricated on annealed FCVA ZnO films showed ideality factors as low as 1.20, barrier heights up to 0.85 eV and high sensitivity to ultraviolet light (up to ̴ 10⁻⁵ at -2 V). Transparent and opaque MESFETs fabricated on these films showed well defined field effect characteristics, channel mobilities up to 70 cm⁻²/Vs and insensitivity to 1 mW/cm⁻² visible light. These devices were further subjected to extensive bias and temperature stress tests. MESFET stability appeared to be strongly dependent on Schottky gate type, bias conditions and ZnO film morphology. Positive bias stress of AgOᵪ gated devices resulted in irreversible damage, that is thought to be due to Ag electromigration across the gate interface. Mapping of the surface potential of the ZnO channel material with Kelvin probe force microscopy suggested a strong relationship between the defect density at grain boundaries and both channel mobility and current stability. Interval growth techniques were found to reduce the density of defects at grain boundaries and produced MESFETs with higher current stability. IrOᵪ gated devices showed superior bias stability and temperature resilience from 25 C-195 C.

Due to their low-temperature processing capability and ionic bonding configuration, amorphous oxide semiconductors (AOS) are well suited for applications within future mechanically flexible electronics. Over the past couple of years, amorphous zinc tin oxide (ZTO) has been proposed as indiumand gallium-free and thus more sustainable alternative to the widely deployed indium gallium zinc oxide (IGZO). The present study specifically focuses on the strain-dependence of elastic and electrical properties of amorphous zinc tin oxide thin-films sputtered at room temperature. Corresponding MESFETs have been compared regarding their operation stability under mechanical bending for radii ranging from 5 to 2 mm. Force-spectroscopic measurements yield a plastic deformation of ZTO as soon as the bending-induced strain exceeds 0.83%. However, the electrical properties of ZTO determined by Hall effect measurements at room temperature are demonstrated to be unaffected by residual compressive and tensile strain up to 1.24 %. Even for the maximum investigated tensile strain of 1.26 %, the MESFETs exhibit a reasonably consistent performance in terms of current on/off ratios between six and seven orders of magnitude, a subthreshold swing around 350 mV/dec and a field-effect mobility as high as 7.5 cm2V−1s−1. Upon gradually subjecting the transistors to higher tensile strain, the channel conductivity steadily improves and consequently, the field-effect mobility increases by nearly 80% while bending the devices around a radius of 2 mm. Further, a reversible threshold voltage shift of about −150 mV with increasing strain is observable. Overall, amorphous ZTO provides reasonably stable electrical properties and device performance for bending-induced tensile strain up to at least 1.26% and thus represent a promising material of choice considering novel bendable and transparent electronics.

Next generation mobile communication systems require the use of linear RF power amplifier for higher data transmission rates. However, linear RF power amplifiers are inherently inefficient and usually require additional circuits or further system adjustments for better efficiency. This dissertation focuses on the development of new efficiency enhancement schemes for linear RF power amplifiers. The multistage Doherty amplifier technique is proposed to improve the performance of linear RF power amplifiers operated in a low power level. This technique advances the original Doherty amplifier scheme by improving the efficiency at much lower power level. The proposed technique is supported by a new approach in device periphery calculation to reduce AM/AM distortion and a further improvement of linearity by the bias adaptation concept. The device periphery adjustment technique for efficiency enhancement of power amplifier integrated circuits is also proposed in this work. The concept is clearly explained together with its implementation on CMOS and SiGe RF power amplifier designs. Furthermore, linearity improvement technique using the cancellation of nonlinear terms is proposed for the CMOS power amplifier in combination with the efficiency enhancement technique. In addition to the efficiency enhancement of power amplifiers, a scalable large-signal MOSFET model using the modified BSIM3v3 approach is proposed. A new scalable substrate network model is developed to enhance the accuracy of the BSIM3v3 model in RF and microwave applications. The proposed model simplifies the modeling of substrate coupling effects in MOS transistor and provides great accuracy in both small-signal and large-signal performances.