Oscillators are ubiquitous to radio frequency circuits, where frequency translations and channel selection play a central role in the analogue communications channel. Oscillators also form part of digital systems as a time reference. Typical heterodyne receivers require an intermediate frequency channel. The associated oscillators and variable filters can only be centred perfectly at a single frequency, and degrade performance at the boundaries of the channel. These circuits also require image-rejecting filters and phase-locked loops in order to enable down-conversion. The penalties for these components are increased circuit area and power consumption. A direct down-conversion circuit will reduce the number of components in the system. A requirement added by the structural change is a passive sub-harmonic mixer. Quadrature oscillators may be achieved by cross-coupling two nominally identical LC differential voltage-controlled oscillators. Because of the widespread use of voltage-controlled oscillators in wireless communication systems, the development of comprehensive nonlinear analysis is pertinent in theory and applications. A key characteristic that defines the performance of an oscillator is the phase noise measurement. The voltage-controlled oscillator is also a key component in phase-locked loops, as it contributes to most of the out-of-band phase noise, as well as a significant portion of in-band noise. Current state-of-the-art modulation techniques, implemented at 60 GHz, such as quadrature amplitude modulation, and orthogonal frequency domain multiplexing, require phase noise specifications superior to 90 dBc/Hz at a 1 MHz offset. It has been shown that owing to the timing of the current injection, the Colpitts oscillator tends to outperform other oscillator structures in terms of phase noise performance. The Colpitts oscillator has a major flaw in that the start-up gain must be relatively high in comparison to the cross-coupled oscillator. The oscillation amplitude cannot be extended as in the cross-coupled case. The oscillator’s bias current generally limits the oscillation amplitude. The phase noise is defined by a stochastic differential equation, which can be used to predict the system’s phase noise performance. The characteristics of the oscillator can then be defined using the trajectory. The model projects the noise components of the oscillator onto the trajectory, and then translates the noise into the resulting phase and amplitude shift. The phase noise performance of an oscillator may be improved by altering the shape of the trajectory. The trajectory of the oscillator is separated into slow and fast transients. Improving the shape of the oscillator’s slow manifold may improve its phase noise performance, and improving the loaded quality factor of the tank circuit may be shown to directly improve upon close-in phase noise. The approach followed describes oscillator behaviour from a circuit-level analysis. The derived equations do not have a closed form solution, but are reformulated using harmonic balance techniques to yield approximate solutions. The results from this closed form approximation are very close to both the numerical solutions of the differential equations, as well as the Simulation Program with Integrated Circuit Emphasis solutions for the same circuits. The derived equations are able to predict the amplitude and frequency in the single-phase example accurately, and are extended to provide a numerical platform for defining the amplitude and frequency of a multiphase oscillator. The analysis identifies various circuit components that influence the oscillator’s phase noise performance. A circuit-level modification is then identified, enabling the decoupling of some of the factors and their interactions. This study demonstrates that the phase noise performance of a Colpitts oscillator may be significantly improved by making the proposed changes to the oscillator. The oscillator’s figure of merit is improved even further. When a given oscillator is set at its optimum phase noise level, the collector current will account for approximately 85% of the phase noise; with the approach in this work, the average collector current is reduced and phase noise performance is improved. The key focus of the work was to identify circuit level changes to an oscillator’s structure that could be improved or changed to achieve better phase noise performance. The objective was not to improve passive components, but rather to identify how the noise-to-phase noise transfer function could be improved. The work successfully determines what can be altered in an oscillator that will yield improved phase noise performance by altering the phase noise transfer function. / The concept is introduced on a differential oscillator and then extended to the multiphase oscillator. The impulse sensitivity function of the modified multiphase oscillator is improved by altering the typical feedback structure of the oscillator. The multiphase oscillator in this work is improved from -106 dBc/Hz to -113 dBc/Hz when considering the phase noise contribution from the tank circuits’ bias current alone. This is achieved by uniquely altering the feedback method of the oscillator. This change alters the noise-to-phase noise properties of the oscillator, reducing phase noise. The improvement in the phase noise does not account for further improvements the modification would incorporate in the oscillator’s limit cycle. For a given tank circuit, supply current and voltage, compared to an optimised Colpitts oscillator, the modifications to the feedback structure proposed in this work would further improve the figure of merit by 9 dB. This is not considering the change in the power consumption, which would yield a further improvement in the figure of merit by 7 dB. This is achieved by relaxing the required start-up current of the oscillator and effecting an improvement in the impulse sensitivity function. Future research could include further modelling of the phase shift in the feedback network, including the transmission lines in the feedback networks using the harmonic balance technique in a numerical form. The feedback technique can also be modified to be applicable to single and differential oscillators. / Dissertation (MEng)--University of Pretoria, 2017. / National Research Foundation / The Department of Science and Technology, South Africa / GEW Technologies (Pty) Ltd / Electrical, Electronic and Computer Engineering / MEng / Unrestricted

The master’s thesis deals with the design of DRM (Digital Radio Mondiale) receiver. The block diagram of receiver was chosen and particular blocks were theoretically analyzed. After that followed design and production of each block. The synthesizer was programmed and the receiver properties were verified. The last part of thesis deals with real receiving of DRM broadcast.

In the first part of this thesis a basic theory of retrodirective antenna arrays and their particular parts – antennas and mixers is summarized. Further, there is a basic summary of possibilities for an usage of retrodirective antenna arrays for an information transmission. The second part deals with the concrete retrodirective antenna array design. The design starts with creation of an antenna array model for MATLAB software. Then a suitable structure for further design is chosen. Further, particular parts of retrodirctive antenna array – a patch antenna, a mixer, a low-pass filter, a bandstop filter, a signal combiner and a Wilkinson power divider are designed and analyzed in Ansoft Designer software. For the patch antenna analysis also CST Microwave Studio software is used. The following part deals with the realization of particular parts of the retrodirecive antenna array and its parameters measuring.

Master’s thesis describes the design of multi-band microwave transmitters to study the propagation of electromagnetic waves in the atmosphere with the possibility of modulation of the transmitted signal. Based transmitters are synchronized phase lock loop, frequency multipliers, double balanced diode mixers.

This diploma project solves questions of blending processes and mixers of partikular materials. In the first and the second part is solved theoreticel analysis of blending processes. Contain of the third and the fourth part is designing and calculating of the mixer´s parameters.

This work contains a proposal for constructions and workings of a worm mixer of clay, lime, cementand fly ash with water for delivery quantity 18 tons per an hour. The introduction describes problems of mixing and mixers in the preparation of building materials. I have mentioned calculation of the main proportions and drive under the relevant norms and self-fortress control of the stresssed parts of mixer. Drawing documentation is worked into the ACad program and contains the configurations of the proposed machinery and detailed subassembly of important parts of worm mixer.

Diplomová práca sa zaoberá návrhom mixéru pre výrobu fosfátových hnojív s ohľadom na zadané požiadavky. Práca samotná je rozdelená do niekoľkých častí, kde prvá formuluje ciele riešenia. Základné otázky konkrétneho priemyslu sú odpovedané s akcentom na premenné, ktoré priamo ovplyvňujú kvalitu mixovania. Ďalšia časť práce prezentuje ideový návrh so sadou výpočtov, ktoré podporujú požadovaný výkon a mechanický dizajn mixéru. Hriadeľ je kontrolovaný analytickým výpočtom a metódou FEM, vyúsťujúc do zhodných záverov. Navrhnutý dizajn mixéru je prezentovaný 3D modelmi jeho súčastí, ktoré boli vytvorené v prostredí Autodesk Inventor. Práca obsahuje taktiež 2D dokumentáciu.

No description available.

The development of semiconductor technology has led to the significant scaling of the transistor dimensions -The transistor gate length drops down to tens of nanometers and the gate oxide thickness to 1 nm. In the future several years, the deep submicron devices will dominate the semiconductor industry for the high transistor density and the corresponding performance enhancement. For these devices, the reliability issues are the first concern for the commercialization. The major reliability issues caused by voltage and/or temperature stress are gate oxide breakdown (BD), hot carrier effects (HCs), and negative bias temperature instability (NBTI). They become even more important for the nanoscale CMOS devices, because of the high electrical field due to the small device size and high temperature due to the high transistor densities and high-speed performances. This dissertation focuses on the study of voltage and temperature stress-induced reliability issues in nanoscale CMOS devices and circuits. The physical mechanisms for BD, HCs, and NBTI have been presented. A practical and accurate equivalent circuit model for nanoscale devices was employed to simulate the RF performance degradation in circuit level. The parameter measurement and model extraction have been addressed. Furthermore, a methodology was developed to predict the HC, TDDB, and NBTI effects on the RF circuits with the nanoscale CMOS. It provides guidance for the reliability considerations of the RF circuit design. The BD, HC, and NBTI effects on digital gates and RF building blocks with the nanoscale devices – low noise amplifier, oscillator, mixer, and power amplifier, have been investigated systematically. The contributions of this dissertation include: It provides a thorough study of the reliability issues caused by voltage and/or temperature stresses on nanoscale devices – from device level to circuit level; The more real voltage stress case – high frequency (900 MHz) dynamic stress, has been first explored and compared with the traditional DC stress; A simple and practical analytical method to predict RF performance degradation due to voltage stress in the nanoscale devices and RF circuits was given based on the normalized parameter degradations in device models. It provides a quick way for the designers to evaluate the performance degradations; Measurement and model extraction technologies, special for the nanoscale MOSFETs with ultra-thin, ultra-leaky gate oxide, were addressed and employed for the model establishments; Using the present existing computer-aided design tools (Cadence, Agilent ADS) with the developed models for performance degradation evaluation due to voltage or/and temperature stress by simulations provides a potential way that industry could use to save tens of millions of dollars annually in testing costs. The world now stands at the threshold of the age of nanotechnology, and scientists and engineers have been exploring here for years. The reliability is the first challenge for the commercialization of the nanoscale CMOS devices, which will be further downscaling into several tens or ten nanometers. The reliability is no longer the post-design evaluation, but the pre-design consideration. The successful and fruitful results of this dissertation, from device level to circuit level, provide not only an insight on how the voltage and/or temperature stress effects on the performances, but also methods and guidance for the designers to achieve more reliable circuits with nanoscale MOSFETs in the future.

A hot-flow axisymmetric Air Augmented Rocket (AAR) test apparatus was constructed to test various mixing duct configurations at static conditions. Primary flow for the AAR was provided through a liquid methanol-gaseous oxygen bipropellant rocket. Experimental thrust measurements were recorded and propellant mass flow rates and chamber conditions were calculated using an iterative solver dependant on recorded propellant line stagnation pressures. Primary rocket flow produced thrust ranging from 14 to 17.9lbf. Primary mass flow rate through testing ranged from 0.071 to 0.085lbm/s with calculated chamber pressures between 298-362psia. Calculated primary flow velocity ranged from 6,600ft/s to 8,000ft/s depending on propellant pressure inputs and calculated chamber conditions. The AAR test apparatus was capable of testing various mixing duct geometries and measuring the axial thrust of the mixing ducts separately from the total thrust of the system. Two mixing duct geometries, a straight wall mixing duct and diverging wall mixing duct, with identical exterior dimensions and inlet geometry were tested for a range of air/fuel mixture ratios from 0.82 to 2.2 spanning the stoichometric mixture ratio of 1.5. Mixing duct thrust did not vary greatly with primary flow characteristics. Straight mixing duct thrust averaged 0.97lbf and diverging mixing duct thrust averaged 0.18lbf. Total system thrust decreased by an average of 0.62lbf with a straight mixing duct and 0.74lbf with a diverging mixing duct. Decreases in total thrust are attributed to low pressure flow interaction between the mixing duct and the primary rocket assembly. Visual flow comparison between mixing duct configurations and fuel ratio cases were carried out using high definition video recording with a grid reference for comparison. The diverging mixing duct produced the greatest variation in visible flow when compared to a straight mixing duct and no mixing duct configuration. This indicated that the diverging mixing duct had a greater influence on primary and secondary flow field mixing than the straight mixing duct.