Wideband amplifiers are an important part of analog design, and much effort has been expended in improving them. A popular implementation of a wideband amplifier is to use one or two stages with high gain in one or both stages. An alternative to this method is presented in this work, developed for Metal Oxide Semiconductor (MOS) amplifiers. The new approach, building on previous work in bipolar technology, uses multiple differential MOS stages to achieve similar gain requirements to other wideband amplifiers. It is shown that multiple stages with low gain, if implemented according to the present design method, can lead to better gain-bandwidth product (GBW) than a few stages. As part of the design process, GBW is optimized and current draw is reduced. Derived equations are used to find the ideal device widths of each stage to improve GBW. The amplifier's current draw is reduced through increasing the widths of each successive stage according to a derived, fixed taper factor. Simulation of the resulting amplifier shows that these optimization procedures can improve GBW by 20% or more over a nonoptimized cascaded amplifier.

Aim of this work was, to investigate the preparation of Si NC memories by sputter deposition. The milestones are as follows: - Review of relevant literature. - Development of processes for an ultrathin tunnel-oxide and high quality sputtered SiO2 for use as control-oxide. - Evaluation of methods for the preparation of an oxygen-deficient silicon oxide inter-layer (the precursor of the Si NC layer). - Characterization of deposited films. - Establishment of techniques capable of probing the phase separation of SiOx and the formation of Si NC. - Establishment of annealing conditions compatible with the requirements of current CMOS technology based on experimental results and simulations of Si NC formation. - Preparation Si NC memory capacitors using the developed processes. - Characterization of these devices by suitable techniques. Demonstration of their memory functionality.

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The Emitter Controlled Thyristor (ECT) is a new MOS-Gated Thyristor (MGT) that combines the ease of a MOS gate control with the superior current carrying capability of a thyristor structure for high-power applications. An ECT is composed of an emitter switch in series with the thyristor, an emitter-short switch in parallel with the emitter junction of the thyristor, a turn-on FET and the main thyristor structure. Numerical analysis shows that the ECT also offers superior high voltage current saturation capability even for high breakdown voltage ratings. Two different ECT structures are investigated in this research from numerical simulations to experimental fabrications. A novel ECT structure that utilizes IGBT compatible fabrication process was proposed. The emitter short FET, emitter switch FET and turn-on FET are all integrated with a high voltage thyristor. Numerical simulation results show that the ECT has a better conductivity modulation than that of the IGBT and at the same time exhibits superior high voltage current saturation capability, superior FBSOA and RBSOA. The technology trade-off between turn-off energy loss and forward voltage drop of the ECT is also better than that of the IGBT because of the stronger conductivity modulation. A novel self-aligned process is developed to fabricate the device. Experimental characteristics of the fabricated ECT devices show that the ECT achieves lower forward voltage drop and superior high voltage current saturation capability. A Hybrid ECT (HECT) structure was also developed in this research work. The HECT uses an external FET to realize the emitter switching function, hence a complicated fabrication issue was separated into two simple one. The cost of the fabrication decreases and the yield increases due to the hybrid integration. Numerical simulations demonstrate the superior on-state voltage drop and high voltage current saturation capability. A novel seven-mask process was developed to fabricate the HECT. Experimental results show that the HECT could achieve the lower forward voltage drop and superior current saturation capability. The resistive switching test was carried out to demonstrate the switching characteristics of the HECT. / Master of Science

The Emitter Controlled Thyristor (ECT) is a new MOS-Gated Thyristor (MGT) that combines the ease of a MOS gate control with the superior current carrying capability of a thyristor structure for high-power applications. An ECT is composed of an emitter switch in series with the thyristor, an emitter-short switch in parallel with the emitter junction of the thyristor, a turn-on FET and the main thyristor structure. Numerical analysis shows that the ECT also offers superior high voltage current saturation capability even for high breakdown voltage ratings. Two different ECT structures are investigated in this research from numerical simulations to experimental fabrications. A novel ECT structure that utilizes IGBT compatible fabrication process was proposed. The emitter short FET, emitter switch FET and turn-on FET are all integrated with a high voltage thyristor. Numerical simulation results show that the ECT has a better conductivity modulation than that of the IGBT and at the same time exhibits superior high voltage current saturation capability, superior FBSOA and RBSOA. The technology trade-off between turn-off energy loss and forward voltage drop of the ECT is also better than that of the IGBT because of the stronger conductivity modulation. A novel self-aligned process is developed to fabricate the device. Experimental characteristics of the fabricated ECT devices show that the ECT achieves lower forward voltage drop and superior high voltage current saturation capability. A Hybrid ECT (HECT) structure was also developed in this research work. The HECT uses an external FET to realize the emitter switching function, hence a complicated fabrication issue was separated into two simple one. The cost of the fabrication decreases and the yield increases due to the hybrid integration. Numerical simulations demonstrate the superior on-state voltage drop and high voltage current saturation capability. A novel seven-mask process was developed to fabricate the HECT. Experimental results show that the HECT could achieve the lower forward voltage drop and superior current saturation capability. The resistive switching test was carried out to demonstrate the switching characteristics of the HECT. / Master of Science

L'augmentation du trafic de données met énormément de pression sur les systèmes de communications par fibre optique qui doivent répondre à la demande tout en maintenant les coûts d'opération et la consommation énergétique les plus faibles possibles. Pour palier à ce problème, une solution intéressante consiste à utiliser des interconnections optiques reconfigurables ne nécessitant peu ou pas de conversion électro-optique intermédiaire, notamment dans les centres de données. On parle ici de transparence dans les réseaux optiques. Pour concevoir ces dispositifs photoniques, la plateforme intégrée silicon-on-insulator (SOI) est très prometteuse. En effet, elle offre la possibilité de concevoir des composants intégrés qui sont compacts, polyvalents, évolutifs et sophistiqués, le tout en réduisant les coûts de production. Ce mémoire porte sur l'étude, sur la conception et sur la fabrication de filtres à micro-cavités en anneau d'ordre élevé sur SOI et à leur utilisation dans des systèmes de multiplexage en longueur d'onde reconfigurables, transparents et insensibles à la polarisation. L'objectif de ce travail est plus particulièrement d'adresser le défi complexe qui consiste à développer un système de ce type, possédant toutes les caractéristiques visées par les équipements qui sont déployés à grande échelle. La première partie de ce travail a comme objectif de présenter les systèmes de communications optiques et le problème qui est adressé dans son contexte. C'est aussi à ce moment que sera introduite en détails la plateforme SOI qui offre des outils pour répondre au problème. Ensuite, en seconde partie, il sera question des filtres à micro-cavité en anneau et des méthodes de design permettant de les modéliser afin de les intégrer dans des systèmes complexes. Ces filtres sont cependant très sensibles au processus de fabrication et il est donc nécessaire de présenter un méthodologie permettant de corriger leur réponse en post-fabrication, chose qui sera faite en troisième partie. Enfin, la dernière section de ce travail de recherche porte sur l'intégration des concepts développés dans les sections précédentes afin de bâtir un système complet de multiplexage en longueur d'onde reconfigurable, transparent et insensible en polarisation. Enfin, même s'il reste beaucoup de travail d'analyse et de conception devant nous, cette recherche montre de manière non-exhaustive les avantages et les limitations fondamentales que peuvent avoir les filtres à micro-résonateurs en anneau implémentés dans les réseaux transparents reconfigurables. / Increase in data traffic puts a lot of pressure on optical communication systems which must provide for its users while maintaining operation costs and energy consumption as low as possible. A solution to overcome those problems consists in using reconfigurable optical inter-connects which do not require any electro-optical conversion, especially in data centers. This is known as optical network transparency. In order to build the optical components required to implement optical network transparency, the silicon-on-insulator (SOI) platform provides very promising solutions. It offers the possibility to design highly-scalable integrated devices with a small footprint and low fabrication costs. This memoir aims to study the design and fabrication of high-order microring resonator filters on the SOI platform and their usage in reconfigurable, transparent and polarization insensitive wavelength division multiplexing (WDM) optical communications systems. The main goal of this work is to address the complex challenges of designing such components for widespread usage, having all the specifications that are required for their implementation. In the first part of this work, optical communications systems and the problem that will be addressed will be discussed in its context. At this point, the silicon-on-insulator platform which offers helpful tools for responding to the issue will be introduced. Then, in the second part, high-order microring filters will be introduced as a solution and their principles and applications will be discussed. Those filters are unfortunately very sensitive to the fabrication process and it is thus necessary to discuss the methodology required in order to mitigate those effects at the post-fabrication level. This methodology will be discussed in the third part of this work. Then, in the final part of this memoir, all the concepts previously introduced will be consolidated in order to build a complete reconfigurable and transparent WDM system that is insensitive to polarization. There is still a lot of work ahead of us and even though this research is not exhaustive, it shows the advantages as well as fundamental limitations of high-order microring filters when implemented in transparent and reconfigurable optical networks.

Disertacijoje nagrinėjama koduoto balso kokybės vertinimo problematika. Pagrindinis dėmesys skiriamas balso kokybės tyrimams, kai perduodama koduota šneka ir prarandami balso paketai. Darbo tikslas yra patobulinti koduoto balso kokybės vertinimo algoritmus. Darbo uždaviniai yra šie: sukurti matavimo priemonę trumpų balso signalo atkarpų kokybei vertinti; apibrėžti koduoto balso segmentų vertės sampratą ir parinkti vertės metrikas; išmatuoti bendrinės šnekos balso segmentų verčių skirstinius; nustatyti skirtingų koderių sukuriamų iškraipymų ribas; ištirti paplitusių koderių inertiškumą, nustatyti kiek laiko pastebima prarastų paketų įtaka sekantiems segmentams. Disertaciją sudaro įvadas, keturi tiriamieji skyriai ir bendrosios išvados. Įvade pristatomas darbo naujumas, aktualumas, aptariamas autoriaus indėlis, formuluojami darbo tikslai. Pirmas skyrius yra apžvalginis – analizuojami balso kokybės vertinimo metodai, jų privalumai ir trūkumai. Kaip savarankiška dalis čia pristatyti autoriaus sudaryti sąrašai lietuviškų žodžių, skirtų šnekos suprantamumo tyrimams. Antrame skyriuje parodoma, kaip galima išplėsti kokybės vertinimo PESQ (angl. Perceptual Evaluation of Speech Quality) algoritmo taikymo ribas. Čia įvedama koduoto balso paketo vertės sąvoka, nustatomi statistiniai paketų vertės skirstiniai. Trečiame skyriuje nagrinėjami specifiniai koduotos šnekos iškraipymai ir kodavimo parametrų įtaka balso kokybei. Parodoma, kad kodavimo iškraipymų dydis priklauso nuo šnekos... [toliau žr. visą tekstą] / The dissertation investigates the problem of quality of coded voice. The main attention is paid to voice quality evaluation under packet loss conditions. The aim of the work is to improve voice quality evaluation algorithms. The tasks of the work are: construction of the means for measurement of voice quality of short voice signals; to define the concept of value of coded voice segment and to choose corresponding value metrics; to measure distributions of frame values in standard voice; to establish limits of distortions created by different codecs; to investigate inertia of wide spread codecs and establish the length of impact of one lost frame. The dissertation consists of the introduction, 4 chapters, conclusions, list of literature. Introduction presents the novelty and topicality of the work, tasks and aims of the work are formulated. The first chapter is overview of voice quality evaluation methods, pros and cons of these methods are analyzed. PESQ algorithm and limits of its applicability are introduced in this chapter too. The lists of Lithuanian words for word intelligibility testing are created. Chapter two presents the method of signal construction that allows to extend PESQ applicability to short signals. This chapter introduces the concept of frame value. Distributions of frame values are calculated. Third chapter analyses distortions created by coding. It is shown that coding distortions depends highly on the signal used and limits of distortion variability are... [to full text]

The dissertation investigates the problem of quality of coded voice. The main attention is paid to voice quality evaluation under packet loss conditions. The aim of the work is to improve voice quality evaluation algorithms. The tasks of the work are: • construction of the means for measurement of voice quality of short voice signals; • to define the concept of value of coded voice segment and to choose corresponding value metrics; • to measure distributions of frame values in standard voice; • to establish limits of distortions created by different codecs; • to investigate inertia of wide spread codecs and establish the length of impact of one lost frame. The dissertation consists of the introduction, 4 chapters, conclusions, list of literature. Introduction presents the novelty and topicality of the work, tasks and aims of the work are formulated. The first chapter is overview of voice quality evaluation methods, pros and cons of these methods are analyzed. PESQ algorithm and limits of its applicability are introduced in this chapter too. The lists of Lithuanian words for word intelligibility testing are created. Chapter two presents the method of signal construction that allows to extend PESQ applicability to short signals. This chapter introduces the concept of frame value. Distributions of frame values are calculated. Third chapter analyses distortions created by coding. It is shown that coding distortions... [to full text] / Disertacijoje nagrin jama koduoto balso kokybės vertinimo problematika. Pagrindinis dėmesys skiriamas balso kokybės tyrimams, kai perduodama koduota šneka ir prarandami balso paketai. Darbo tikslas yra patobulinti koduoto balso kokybės vertinimo algoritmus. Darbo uždaviniai yra šie: • sukurti matavimo priemonę trumpų balso signalo atkarpų kokybei vertinti; • apibrėžti koduoto balso segmentų vertės sampratą ir parinkti vertės metrikas; • išmatuoti bendrinės šnekos balso segmentų verčių skirstinius; • nustatyti skirtingų koderių sukuriamų iškraipymų ribas; • ištirti paplitusių koderių inertiškumą, nustatyti kiek laiko pastebima prarastų paketų įtaka sekantiems segmentams. Disertaciją sudaro įvadas, keturi tiriamieji skyriai ir bendrosios išvados. Įvade pristatomas darbo naujumas, aktualumas, aptariamas autoriaus indėlis, formuluojami darbo tikslai. Pirmas skyrius yra apžvalginis – analizuojami balso kokybės vertinimo metodai, jų privalumai ir trūkumai. Kaip savarankiška dalis čia pristatyti autoriaus sudaryti sąrašai lietuviškų žodžių, skirtų šnekos suprantamumo tyrimams. Antrame skyriuje parodoma, kaip galima išplėsti kokybės vertinimo PESQ (angl. Perceptual Evaluation of Speech Quality) algoritmo taikymo ribas. Čia įvedama koduoto balso paketo vertės sąvoka, nustatomi statistiniai paketų vertės skirstiniai. Trečiame skyriuje nagrinėjami specifiniai koduotos šnekos iškraipymai ir kodavimo parametrų įtaka... [toliau žr. visą tekstą]

L'étude de la fiabilité représente un enjeu majeur de la qualification des technologies de l'industrie de la microélectronique. Elle est traditionnellement étudiée en suivant la dégradation des paramètres des transistors au cours du temps, qui sert ensuite à construire des modèles physiques expliquant le vieillissement des transistors. Nous avons fait le choix dans ces travaux d'étudier la fiabilité des transistors à l'échelle microscopique, en nous intéressant aux mécanismes de ruptures de liaisons atomiques à l'origine de la création des défauts de l'oxyde de grille. Nous avons tout d'abord identifié la nature des défauts et modéliser leurs dynamiques de capture de charges afin de pouvoir reproduire leur impact sur des mesures électriques complexes. Cela nous a permis de développer une nouvelle méthodologie de localisation des défauts, le long de l'interface Si-SiO2, ainsi que dans le volume de l'oxyde. La mesure des dynamiques de créations de défauts pour des stress de type porteurs chauds et menant au claquage de l'oxyde de grille nous a permis de développer des modèles de dégradation de l'oxyde, prédisant les profils de défauts créés à l'interface et dans le volume de l'oxyde. Nous avons enfin établi un lien précis entre l'impact de la dégradation d'un transistor sur la perte de fonctionnalité d'un circuit représentatif du fonctionnement d'un produit digital.L'étude et la modélisation de la fiabilité à l'échelle microscopique permet d'avoir des modèles plus physiques, offrant ainsi une plus grande confiance dans les extrapolations de durées de vie des transistors et des produits. / Reliability study is a milestone of microelectronic industry technology qualification. It is usually studied by following the degradation of transistors parameters with time, used to build physical models explaining transistors aging. We decided in this work to study transistors reliability at a microscopic scale, by focusing on atomic-bond-breaking mechanisms, responsible of defects creation into the gate-oxide. First, we identified defects nature and modeled their charge capture dynamics in order to reproduce their impact on complex electrical measurements degradation. This has allowed us developing a new methodology of defects localization, along the Si/SiO2 interface, and in the volume of the gate-oxide. Defects creation dynamics measurement, for Hot Carrier stress and stress conditions leading to the gate-oxide breakdown, has allowed us developing gate-oxide degradation models, predicting generated defect profiles at the interface and into the volume of the gate-oxide. Finally, we established an accurate link between a transistor degradation impact on circuit functionality loss.Reliability study and modeling at a microscopic scale allows having more physical models, granting a better confidence in transistors and products lifetime extrapolation.

Nesta dissertação é apresentada a aplicação da programação geométrica no projeto de uma fonte de tensão de referência de baixa tensão de alimentação que pode ser integrada em tecnologias padrões CMOS. Também são apresentados os resultados experimentais de um projeto da fonte de bandgap feito por um método de projeto convencional, cuja experiência motivou e ajudou ao desenvolvimento da formulação do programa geométrico proposta neste trabalho. O programa geométrico desenvolvido nesta dissertação otimiza o desempenho da fonte de bandgap e agiliza seu tempo de projeto. As expressões matemáticas que descrevem o funcionamento e as principais especificações da fonte de bandgap foram geradas e adaptadas ao formato de um programa geométrico. A compensação da temperatura, o PSRR, o consumo de corrente, a área, a tensão de saída e a sua variação por causa da tensão de offset do OTA, e a estabilidade são as principais especificações deste tipo de fonte de tensão de referência e fazem parte do programa geométrico apresentado neste trabalho. Um exemplo do projeto usando o programa geométrico formulado neste trabalho, mostra a possibilidade de projetar a fonte de bandgap em alguns minutos com erros baixos entre os resultados do programa geométrico e de simulação. / This work presents the application of geometric programming in the design of a CMOS low-voltage bandgap voltage reference source. Test results of a bandgap voltage reference designed via a conventional method are showed, this design experience motivated and helped to formulate the geometric program developed in this work. The geometric program developed in this work optimizes the bandgap source performance and speeds up the design time. The mathematical expressions that describe the bandgap source functioning and specifications were developed and adapted in the geometric program format. The temperature compensation, the PSRR, the current consumption, the area, the output voltage and its variations under the operational tranconductance amplifier offset voltage, and the stability are the main specifications of this type of bandgap reference source and they are included into the geometric program presented in this work. An example of the design using the geometric program formulated in this work, shows the possibility of designing the bandgap source in a few minutes with low errors between the geometric program results and the simulation results.