Thesis (Ph.D.)--University of Adelaide, School of Electrical and Electronic Engineering, 2004. / "December, 2003" Includes bibliographical references (p. 311-348).

Thesis (Ph.D.)--University of Adelaide, School of Electrical and Electronic Engineering, 2005. / Includes bibliographical references (p. 349-379) and index.

Thesis (Ph.D.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2008. / Committee Chair: John Papapolymerou; Committee Chair: Manos Tentzeris; Committee Member: Gordon Stuber; Committee Member: John Cressler; Committee Member: John Z. Zhang; Committee Member: Joy Laskar

The objective of this dissertation is to develop key components of a CMOS heterodyne millimeter-wave receiver front end. Robust designs are necessary to overcome PVT variations as well as modeling inaccuracies, while with minimum power consumption overhead to facilitate low-power radio for portable applications. Heterodyne receiver topology is adopted because of its robust performances at millimeter-wave frequencies. Device models for both passive and active devices are developed and used in the circuit designs in this dissertation. Two low-noise amplifiers (LNAs) are developed in this dissertation. The first LNA features a proposed temperature-compensation biasing technique, which confines the gain variation within 5 dB for temperature variation from -5 to 85 Celsius degree. The measured gain and NF are 21 and 6.5 dB, respectively, for 49-mW power dissipation. The second LNA reveals a design technique to tolerate a low-accuracy model at millimeter-wave frequencies. Both LNAs provide full coverage of the FCC 60-GHz band (57-64 GHz). For the frequency generation circuits, both the IF QVCO and mm-wave VCO are investigated. The inherent bimodal oscillation of QVCOs is analyzed and, for the first time, a systematic measurement technique is proposed to intentionally control the oscillation mode. This technique is further utilized to extend the tuning range of the QVCO, which possesses dual tuning curves without penalty on phase noise. The measurement results of a 13-GHz QVCO in 90-nm CMOS reveals a 21.4% tuning range for continuously tuning from 11.7 to 14.5 GHz. The measured phase noise is -108 dBc/Hz at 1 MHz offset with a core power consumption of 10.8 mW. A millimeter-wave VCO is designed and fabricated in 65-nm CMOS. The VCO is fully characterized under voltage stress to examine the hot-carrier injection effects affecting the performance of a millimeter-wave VCO. The 41.6-47.4 GHz VCO is further integrated into a millimeter-wave down converter. The power-hungry buffer amplifiers are neglected by proper floor planning. Conversion loss of 1.4 dB is obtained with total power consumption of 72.5 mW. Lastly, a power management system consisting of low-dropout (LDO) regulators is designed and integrated in a 90-nm CMOS millimeter-wave transceiver to provide stable and low-noise supply voltages. Voltage variation issues are alleviated by the LDOs.

This research discusses the design, fabrication, integration, and characterization of micromachined millimeter-wave components and a signal source for THz multiplier source using the deep reactive ion etching technique. A wide range of advanced micromachined millimeter-wave components are proposed and fully validated with the measurement. These micromachined millimeter-wave passives include: the W-band straight and meander waveguides, W-band three-pole filter, waveguide hybrid and power divider, a novel CPW-to-waveguide transition and filter, and a novel cavity resonator for 60-GHz reconfigurable applications. The proposed THz multiplier source is a broadband 900-GHz silicon micromachined two-anode frequency tripler with the state-of-the-art performance. The research results enable the silicon micromachining technique to build low-loss and low-cost millimeter-wave components and THz signal sources.

With the growing trend of wireless electronics, frequency spectrum is crowded with different applications. High data transfer rate solutions that operate in license-exempt frequency spectrum range are sought. The most promising candidate is the 60 GHz multi-giga bit transfer rate millimeter wave circuit. In order to provide a cost-effective solution, circuits designed in CMOS are implemented in a single SOC. In this work, a modeling technique created in Cadence shows an error of less than 3dB in magnitude and 5 degree in phase for a single transistor. Additionally, less than 3dB error of power performance for the PA is also verified. At the same time, layout strategies required for millimeter wave front-end circuits are investigated. All of these combined techniques help the design converge to one simulation platform for system level simulation. Another aspect enabling the design as a single SOC lies in integration. In order to integrate digital and analog circuits together, necessary peripheral circuits must be designed. An on-chip voltage regulator, which steps down the analog power supply voltage and is compatible with digital circuits, has been designed and has demonstrated an efficiency of 65 percent with the specific area constraint. The overall output voltage ripple generated is about 2 percent. With the necessary power supply voltage, gate voltage bias circuit designs have been illustrated. They provide feasible solutions in terms of area and power consumption. Temperature and power supply sensitivities are minimized in first two designs. Process variation is further compensated in the third design. The third design demonstrates a powerful solution that each aspect of variations is well within 10%. As the DC conditions are achieved on-chip for both the digital and analog circuits, digital and analog circuits must be connected together with a DAC. A high speed DAC is designed with special layout techniques. It is verified that the DAC can operate at a speed higher than 3 Gbps from the pulse-shaping FIR filter measurement result. With all of these integrated elements and modeling techniques, a high data transfer rate CMOS RF SOC operating at 60 GHz is possible.

Thesis (Ph.D.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2009. / Committee Chair: Gee-Kung Chang; Committee Co-Chair: Jianjun Yu; Committee Member: John A. Buck; Committee Member: Joy Laskar; Committee Member: Umakishore Ramachandran; Committee Member: Ye Li

<p>Flexible printed circuit boards (flex PCBs) are used in a wide range of electronic devices today due to their light weight, bendability, extensive wiring possibilities, and low-cost manufacturing techniques. The general trend in the flex PCB industry is further miniaturization alongside increasing functionality per device and reduced costs. To meet these demands, a new generation of low cost manufacturing technologies is being developed to enable structures with smaller lateral dimensions and higher packing densities.</p><p>Wet etching is today the most cost-efficient method for producing a large number of through-foil structures in flex PCBs. However, conventional wet etch techniques do not allow for through-foil structures with aspect ratios over 1 – a fact that either necessitates thin and mechanically weak foils or puts severe limitations on the packing density. The fabrication techniques presented in this thesis allow for through-foil structures with higher aspect ratios and packing densities using wet etching. To achieve high aspect ratios with wet etching, the flex PCB foils are pre-treated with irradiation by swift heavy ions. Each ion that passes through the foil leaves a track of damaged material which can be subsequently etched to form highly vertical pores. By using conventional flex PCB process techniques on the porous foils, high aspect ratio metallized through-foil structures are demonstrated.</p><p>The resulting structures consist of multiple sub-micrometer sized wires. These structures are superior to their conventional counterparts when it comes to their higher aspect ratios, higher possible packing densities and low metallic cross-section. Furthermore, metallized through-foil structures with larger areas and more complicated geometries are possible without losing the mechanical stability of the foil. This in turn enables applications that are not possible using conventional techniques and structures. In this thesis, two such applications are demonstrated: flex PCB vertical thermopile sensors and substrate integrated waveguides for use in millimeter wave applications.</p>

Flexible printed circuit boards (flex PCBs) are used in a wide range of electronic devices today due to their light weight, bendability, extensive wiring possibilities, and low-cost manufacturing techniques. The general trend in the flex PCB industry is further miniaturization alongside increasing functionality per device and reduced costs. To meet these demands, a new generation of low cost manufacturing technologies is being developed to enable structures with smaller lateral dimensions and higher packing densities. Wet etching is today the most cost-efficient method for producing a large number of through-foil structures in flex PCBs. However, conventional wet etch techniques do not allow for through-foil structures with aspect ratios over 1 – a fact that either necessitates thin and mechanically weak foils or puts severe limitations on the packing density. The fabrication techniques presented in this thesis allow for through-foil structures with higher aspect ratios and packing densities using wet etching. To achieve high aspect ratios with wet etching, the flex PCB foils are pre-treated with irradiation by swift heavy ions. Each ion that passes through the foil leaves a track of damaged material which can be subsequently etched to form highly vertical pores. By using conventional flex PCB process techniques on the porous foils, high aspect ratio metallized through-foil structures are demonstrated. The resulting structures consist of multiple sub-micrometer sized wires. These structures are superior to their conventional counterparts when it comes to their higher aspect ratios, higher possible packing densities and low metallic cross-section. Furthermore, metallized through-foil structures with larger areas and more complicated geometries are possible without losing the mechanical stability of the foil. This in turn enables applications that are not possible using conventional techniques and structures. In this thesis, two such applications are demonstrated: flex PCB vertical thermopile sensors and substrate integrated waveguides for use in millimeter wave applications. / wisenet

This dissertation presents the design and implementation of circuits and transceivers in CMOS technology to enable many new millimeter-wave applications. A simple approach is presented for accurately modeling the millimeter-wave characteristics of transistors that are not fully captured by contemporary parasitic extraction techniques. Next, the integration of a low-power 60-GHz CMOS on-off keying (OOK) receiver in 90-nm CMOS for use in multi-gigabit per second wireless communications is demonstrated. The use of non-coherent OOK demodulation by a novel demodulator enabled a data throughput of 3.5 Gbps and resulted in the lowest power budget (31pJ/bit) for integrated 60-GHz CMOS OOK receivers at the time of publication. Also presented is the design of a high-power, high-efficiency 45-GHz VCO in 45-nm SOI CMOS. The design is a class-E power amplifier placed in a positive feedback configuration. This circuit achieves the highest reported output power (8.2 dBm) and efficiency (15.64%) to date for monolithic silicon-based millimeter-wave VCOs. Results are provided for the standalone VCO as well as after packaging in a liquid crystal polymer (LCP) substrate. In addition, a high-power high-efficiency (5.2 dBm/6.1%) injection locked oscillator is presented. Finally, the design of a 2-channel 45-GHz vector modulator in 45-nm SOI CMOS for LINC transmitters is presented. A zero-power passive IQ generation network and a low-power Gilbert cell modulator are used to enable continuous 360° vector generation. The IC is packaged with a Wilkinson power combiner on LCP and driven by external DACs to demonstrate the first ever 16-QAM generated by outphasing modulation in CMOS in the Q-band.