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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Design Of Operational Amplifiers And Utilizing Sic Jfet For Analog Design

Maralani, Ayden 11 December 2009 (has links)
Demand for capable and reliable semiconductor and fabrication technology for high temperature and power electronics applications has been increasing in recent years. Silicon Carbide (SiC), as a wide bandgap compound semiconductor, demonstrates superior characteristics such as high thermal conductivity, high breakdown voltage, and long-lasting reliable operation at elevated temperature. SiC-based circuits and systems are capable to offer significant performance enhancements to various applications. Integrated power management units and conversion modules in HEVs, integrated sensors for aircraft engines, development of small-sized portable power generators are among many applications that require reliable circuits with long-lasting functional lifetime. Nevertheless, there are numerous challenges associated with the design and fabrication of SiC-based circuits. The aim of this research is to practically design and implement novel operational amplifiers (opamps) based on Vertical Channel 4H-SiC JFET (SiC JFET) that can be utilized as sub-circuits of integrated SiC JFET-based circuits and systems. Recently, SiC power JFET-based power management units were developed that deploy non-SiC JFET-based circuits for analog signal processing, driving, and control, because all SiC JFET-based circuits were not available for full integration. However, utilizing SiC JFET for analog design (in order to close the mentioned gap) exhibits significant design challenges, even at room temperature. These fundamental challenges are low intrinsic gain, the requirement to limit the gate to source voltage range, and restrictions on utilizing channel length as a design parameter due to fabrication complexity. These challenges must be successfully overcome at room temperature, before moving towards high temperature SiC JFET-based analog design. The main objective of this dissertation is to establish a design base, overcome the challenges, demonstrate the feasibility, and present all SiC JFET-based opamps that are designed for gain, CMRR, and overall performance. Before attempting to design, both Enhancement and Depletion Mode SiC JFETs are characterized, analyzed, and modeled for simulation. Unique and reliable opamp configurations are presented that take design requirements into account, use threshold voltage instead of channel length as a design parameter, and employ gain enhancement techniques while obtaining maximum possible bandwidth. The final opamps are fabricated and tested and the results show that the objective is accomplished.
2

High Performance Class-AB Output Stage Operational Amplifiers for Continuous-time Sigma-delta ADC

Krishnan, Lakshminarasimhan 2011 August 1900 (has links)
One of the most critical blocks in a wide-band continuous time sigma delta (CTSD) analog-to-digital converter (ADC) is the loop filter. For most loop filter topologies, the performance of the filter depends largely on the performance of the operational amplifiers (op-amps) used in the filter. The op-amps need to have high linearity, low noise and large gain over a wide bandwidth. In this work, the impact of op-amp parameters like noise and linearity on system level performance of the CTSD ADC is studied, and the design specifications are derived for the op-amps. A new class-AB bias scheme, which is more robust to process variations and has an improved high frequency response over the conventional Monticelli bias scheme, is proposed. A biquadratic filter which forms the input stage of a 5th order low pass CTSD ADC is used as a test bench to characterize the op-amp performance. The proposed class-AB output stage is compared with the class-AB output stage with Monticelli bias scheme and a class-A output stage with bias current reuse. The filter using the new op-amp architecture has lower power consumption than the other two architectures. The proposed class AB bias scheme has better process variation and mismatch tolerance compared to the op-amp that uses conventional bias scheme.
3

Three improved operational amplifiers with low power low voltage

Kuo, Huan-Chou 10 July 2001 (has links)
Three improved operational amplifiers with low voltage and rail-to-rail constant are proposed. Two of the amplifiers are modified from the amplifier with a level shifting circuit. One improved amplifier has fewer devices, higher speed, and reduced area and the other improved amplifier is added an additional adjustable gain. The third amplifier is a floating voltage controlled voltage source (FVCVS) amplifier, which has reduced area and improved frequency response. The first two level shifting operational amplifiers are designed in a 0.5£gm UMC CMOS process. They use about half number of devices. The supply voltage is 1.3V, and the current consumes just only 22.6¢H of the original circuits. The unity gain frequency increases 56.8%. The slew rate, CMRR and PSRR are higher. The 2nd amplifier still has a rail-to-rail constant gm; however, the gm can be adjusted. The third amplifier uses the 0.35£gm UMC CMOS process with 1.2V operating voltage. The gain-bandwidth product is 53.8¢H larger than the original circuits. No frequency compensation is used and the devices are fewer. The results are obtained in HSPICE simulation.
4

Low Voltage Rail-to-Rail Operational Amplifier with High Stability over Temperature Variation

Hong, Ming-Hwa 21 June 2002 (has links)
A rail-to-rail op-amp with high stability over temperature variation at 1-V supply voltage is presented in this thesis. It incorporates a modified CM adapter and a modified bandgap reference. First, the modified CM adapter utilizes a level-shifting technique to shift the input common mode voltage of 0-1 V to the level below 0.1 V. By introducing this circuit as the front-end block of the proposed op-amp, the PMOS differential input stage can be operated appropriately with the rail-to-rail input common mode range. Second, the modified bandgap reference that combines two voltages with opposite temperature coefficients generates a temperature-insensitive bias current to the input stage. Besides, by the technique of cascading a diode with an additional BJT, the junction area of the original diodes can be reduced and in the actual application, fewer parallel-connected BJTs are needed. The two circuits are applied to the proposed op-amp operated at 1-V supply voltage in TSMC 1P4M 0.35£gm CMOS technology. At 25¢J, the dc gain is 78.9 dB and unity-gain bandwidth is 3.73 MHz. The phase margin is 42.9¢X. For the temperature from 0¢J to 75¢J, the frequency response is temperature-insensitive and the dc gain variation is 2dB. The layout view of the proposed op-amp is also presented and the area is 0.2 mm2.
5

Analogové funkční převodníky pro laboratorní výuku / Analog nonlinear function structures for educational laboratory purposes

Filko, Patrik January 2019 (has links)
This master’s thesis deals with the design and the realization of a laboratory teaching device, which includes two-port parts with nonlinear transmission characteristics corresponding to quadratic, inverse quadratic and cubic functions. It also includes a more complicated design of a polynomial function converter that offers students a practical view of functions mathematically designed while verifying their accuracy in laboratory exercises. The whole concept is supported by the design of the power supply circuit and the harmonic signal generator. The individual features of this project are feasible from components commercially available.
6

DEVELOPMENT OF DIGITAL AND MIXED SIGNAL STANDARD CELLS FOR A 0.25µm CMOS PROCESS

MADHUSUDANAN, RAHUL January 2005 (has links)
No description available.
7

Implementing a receiver in a fast data transfer system : A feasibility study

Hall, Filip, Håkansson, Pär January 2003 (has links)
<p>This report is an outcome of a master degree project at Linköpings University in co-operation with Micronic Laser Systems AB. </p><p>The purpose with this master degree project was to investigate how to implement a receiver in a data transfer system. The system consists of several data channels, where every channel consists of three parts: driver, transmission lines and receiver. The driver send low amplitude differential signals via the transmission lines to the receiver that amplifies and converts it to a single-ended signal. The receiver has to be fast and be able to feed an output signal with high voltage swing. It is also needed for the receivers to have low power consumption since they are close to the load, which is sensitive to heat. </p><p>Different amplifier architectures were investigated to find a suitable circuit for the given prerequisites. In this report the advantages and disadvantages of voltage and current feedback are discussed. </p><p>The conclusions of this work are that in a system with an amplifier as a receiver with differential transmission lines, a single operational amplifier cannot be used. An input stage is needed to isolate the feedback net from the inputs of the operational amplifier. When fast rise time and large output swing are wanted the best amplifier architecture is current feedback amplifiers. A current feedback amplifier in CMOS with the required high voltages and slew rate is hard to realize without very high power consumption.</p>
8

Implementing a receiver in a fast data transfer system : A feasibility study

Hall, Filip, Håkansson, Pär January 2003 (has links)
This report is an outcome of a master degree project at Linköpings University in co-operation with Micronic Laser Systems AB. The purpose with this master degree project was to investigate how to implement a receiver in a data transfer system. The system consists of several data channels, where every channel consists of three parts: driver, transmission lines and receiver. The driver send low amplitude differential signals via the transmission lines to the receiver that amplifies and converts it to a single-ended signal. The receiver has to be fast and be able to feed an output signal with high voltage swing. It is also needed for the receivers to have low power consumption since they are close to the load, which is sensitive to heat. Different amplifier architectures were investigated to find a suitable circuit for the given prerequisites. In this report the advantages and disadvantages of voltage and current feedback are discussed. The conclusions of this work are that in a system with an amplifier as a receiver with differential transmission lines, a single operational amplifier cannot be used. An input stage is needed to isolate the feedback net from the inputs of the operational amplifier. When fast rise time and large output swing are wanted the best amplifier architecture is current feedback amplifiers. A current feedback amplifier in CMOS with the required high voltages and slew rate is hard to realize without very high power consumption.
9

Návrh operačního zesilovače s proudovou zpětnou vazbou / Design of a current feedback operational amplifier

Kšica, Radim January 2010 (has links)
This Master`s thesis deals with properties of current feedback operational amplifier. The main goal of this work is creation design process of current feedback operational amplifier by using CMOS technology AMIS 0,7 µm. Next goal of this work is attestation of funciton our design process. Last goal is creation the datasheet of our amplifier.
10

Development of a Simple and Cheap Equipment for monitoring the solar Irradiance on PV modules.

Casanaba, Pablo January 2019 (has links)
Increased use of renewable energies that is taking place all over the world is having a very important impact on the photovoltaic solar energy industry. This means of obtaining electrical energy is one of the most promising ones nowadays, thanks to the fact that it is a technology of easy installation and maintenance. However, the number of hours that a photovoltaic system works at maximum power depends almost entirely on environmental conditions, mainly in terms of solar irradiance.Solar irradiance is a magnitude that measures the power released by sunlight per unit area; the higher it is, the more power the photovoltaic system will generate.Therefore, it is very important to measure this magnitude in order to obtain data that either can give information about which is the best place to install a photovoltaic system or expect the device performance.Unfortunately, sensors used nowadays to measure this magnitude are quite expensive. The most widely used are the so-called pyranometers, with an average cost of between 8000 SEK to 10000 SEK, and solar reference cells, which can be quite cheaper (1000 SEK), but also can be the most expensive devices on the market depending on the features they have (some reference cells cost 20000 SEK).In this thesis, a solar irradiance sensor based on the treatment of a current generated by a silicon photodiode has been designed, built and calibrated. The signal generated by the device is a voltage that has been obtained by means of a current-to-voltage converter amplifier stage. Once the construction of the circuit was completed, it was tested on the roof of Hall 45 located in the University of Gävle. The testing was carried out on 13, 14 and 15 May 2019, and it consisted in the comparison of the signal generated by the new device and the signals generated by a pyranometer and a solar cell.The result is a device priced at 200 SEK, which shows acceptable levels of accuracy during central daylight hours but shows a strong angular dependence on incident light during sunrise and sunset.

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