by Chung-Yuk Or. / Thesis (M.Phil.)--Chinese University of Hong Kong, 1998. / Includes bibliographical references (leaves 95-[98]). / Abstract also in Chinese. / Chapter 1 --- Introduction --- p.1 / Chapter 2 --- Fully Differential CMOS Operational Amplifier Design --- p.4 / Chapter 2.1 --- Wide-Swing Current Mirror --- p.5 / Chapter 2.2 --- Wide-Swing Biasing Network --- p.8 / Chapter 2.3 --- Fully differential folded-cascode operational amplifier --- p.13 / Chapter 2.3.1 --- Small-Signal Analysis --- p.16 / Chapter 2.4 --- Gain-boost technique --- p.18 / Chapter 2.4.1 --- Frequency Response --- p.24 / Chapter 2.5 --- Common-Mode Feedback Network --- p.26 / Chapter 2.5.1 --- Continuous-Time CMFB Circuit --- p.27 / Chapter 2.5.2 --- Discrete-Time CMFB circuit --- p.33 / Chapter 2.6 --- Design Flow of the Operational Amplifier --- p.35 / Chapter 3 --- Physical Design of the Operational Amplifier --- p.39 / Chapter 3.1 --- Layout Level Design --- p.40 / Chapter 3.2 --- Layout Techniques --- p.42 / Chapter 3.3 --- Input Protection Circuitry --- p.47 / Chapter 4 --- Simulation Results --- p.49 / Chapter 4.1 --- Simulation of the Operational Amplifier --- p.49 / Chapter 4.2 --- Simulation of Auxiliary Amplifiers --- p.57 / Chapter 4.3 --- Simulation of the Common-Mode Feedback Circuit --- p.62 / Chapter 5 --- Measurement Results --- p.70 / Chapter 5.1 --- Transient Response Measurement --- p.70 / Chapter 5.2 --- Frequency Response Measurement --- p.74 / Chapter 5.3 --- Power Consumption Measurement --- p.78 / Chapter 5.4 --- Performance Evaluation --- p.81 / Chapter 6 --- Layout Driven Operational Amplifiers Macromodelling --- p.82 / Chapter 6.1 --- Motivations --- p.83 / Chapter 6.2 --- Methodology --- p.84 / Chapter 6.3 --- Macromodelling the operational amplifier --- p.85 / Chapter 6.4 --- Simulation Results --- p.88 / Chapter 6.5 --- Conclusions --- p.92 / Chapter 7 --- Conclusions --- p.93 / Bibliography --- p.95 / A Layout Diagrams and Chip Micrograph --- p.99

Thesis. 1977. Ph.D.--Massachusetts Institute of Technology. Dept. of Mechanical Engineering. / MICROFICHE COPY AVAILABLE IN ARCHIVES AND ENGINEERING. / Vita. / Bibliography: p. 293-295. / Ph.D.

Thesis (M.S.)--Brigham Young University. Dept. of Electrical and Computer Engineering, 2006. / Includes bibliographical references (p. 53-54).

No description available.

No description available.

Thesis (M.S.)--Ohio University, November, 1994. / Title from PDF t.p.

Thesis (Ph. D.)--School of Electrical and Computer Engineering, Georgia Institute of Technology, 2005. Directed by Phillip Allen. / Morley, Thomas, Committee Member ; Leach, Marshall, Committee Member ; Ayazi, Farrokh, Committee Member ; Rincon-Mora, Gabriel, Committee Member ; Allen, Phillip, Committee Chair. Includes bibliographical references.

Thesis (M.Phil.)--Hong Kong University of Science and Technology, 2006. / Includes bibliographical references. Also available in electronic version.

No description available.

Chan Shek-Hang. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2002. / Includes bibliographical references (leaves 94-97). / Abstracts in English and Chinese. / Abstract --- p.i / Acknowledgement --- p.iv / Table of Contents --- p.v / List of Figures --- p.ix / List of Tables --- p.xiii / Chapter Chapter 1 --- Introduction --- p.1 / Chapter 1.1 --- Overview --- p.1 / Chapter 1.2 --- Significance of the research --- p.2 / Chapter 1.3 --- Objectives --- p.3 / Chapter 1.4 --- Thesis outline --- p.4 / Chapter Chapter 2 --- Background theory --- p.5 / Chapter 2.1 --- Introduction --- p.5 / Chapter 2.2 --- Electrical properties of MOS transistors --- p.5 / Chapter 2.2.1 --- Strong inversion --- p.5 / Chapter 2.2.2 --- Weak inversion --- p.6 / Chapter 2.2.3 --- Moderate inversion --- p.8 / Chapter 2.2.4 --- The transistors biased in this work --- p.8 / Chapter 2.3 --- Rail-to-rail signals --- p.8 / Chapter 2.4 --- Rail-to-rail operational amplifier --- p.10 / Chapter 2.4.1 --- Rail-to-rail differential input pairs --- p.10 / Chapter 2.4.1.1 --- Principle --- p.10 / Chapter 2.4.1.2 --- Two stage operational amplifier --- p.13 / Chapter 2.4.2 --- Folded-cascode gain stage --- p.14 / Chapter 2.5 --- The nature of operational amplifier distortion --- p.16 / Chapter 2.5.1 --- The total harmonic distortion --- p.17 / Chapter Chapter 3 --- Constant transconductance rail-to-rail input stage --- p.20 / Chapter 3.1 --- Introduction --- p.20 / Chapter 3.2 --- Review of constant-gm input stage --- p.20 / Chapter 3.2.1 --- Rail-to-rail input stages with current-based gm control --- p.20 / Chapter 3.2.1.1 --- gm controlled by three-times current mirror --- p.21 / Chapter 3.2.1.2 --- gm controlled by square root current control --- p.23 / Chapter 3.2.1.3 --- gm controlled by using current switches only --- p.25 / Chapter 3.2.2 --- Rail-to-rail input stages with voltage-based gm control --- p.28 / Chapter 3.2.2.1 --- gm controlled by an ideal zener diode --- p.28 / Chapter 3.2.2.2 --- gm controlled by two diodes --- p.30 / Chapter 3.2.2.3 --- gm controlled by an electronic zener --- p.31 / Chapter 3.3 --- Conclusion --- p.32 / Chapter Chapter 4 --- Proposed constant transconductance rail-to-rail input stage --- p.34 / Chapter 4.1 --- Introduction --- p.34 / Chapter 4.2 --- Principle of the conventional input stage --- p.35 / Chapter 4.2.1 --- Translinear circuit --- p.35 / Chapter 4.3 --- Previous work --- p.36 / Chapter 4.3.1 --- Input bias circuit --- p.36 / Chapter 4.3.2 --- Weak inversion operation --- p.38 / Chapter 4.3.3 --- Power up problem --- p.43 / Chapter 4.4 --- Operational transconductance amplifier with proposed input biased stage --- p.47 / Chapter 4.4.1 --- Proposed input biased stage architecture --- p.47 / Chapter 4.4.2 --- Proposed input biased stage with 2 gm control circuits --- p.50 / Chapter 4.4.3 --- OTA with proposed input biased stage --- p.51 / Chapter Chapter 5 --- Simulation Results --- p.54 / Chapter 5.1 --- Introduction --- p.54 / Chapter 5.2 --- DC bias simulation --- p.54 / Chapter 5.2.1 --- Total transconductance variation --- p.54 / Chapter 5.2.2 --- Power consumption --- p.56 / Chapter 5.3 --- AC simulation --- p.56 / Chapter 5.3.1 --- Open-loop gain --- p.57 / Chapter 5.3.2 --- Gain-bandwidth product --- p.59 / Chapter 5.3.3 --- Phase margin --- p.59 / Chapter 5.4 --- Transient simulation --- p.60 / Chapter 5.4.1 --- Voltage follower --- p.60 / Chapter 5.4.2 --- Total harmonic distortion --- p.62 / Chapter 5.4.3 --- Step response --- p.65 / Chapter 5.5 --- Conclusion --- p.67 / Chapter Chapter 6 --- Layout Consideration --- p.68 / Chapter 6.1 --- Introduction --- p.68 / Chapter 6.2 --- Substrate tap --- p.68 / Chapter 6.3 --- Input protection circuitry --- p.69 / Chapter 6.4 --- Die micrographs of the OTA --- p.71 / Chapter Chapter 7 --- Measurement Results --- p.74 / Chapter 7.1 --- Introduction --- p.74 / Chapter 7.2 --- DC bias measurement results --- p.74 / Chapter 7.2.1 --- Total transconductance variation --- p.74 / Chapter 7.2.2 --- Power consumption --- p.77 / Chapter 7.3 --- AC measurement results --- p.78 / Chapter 7.3.1 --- Open-loop gain --- p.78 / Chapter 7.3.2 --- Gain-bandwidth product --- p.81 / Chapter 7.3.3 --- Phase margin --- p.81 / Chapter 7.4 --- Transient measurement result --- p.82 / Chapter 7.4.1 --- Voltage follower --- p.82 / Chapter 7.4.2 --- Total harmonic distortion --- p.85 / Chapter 7.4.3 --- Step response --- p.87 / Chapter 7.5 --- Conclusion --- p.88 / Chapter Chapter 8 --- Conclusion --- p.90 / Chapter 8.1 --- Contribution --- p.90 / Chapter 8.2 --- Further development --- p.91 / Chapter Chapter 9 --- Appendix --- p.92 / Chapter Chapter 10 --- Bibliography --- p.94