Thesis (B.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1978. / MICROFICHE COPY AVAILABLE IN ARCHIVES AND ENGINEERING. / Bibliography: leaf 29. / B.S.

Orientador: Prof. Dr. Carlos Eduardo Capovilla / Dissertação (mestrado) - Universidade Federal do ABC, Programa de Pós-Graduação em Engenharia Elétrica, 2014. / Este trabalho propoe o projeto de um ASIC CMOS para o controle direto de potencia de aerogeradores de relut¿ancia variavel atraves de um controlador de modos deslizantes analogico, implementado por um arranjo de amplificadores operacionais. O circuito é projetado a fim de realizar, de maneira mais otimizada possível, 'a funçao matematica necessaria para a execução do controle, processando diretamente o erro de potência e fornecendo o angulo de desligamento das chaves do conversor do gerador, garantindo assim, que a potencia gerada seja igual 'a referência adotada. Os resultados de simulações do ASIC para controle anal'ogico demonstraram excelente desempenho, validando o dispositivo integrado proposto. Por fim 'e apresentado o layout completo do ASIC. / This paper proposes a design of a CMOS ASIC, implemented by CMOS Operational Amplifiers, that performs a direct power control for switched reluctance aerogenerator using a sliding mode controller. The complete circuit is designed in order to carry out, in the most optimal way, the mathematical function which processing directly the power error and supply the turn-off angle to the power system converter. The simulations results of the ASIC showed excellent results in tests, proving to be effective. The ASIC final layout is also presented.

For many high-speed, high-performance circuits, purely differential inputs are needed. This project focuses on building high-speed voltage converters which can transfer a single-ended signal to a purely differential signal, or a differential input signal to a single-ended signal. Operational transconductance amplifier (OTAs) techniques are widely used in high-speed continuous-time integrated analog signal processing (ASP) circuits because resistors, inductors, integrators, buffers, multipliers and filters can be built by OT As and capacitors. Taking advantage of OT As, very-high-speed voltage converters are designed in CMOS technology. These converters can work in a frequency range from DC (OHz) up to lOOMHz and higher, and keep low distortion over a± 0.5V input range. They can replace transformers so that designing fully integrated differential circuits becomes possible. The designs are based on a MOSIS 2μm n-well process. SPICE simulations of these designs are given. The circuit was laid out with MAGIC layout tools and fabricated through MOSIS. The chip was measured at PSU and Intel circuit labs and the experimental results show the correctness of the designs.

Graduation date: 1992

Στην παρούσα διπλωματική εργασία ασχοληθήκαμε με την μελέτη, ανάλυση και εξομοίωση του πιο διαδεδομένου αναλογικού κυκλώματος, του Τελεστικού Ενισχυτή. Αρχικά επιχειρήθηκε μια ανάλυση της επιμέρους δομής ενός Τ.Ε, ενώ παράλληλα γίνεται μια παρουσίαση κάποιων βασικών αναλογικών κυκλωμάτων που χρησιμοποιούνται στον σχεδιασμό του. Ακολούθως επεξηγούνται οι βασικές καθώς και οι προηγμένες επιδόσεις και τεχνικά χαρακτηριστικά του Τ.Ε και δίνονται παραδείγματα για την διασαφήνιση των φαινομένων που τις επηρεάζουν καθώς και των τεχνικών βελτίωσής τους. Σε όλες τις εξομοιώσεις χρησιμοποιήθηκαν EDA (Electronic design automation) tools και η όλη προσέγγιση γίνεται με την χρήση της CMOS τεχνολογίας. Τέλος, παρουσιάζονται οι κατευθύνσεις που τείνει να ακολουθεί σήμερα η τεχνολογία των Τ.Ε. καθώς και θέματα που απασχολούν ή και πρόκειται να απασχολήσουν και στο μέλλον τους σχεδιαστές. / In this Diploma Thesis, I studied, analyzed and simulated today’s most widely used analog circuit block, the Operational Amplifier. In the beginning an analysis of the basic OpAmp structure is presented and various analog circuits that are commonly used during the design process of an OpAmp are described. Then, basic as well as more advanced technical characteristics of the OpΑmp are explained and simulation results are presented to illustrate the phenomena and the parameters that affect the performance of the OpAmp. In simulations EDA (Electronic design automation) tools were used and the whole approach was made with the use of CMOS technology. Concluding, technology trends and issues that designers will face in the future are presented.

Η ανάγκη για εξοικονόμηση ενέργειας δεν θα μπορούσε να αφήσει ανεπηρέαστα τα ηλεκτρονικά κυκλώματα. Έτσι, κατά τον σχεδιασμό ενός σύγχρονου ηλεκτρονικού κυκλώματος γίνεται προσπάθεια για αύξηση της αποδοτικότητας διαχείρισης της ισχύος ώστε να μειωθεί η κατανάλωση και να αυξηθεί η αυτονομία. Ένα από τα πιο γνωστά κυκλώματα που συναντάται στις περισσότερες εφαρμογές της ηλεκτρονικής είτε πρόκειται για αναλογικές είτε για ψηφιακές, είναι αυτό του τελεστικού ενισχυτή. Προς, αυτήν την κατεύθυνση, διάφορες καινοτόμες τοπολογίες έχουν προταθεί για την σύγχρονη ενισχυτική βαθμίδα που σκοπό έχουν την μεγιστοποίηση της αποδοτικότητας διαχείρισης του σήματος, με την ελάχιστη κατανάλωση. Συνεπώς, ένας αποδοτικός τελεστικός ενισχυτής, εκτός από μεγάλο κέρδος σε μεγάλη περιοχή συχνοτήτων, θα πρέπει να παρέχει ταυτόχρονα την ικανότητα διαχείρισης σημάτων με το μέγιστο δυνατό εύρος και την δυνατότητα οδήγησης μεγάλων φορτίων. Κατά συνέπεια, νέες τεχνικές παρουσιάζονται για την διαχείριση του σήματος, τόσο στην είσοδο όσο και στην έξοδο κάτω από συνθήκες χαμηλής τροφοδοσίας. Αυτή η εργασία έχει σαν αντικείμενο την μελέτη των βαθμίδων εισόδου τελεστικών ενισχυτών με εύρος rail-to-rail καθώς και των βαθμίδων εξόδου τάξεως ΑΒ. Μια rail-to-rail βαθμίδα εισόδου, μπορεί να διαχειριστεί την τάση τροφοδοσίας στο έπακρο δεχόμενη σήματα μεγάλου εύρους τάσεων, ενώ η βαθμίδα εξόδου έχει σαν κύριο πλεονέκτημα την γρηγορότερη οδήγηση μεγάλων φορτίων με ελαχιστοποίηση της παραμόρφωσης. Έτσι, στο πρώτο κεφάλαιο παρουσιάζονται οι βασικές αρχές που διέπουν τα κυκλώματα χαμηλής τροφοδοσίας και οι περιορισμοί που πρέπει να ληφθούν υπ’ όψιν κατά τον σχεδιασμό των κυκλωμάτων. Στο δεύτερο κεφάλαιο αυτής της εργασίας παρουσιάζονται οι βασικές αρχές λειτουργίας των rail-to-rail βαθμίδων εισόδου και οι βασικές τεχνικές υλοποίησής τους. Στο τρίτο κεφάλαιο παρουσιάζονται οι βασικές αρχές λειτουργίας των βαθμίδων εξόδου τάξεως ΑΒ με τις αντίστοιχες τεχνικές υλοποίησης. Στα επόμενα κεφάλαια αυτού του συγγράμματος προτείνεται ένας νέος τελεστικός ενισχυτής ο οποίος αποτελείται από μια rail-to-rail βαθμίδα εισόδου και από μία βαθμίδα εξόδου τάξεως ΑΒ ενώ γίνεται χρήση 1V για την τάση τροφοδοσίας. Άλλο ένα πλεονέκτημα της προτεινόμενης αρχιτεκτονικής, είναι αυτό της δυνατότητας ρύθμισης των συνθηκών πόλωσης ώστε να διατηρείται η λειτουργικότητα του ενισχυτή αλλά και να προσαρμόζεται στις εκάστοτε ανάγκες της κάθε εφαρμογής. Πιο συγκεκριμένα ένα από τα πλεονεκτήματα αυτού του τελεστικού ενισχυτή, είναι η δυνατότητα ρύθμισης της διαγωγιμότητας της εισόδου με γραμμικό τρόπο μέσω μιας πηγής ρεύματος. Αντίστοιχα, επιλέγοντας μεγαλύτερο ρεύμα για την βαθμίδα εξόδου υπάρχει η δυνατότητα μείωσης της καθυστέρησης μετάδοσης του σήματος σε μεγάλα φορτία. / A new technique for rail-to-rail input stage is proposed in this Letters. The proposed technique is based on the master-slave approach of complementary MOS transistor pairs. The input transconductance is linearly tunable over a large range and is almost constant for rail-to-rail common-mode range. The effectiveness of the proposed technique was verified by simulations using a standard 0.18μm CMOS process.

Abstract Class A and class AB operational amplifiers are an essential part of a mixed- signal chip, where they are used as active filter sub-blocks, compensators, reference current generators and voltage buffers, to name just a few of many applications. For analog circuits such as operational amplifiers a mixed-signal chip is a very unfriendly operating environment, where the power supply is often corrupted by high current switching circuits. In addition, power supply voltages for analog blocks are shrinking, because of the deployment of new battery technologies and fine line length integrated circuit processes, which can reduce the amplifier dynamic range a problem requiring supply insensitive low voltage compatible amplifier topologies and other analog blocks. The aims of this thesis were to further develop the low voltage compatible class AB amplifier topologies published earlier by other authors, to improve their bandwidth efficiency by means of re-examining two- and three-stage amplifier compensation techniques and to find solutions for enhancing the high frequency power supply noise rejection performance of class A and class AB amplifiers without degrading their signal path stability. The class AB amplifier cores presented here improve the amplifier’s power supply noise insensitivity at high frequencies and increase bandwidth efficiency when compared to the commonly used two-stage Miller compensated amplifier, enabling the construction of better buffers and more power-efficient and reliable low voltage mixed signal chips.

High-performance, high-frequency operational transconductance amplifiers (OTAs) are very important elements in the design of high-frequency continuous-time integrated analog signal processing circuits, because resistors, inductors, integrators, mutators, buffers, multipliers, and filters can be built by OTAs and capacitors. The critical considerations for OTA design are linearity, tuning, frequency response, output impedance, power supply rejection (PSR) and common-mode rejection (CMR). For linearity considerations, two different methods are proposed. One uses cross-coupled pairs (CMOS or NMOS), producing OTAs with very high linearity but either the input range is relatively small or the CMR to asymmetrical inputs is poor. Another employs multiple differential pairs (current addition or subtraction), producing OTAs with high linearity over a very large input range. So, there are tradeoffs among the critical considerations. For different applications, different OTAs should be selected. For consideration of frequency response, the first reported GaAs OTA was designed for achieving very-high-frequency performance, instead of using AC compensation techniques. GaAs is one of the fastest available technologies, but it was new and less mature than silicon when we started the design in 1989. So, there were several issues, such as low output impedance, no P-channel devices, and Schottky clamp. To overcome these problems, new techniques are proposed, and the designed OTA has comparable performance to a CMOS OTA. For PSR and CMR considerations, a fully balanced circuit structure is employed with a common-mode feedback (CMF) circuit used to stabilize the DC output voltages. To reduce the interaction of the operation of CMF and tuning of OTAs, three improved versions of the CMF circuits used in operational amplifiers are proposed. With the designed OTAs, a I GHz GaAs inductor with small parasitics is designed using the proposed procedure to reduce high-frequency effects. Two CMOS high-order, high-frequency filters are designed: one in cascade structure and one in LC ladder form. Also, a 200 MHz third-order elliptic GaAs filter is designed with special consideration of very-high-frequency parasitics. All circuits were fabricated and measured. The experimental results were used to verify the designs.

No description available.

A need for high bandwidth operational amplifiers, or op-amps, exists for certain applications. This need requires research in the area of op-amp bandwidth extension. The proposed method of this thesis uses Negative Capacitance Generation (NCG), which involves using the Miller effect to generate an equivalent negative capacitance at a given node in a circuit, to extend the bandwidth of an op-amp. This is accomplished by first applying NCG to the second stage of an op-amp, in which the op-amp has been compensated using Single Capacitor Miller Compensation (SCMC). Next, the Miller capacitor used to compensate the op-amp can be reduced and thus, the bandwidth of the op-amp is extended. The proposed method employed a 100dB, classic two-stage op-amp with a 7.7MHz gain-bandwidth product (GBW). It was discovered that after applying NCG to several places in the op-amp besides the second stage that the GBW was roughly doubled. The GBW of the second stage was improved by a factor of 9.3. This discrepancy in GBW improvements was researched and certain barriers were discovered. Although the barriers were not eliminated, research in overcoming them and obtaining greater improvements in op-amp bandwidth is encouraging.