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The purpose of this thesis is to research the possibility of realizing hardware support for hybrid single electron transistor (SET)-CMOS circuits by a systematic approach of design, analysis and simulation. The metallic SET transistors considered in this work are fabricated within the chip interconnect layers using CMOS back-end-of-line (BEOL)-compatible processing. The CMOS process integration can be divided into front-end-of-line (FEOL) and BEOL processes. The FEOL includes processes required to form isolated CMOS transistors whereas BEOL is the second portion of the IC fabrication where the devices get interconnected through the wiring using multiple layers of dielectrics and metals. Therefore, metallic SET circuits can be easily stacked above the CMOS platform presenting a low cost, low thermal budget, improving the overall yield at high-volume production of highly integrated systems. This considerably decreases the interconnect parasitics and increases the density of functions while maintaining the overall acceptable performance. Many problems such as low current drivability, delay and small voltage gain that hinder SET technology for its implementation in integrated circuits can be alleviated by intelligent circuit design. Although a complete replacement of CMOS by SETs is unlikely in the near future, an augmentation of CMOS with SETs is desirable if interfacing from and to CMOS works well. Interfacing from CMOS to SET circuitry is simple as the current and voltage levels are small and in accessible range. But interfacing CMOS from SET circuits is delicate due to SET logic's low current driving capability for CMOS and its interconnect. There is no concrete research on the interface issue wherein a SET-only circuitry drives a CMOS and its interconnects. For such hybridization to become possible, it is necessary to demonstrate the SET logic driving capability for CMOS with sufficient current drive and output voltage. The core SET logic can be designed to operate at low voltage, but at the interface the output of the SET logic must be in a voltage range that can be fed to a CMOS input for proper logic functionality. It is hence necessary to develop and adopt a systematic design methodology for such hybrid circuits at a specific technology node for room temperature operation. In this thesis we will look at a generalized design methodology that can be applied to (a) develop a fabrication model with parasitic effect of a hybrid SET-CMOS and SET-only circuits, (b) design and analyze the SET based fundamental building block in hybrid SET-CMOS or SET-only circuit and (c) simulate such a circuitry to assess its merits. More specifically, we will address the interfacing issue of such hybrid circuits in which we exploit the maximum capability of a SET logic in terms of driving capability, voltage response and power for a room temperature operation. The result of this research motivates the application of SET logic in 2 stages realizing some properties beyond those of CMOS devices. The first stage is the heterogeneous integration at chip level around a CMOS core. In such a circuitry, the SET introduces new functionalities such as reconfigurable logic, random number-based circuits, and multiband filtering circuits that can be combined with CMOS based general purpose processors or I/O signal restoration. The second stage of application is to use a new information processing technology focussed on a "new switch" exploiting a new state variable to provide functional scaling substantially beyond that attainable solely with ultimately scaled CMOS.

The explosive growth of wireless communication market has led the development of low-cost, highly-integrated wireless communication systems. Even though most blocks in the front-end have successfully been integrated by using the CMOS technology, it is still a formidable challenge to integrate the entire front-end. Thus, the objective of this research is to demonstrate the feasibility of the integrated front-end by using improved circuit techniques as well as the improved process technologies. This dissertation proposes an improved control scheme to enhance the high-power handling capability of an antenna switch. As a part of this research, an antenna switch controller for a GaAs antenna switch was first developed to enhance the performances of the GaAs antenna switch by using the boosted control voltage. To enhance the efficiency of the front-end, efficiency improvement techniques for the antenna switch controller has also been studied. With the suggested efficiency improvement techniques, a fully-integrated antenna switch was implemented using the SOI technology, and exceeding performances over many commercial products for watt-level high-power applications have been successfully demonstrated. As an effort to improve the efficiency of a power amplifier, a linear envelope detector was also implemented, and the results show that the envelope detector is suitable for dynamic biasing of the power amplifier. The research presented in this dissertation, thus, provides a low-cost and high-performance solution for highly-integrated RF front-end used in various wireless communication systems.

A need for high bandwidth operational amplifiers, or op-amps, exists for certain applications. This need requires research in the area of op-amp bandwidth extension. The proposed method of this thesis uses Negative Capacitance Generation (NCG), which involves using the Miller effect to generate an equivalent negative capacitance at a given node in a circuit, to extend the bandwidth of an op-amp. This is accomplished by first applying NCG to the second stage of an op-amp, in which the op-amp has been compensated using Single Capacitor Miller Compensation (SCMC). Next, the Miller capacitor used to compensate the op-amp can be reduced and thus, the bandwidth of the op-amp is extended. The proposed method employed a 100dB, classic two-stage op-amp with a 7.7MHz gain-bandwidth product (GBW). It was discovered that after applying NCG to several places in the op-amp besides the second stage that the GBW was roughly doubled. The GBW of the second stage was improved by a factor of 9.3. This discrepancy in GBW improvements was researched and certain barriers were discovered. Although the barriers were not eliminated, research in overcoming them and obtaining greater improvements in op-amp bandwidth is encouraging.

Osciladores Controlados por Tensão (VCOs - Voltage-Controlled Oscillators) são circuitos de grande importância em sistemas de comunicação por radiofrequência atuais. Muitos trabalhos de pesquisa recentes têm focado no desenvolvimento de VCOs para aplicações em uma faixa muito grande de frequências (isto é, suportando amplo tunning range). O desenvolvimento de VCOs com uma ampla faixa de sintonia tem motivação na abertura de bandas de frequência, que até pouco tempo estavam licenciadas apenas para usos específicos, porém agora estão também abertas para a utilização de sistemas de rádios cognitivos. A ideia é que o rádio cognitivo tenha recursos para detectar se um canal (ou faixa de frequência) está sendo usado e, em caso de o canal não estar sendo usado, o rádio cognitivo deve se reconfigurar para operar nesse canal. Desse modo, os rádios cognitivos devem possuir um alto grau de reconfigurabilidade, de forma que possam operar em uma faixa muito ampla de frequências. Esse requisito exige o uso de de VCOs com um amplo tunning range. Este trabalho apresenta um projeto completo de um LC-VCO com uma larga faixa de frequência de operação (widedand). Um amplo tunning range foi obtido a partir do chaveamento (ou programação) do valor da capacitância total do tanque-LC do VCO, gerando assim várias sub-bandas de frequência. O ganho do VCO (KVCO) manteve-se com pequenas variações para todas as subbandas de frequência, com um valor médio de 88.6MHz, sendo 112MHz e 80MHz os valores máximo e mínimo, respectivamente. O ruído de fase variou de -118.4dBc/Hz a -107.4dBc/Hz para as portadores em 3.7GHz e 8.1GHz, respectivamente, enquanto que a potência dissipada do circuito LC-VCO variou de 1.8mW a 5.6mW para todo o tunning range. Para a figura de mérito power-frequency-tunning-normalized (FOMPFTN), os valores obtidos foram na faixa 3.1dB e 11.2dB, comparáveis com a maioria dos trabalhos publicados na área. / Voltage-Controlled Oscillators (VCOs) are very important circuits in current radio frequency communication systems. Much research has been focused recently on developing wideband VCOs in CMOS. The motivation on wideband VCOs is based on the opening of frequency bands, which until recently were licensed for specific uses, for use by cognitive radio systems. The idea is that cognitive radio must have the ability to detect whether a channel (or frequency band) is being used and if the channel is not being used, the cognitive radio must reconfigure itself to operate on that channel. Thus, cognitive radios should possess a high degree of reconfigurability, so that they can operate in a very wide frequency range. This requires the use of VCOs with a wide tunning range. This work presents a complete design of a LC-VCO with a wide operating frequency range (widedand). A wide tunning range has been obtained from the switching (or programming) the value of the total capacitance of the LC-tank of the VCO, thereby generating multiple frequency sub-bands. The VCO gain (KVCO) was maintained with small variations for all frequency sub-bands, with an average value of 88.6MHz, with 80MHz and 112MHz for the minimum and maximum values, respectively. The phase noise ranged from -118.4dBc/Hz to -107.4dBc/Hz for carriers at 3.7GHz and 8.1GHz, respectively, while the power dissipated in the LC-VCO circuit ranged from 1.8mW to 5.6mW for all tunning range. For the figure of merit power-frequency-tuning-normalized (FOMPFTN), the results were in the 3.1dB to 11.2dB range, comparable to most recently published works.

<p>The non-overlapping clock signal generator circuits are key elements in switched capacitor circuits since non-overlapping clock signals are generally required. Non-overlapping clock signals means signals running at the same frequency and there is a time between the pulses that none of them is high. This time (when both pulses are logic 0) takes place when the pulses are switching from logic 1 to logic 0 or from logic 0 to logic 1. In this thesis this type of clock signal generators are analyzed and designed for different requirements on the switched capacitor (S/C) circuits. Different analytical models for the delay in CMOS inverters are studied. The clock generators for digital circuits based on phase-locked loop and delay-locked loop are also studied. An algorithm, which can automatically size the non-overlapping clock generator circuits, was implemented.</p>

The non-overlapping clock signal generator circuits are key elements in switched capacitor circuits since non-overlapping clock signals are generally required. Non-overlapping clock signals means signals running at the same frequency and there is a time between the pulses that none of them is high. This time (when both pulses are logic 0) takes place when the pulses are switching from logic 1 to logic 0 or from logic 0 to logic 1. In this thesis this type of clock signal generators are analyzed and designed for different requirements on the switched capacitor (S/C) circuits. Different analytical models for the delay in CMOS inverters are studied. The clock generators for digital circuits based on phase-locked loop and delay-locked loop are also studied. An algorithm, which can automatically size the non-overlapping clock generator circuits, was implemented.

Spin torque oscillators (STOs) are microwave oscillators with an attractive blend of features, including a more-than-octave tunability, GHz operating frequencies, nanoscale size, nanosecond switching speed and full compatibility with CMOS technology. Over the past decade, STOs' physical phenomena have been explored to a greater extent, their performance has been further improved, and STOs have already shown great potential for a wide range of applications, from microwave sources and detectors to neuromorphic computing. This thesis is devoted to promoting the STO technology towards its applications, by means of implementing the STO's electrical model, dedicated CMOS integrated circuits (ICs), and STO-CMOS IC integration. An electrical model, which can capture magnetic tunnel junction (MTJ) STO's characteristics, while enabling system- and circuit-level designs and performance evaluations, is of great importance for the development of MTJ STO-based applications. A comprehensive and compact analytical model, which is based on macrospin approximations and can fulfill the aforementioned requirements, is proposed. This model is fully implemented in Verilog-A, and can be used for efficient simulations of various MTJ STOs. Moreover, an accurate phase noise generation approach, which ensures a reliable model, is proposed and successfully used in the Verilog-A model implementation. The model is experimentally validated by three different MTJ STOs under different bias conditions. CMOS circuits, which can enhance the limited output power of MTJ STOs to levels that are required in different applications, are proposed, implemented and tested. A novel balun-low noise amplifier (LNA), which can offer sufficient gain, bandwidth and linearity for MTJ STO-based magnetic field sensing applications, is proposed. Additionally, a wideband amplifier, which can be connected to an MTJ STO to form a highly-tunable microwave oscillator in a phase-locked loop (PLL), is also proposed. The measurement results demonstrate that the proposed circuits can be used to develop MTJ STO-based magnetic field sensing and microwave source applications. The investigation of possible STO-CMOS IC integration approaches demonstrates that the wire-bonding-based integration is the most suitable approach. Therefore, a giant magnetoresistance (GMR) STO is integrated with its dedicated CMOS IC, which provides the necessary functions, using the wire-bonding-based approach. The RF characterization of the integrated GMR STO-CMOS IC system under different magnetic fields and DC currents shows that such an integration can eliminate wave reflections. These findings open the possibility of using GMR STOs in magnetic field sensing and microwave source applications. / <p>QC 20151112</p>

Osciladores Controlados por Tensão (VCOs - Voltage-Controlled Oscillators) são circuitos de grande importância em sistemas de comunicação por radiofrequência atuais. Muitos trabalhos de pesquisa recentes têm focado no desenvolvimento de VCOs para aplicações em uma faixa muito grande de frequências (isto é, suportando amplo tunning range). O desenvolvimento de VCOs com uma ampla faixa de sintonia tem motivação na abertura de bandas de frequência, que até pouco tempo estavam licenciadas apenas para usos específicos, porém agora estão também abertas para a utilização de sistemas de rádios cognitivos. A ideia é que o rádio cognitivo tenha recursos para detectar se um canal (ou faixa de frequência) está sendo usado e, em caso de o canal não estar sendo usado, o rádio cognitivo deve se reconfigurar para operar nesse canal. Desse modo, os rádios cognitivos devem possuir um alto grau de reconfigurabilidade, de forma que possam operar em uma faixa muito ampla de frequências. Esse requisito exige o uso de de VCOs com um amplo tunning range. Este trabalho apresenta um projeto completo de um LC-VCO com uma larga faixa de frequência de operação (widedand). Um amplo tunning range foi obtido a partir do chaveamento (ou programação) do valor da capacitância total do tanque-LC do VCO, gerando assim várias sub-bandas de frequência. O ganho do VCO (KVCO) manteve-se com pequenas variações para todas as subbandas de frequência, com um valor médio de 88.6MHz, sendo 112MHz e 80MHz os valores máximo e mínimo, respectivamente. O ruído de fase variou de -118.4dBc/Hz a -107.4dBc/Hz para as portadores em 3.7GHz e 8.1GHz, respectivamente, enquanto que a potência dissipada do circuito LC-VCO variou de 1.8mW a 5.6mW para todo o tunning range. Para a figura de mérito power-frequency-tunning-normalized (FOMPFTN), os valores obtidos foram na faixa 3.1dB e 11.2dB, comparáveis com a maioria dos trabalhos publicados na área. / Voltage-Controlled Oscillators (VCOs) are very important circuits in current radio frequency communication systems. Much research has been focused recently on developing wideband VCOs in CMOS. The motivation on wideband VCOs is based on the opening of frequency bands, which until recently were licensed for specific uses, for use by cognitive radio systems. The idea is that cognitive radio must have the ability to detect whether a channel (or frequency band) is being used and if the channel is not being used, the cognitive radio must reconfigure itself to operate on that channel. Thus, cognitive radios should possess a high degree of reconfigurability, so that they can operate in a very wide frequency range. This requires the use of VCOs with a wide tunning range. This work presents a complete design of a LC-VCO with a wide operating frequency range (widedand). A wide tunning range has been obtained from the switching (or programming) the value of the total capacitance of the LC-tank of the VCO, thereby generating multiple frequency sub-bands. The VCO gain (KVCO) was maintained with small variations for all frequency sub-bands, with an average value of 88.6MHz, with 80MHz and 112MHz for the minimum and maximum values, respectively. The phase noise ranged from -118.4dBc/Hz to -107.4dBc/Hz for carriers at 3.7GHz and 8.1GHz, respectively, while the power dissipated in the LC-VCO circuit ranged from 1.8mW to 5.6mW for all tunning range. For the figure of merit power-frequency-tuning-normalized (FOMPFTN), the results were in the 3.1dB to 11.2dB range, comparable to most recently published works.

Osciladores Controlados por Tensão (VCOs - Voltage-Controlled Oscillators) são circuitos de grande importância em sistemas de comunicação por radiofrequência atuais. Muitos trabalhos de pesquisa recentes têm focado no desenvolvimento de VCOs para aplicações em uma faixa muito grande de frequências (isto é, suportando amplo tunning range). O desenvolvimento de VCOs com uma ampla faixa de sintonia tem motivação na abertura de bandas de frequência, que até pouco tempo estavam licenciadas apenas para usos específicos, porém agora estão também abertas para a utilização de sistemas de rádios cognitivos. A ideia é que o rádio cognitivo tenha recursos para detectar se um canal (ou faixa de frequência) está sendo usado e, em caso de o canal não estar sendo usado, o rádio cognitivo deve se reconfigurar para operar nesse canal. Desse modo, os rádios cognitivos devem possuir um alto grau de reconfigurabilidade, de forma que possam operar em uma faixa muito ampla de frequências. Esse requisito exige o uso de de VCOs com um amplo tunning range. Este trabalho apresenta um projeto completo de um LC-VCO com uma larga faixa de frequência de operação (widedand). Um amplo tunning range foi obtido a partir do chaveamento (ou programação) do valor da capacitância total do tanque-LC do VCO, gerando assim várias sub-bandas de frequência. O ganho do VCO (KVCO) manteve-se com pequenas variações para todas as subbandas de frequência, com um valor médio de 88.6MHz, sendo 112MHz e 80MHz os valores máximo e mínimo, respectivamente. O ruído de fase variou de -118.4dBc/Hz a -107.4dBc/Hz para as portadores em 3.7GHz e 8.1GHz, respectivamente, enquanto que a potência dissipada do circuito LC-VCO variou de 1.8mW a 5.6mW para todo o tunning range. Para a figura de mérito power-frequency-tunning-normalized (FOMPFTN), os valores obtidos foram na faixa 3.1dB e 11.2dB, comparáveis com a maioria dos trabalhos publicados na área. / Voltage-Controlled Oscillators (VCOs) are very important circuits in current radio frequency communication systems. Much research has been focused recently on developing wideband VCOs in CMOS. The motivation on wideband VCOs is based on the opening of frequency bands, which until recently were licensed for specific uses, for use by cognitive radio systems. The idea is that cognitive radio must have the ability to detect whether a channel (or frequency band) is being used and if the channel is not being used, the cognitive radio must reconfigure itself to operate on that channel. Thus, cognitive radios should possess a high degree of reconfigurability, so that they can operate in a very wide frequency range. This requires the use of VCOs with a wide tunning range. This work presents a complete design of a LC-VCO with a wide operating frequency range (widedand). A wide tunning range has been obtained from the switching (or programming) the value of the total capacitance of the LC-tank of the VCO, thereby generating multiple frequency sub-bands. The VCO gain (KVCO) was maintained with small variations for all frequency sub-bands, with an average value of 88.6MHz, with 80MHz and 112MHz for the minimum and maximum values, respectively. The phase noise ranged from -118.4dBc/Hz to -107.4dBc/Hz for carriers at 3.7GHz and 8.1GHz, respectively, while the power dissipated in the LC-VCO circuit ranged from 1.8mW to 5.6mW for all tunning range. For the figure of merit power-frequency-tuning-normalized (FOMPFTN), the results were in the 3.1dB to 11.2dB range, comparable to most recently published works.