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La amplificación de señales encuentra diversas aplicaciones en dispositivos de audio, video, instrumentación, entre otras. Existen distintos parámetros que cuantifican el desempeño de un amplificador, aunque la eficiencia en la conversión de potencia es muy importante tanto en dispositivos portátiles como en aplicaciones de alta potencia. Los amplificadores conmutados (clase D) tienen una eficiencia máxima teórica del 100% y es principalmente por esto que encuentran cada vez más aplicaciones. Para poder utilizar etapas conmutadas es necesario modular las señales antes del proceso de amplificación propiamente dicho. El esquema de modulación define no sólo la calidad de la señal resultante, sino también parámetros ligados a la etapa de potencia como por ejemplo la velocidad de conmutación y la complejidad del circuito demodulador. La modulación por ancho de pulsos es de fácil implementación y la más usada en los últimos años, sin embargo no es posible obtener señales libres de distorsión en una banda específica. Además la implementación digital introduce importantes productos de distorsión en la banda de interés lo que complica considerablemente el esquema de modulación original para obtener resultados razonables. Una alternativa a la modulación por ancho de pulsos es la denominada modulación click. Este esquema permite obtener señales binarias, aptas para manejar etapas conmutadas, con alta pureza espectral y libres de distorsión. Sin embargo esta técnica fue desarrollada enteramente para señales de tiempo continuo y tiene problemas difíciles de resolver en su versión de tiempo discreto que, sumados a su alta complejidad, han postergado su uso comercial. Esta Tesis se centra en el desarrollo de un modulador enteramente discreto. La arquitectura aquí presentada permite obtener señales binarias con banda base separada y libres de distorsión partiendo de señales muestreadas. Aunque la técnica se basa principalmente en el esquema del modulador click de tiempo continuo, se introducen numerosos cambios y mejoras que permiten el desarrollo de una estructura de cálculo íntegramente digital, haciendo que la modulación de señales en tiempo discreto y sin distorsión se convierta en un objetivo alcanzable. / Signal amplification has a wide variety of applications ranging from audio, video and even instrumentation devices. Many parameters are used to define the performance of an amplifier, although one of the most important is the efficiency in the energy conversion process for both mobile and high-power devices. Switching amplifiers (class-D) are perfect for this task because of their high efficiency, 100 % theoretically, and that is the main reason that have increased their widespread use over the last years. The signal has to be modulated to drive a switching-mode amplification stage. The modulation process not only dictates the achievable quality of the modulated signal, it also sets some parameters of the power stage such as the switching rate and the complexity of the demodulation circuit. Pulse width modulation is one of the most widely used modulation techniques because it is very simple to implement, however it is impossible to completely avoid distortion problems on a given frequency band. Moreover, its digital counterpart suffers from intermodulation products in the baseband that are difficult to remove unless additional processing capabilities are added. Click modulation is an interesting alternative to pulse width modulation. Using this method it is possible to generate binary signals without any distortion components on a user-defined frequency band. Despite its obvious advantage, click modulation was designed to work with continuous-time signals. Its discrete-time version suffers from aliasing and distortion if it is not properly implemented which, added to the fact that it is a complex and computationally-intensive algorithm, has postponed its widespread used over other modulation techniques. This Thesis focuses on the development of an entirely digital click modulator. The proposed architecture allows obtaining binary signals with separated baseband and free of distortion, using discrete-time signals and transforms. Although it is based in the continuous-time click modulator, many changes and improvements are added and as a result an entirely digital modulator is presented which makes discrete-time, distortion-free signal modulation an achievable objective.

Submitted by Emanuel Varela Cardoso (emanuel.varela@ufcg.edu.br) on 2018-05-08T00:11:48Z No. of bitstreams: 1 NAYARA BRANDÃO DE FREITAS – DISSERTAÇÃO (PPGEE) 2016.pdf: 3718233 bytes, checksum: f4f88b8a316139fc246558ded5f688d9 (MD5) / Made available in DSpace on 2018-05-08T00:11:48Z (GMT). No. of bitstreams: 1 NAYARA BRANDÃO DE FREITAS – DISSERTAÇÃO (PPGEE) 2016.pdf: 3718233 bytes, checksum: f4f88b8a316139fc246558ded5f688d9 (MD5) Previous issue date: 2016-06-23 / O tema desenvolvido consiste no estudo, caracterização e análise de conversores multiníveis CA/CC/CA monofásicos/monofásicos, monofásicos/bifásicos e monofásicos/trifásicos aplicados a sistemas de conversão e compensação de energia, empregando IGBTs (Transistor Bipolar de Porta isolada) como dispositivos semicondutores. No decorrer do trabalho, diversas topologias são analisadas e comparadas utilizados critérios como quantidade de barramentos CC, valores das tensões dos barramentos CC, WTHD (Distorção Harmônica Total Ponderada) das tensões chaveadas, frequências de chaveamentos dos IGBTs e perdas por condução e chaveamento. Os sistemas de controle das variáveis dos conversores estudados são apresentados e o controle individual dos barramentos CC é abordado com destaque. Implementações experimentais foram utilizadas para comprovar a teoria apresentada e mostrar a viabilidade dos sistemas. / This work consists in the study, characterization, anda analysis of AC/DC/AC multilevel converters are applied to conversion and compensation systems and employ and IGBTs (Insulated Gate Bipolar Transistor) as power semiconductor device. Many topologies are analyzed and compared considering the number of DC-links, DC-links voltages values, WTHDs (Weighted Total Harmonic Distortion) of the generated voltages, and semiconductors conduction and switching losses. The control systems of the studied converters are presented and the individual control of the DC-links voltages in highlighted. Experimental results are provided in order to prove the theoretical results and the viability of the systems.

A novel hybrid pulse-width modulation (PWM) update method is proposed to eliminate the effect of the one-step control time delay Td one without losing the full duty cycle range. Without the Td one to cause linear phase shifts that limit the control bandwidth and affect closed-loop stability, a very high quality digital current control can be achieved, such as a high closed current loop bandwidth, strong robustness against disturbances, ability to reach a very high fundamental frequency compared to switching frequency, etc. In a conventional digital control implementation, a sampling period (Tsamp) is allocated for the execution of samplings and computations, and the update of PWM outputs is delayed until the beginning of the following sampling period. This delayed PWM update method is the cause of the Td one. Instead of the delayed PWM update, if the PWM outputs are updated immediately after algorithm computations, then the effect of the Td one can be eliminated; however, the computation time delay Td comp from the current sampling instant through algorithm computations to the PWM update instant causes a reduced duty cycle range. Each of these two conventional PWM update methods has some shortcomings. A hybrid PWM update method is proposed to circumvent the aforementioned shortcomings and to incorporate only the advantages. The proposed method improves the performance by updating the PWM outputs multiple times during a Tsamp, whereas the PWM outputs are updated only one time during a Tsamp in the conventional methods. In spite of the simplicity of the proposed method, the performance improvements in stability, robustness and response characteristics are significant. On the other hand, the proposed method can be easily applied to many PWM based digital controls because of its simplicity. Additional to the hybrid PWM update method, a hybrid control method is proposed to optimize the sequence of control operations. It maximizes the current loops' robustness and minimizes the delay from the sampling of outer control loops' variables, such as voltage and speed, to the duty cycle update instant. The minimum delay enables the maximization of the outer control loops' bandwidth. Additionally, a corrective neutral offset voltage injection method is proposed to correct small PWM output deviations that may occur with the hybrid PWM update method. Utilizing a three-phase voltage source inverter with a permanent magnet synchronous machine as the platform, a deadbeat current control and a high speed ac drive experiments have been conducted to demonstrate the feasibility and validity. Notable results include a closed current loop response of one Tsamp with the deadbeat control and a 500 Hz current fundamental frequency with 1 kHz switching frequency in the high speed ac drive. / Ph. D. / A novel hybrid pulse-width modulation (PWM) update method is proposed to improve the performance of power electronics applications. PWM is a modulation technique that is typically used in power electronics to encode a control signal. A delayed PWM update method and an immediate PWM update method are two conventional PWM update methods, and each of these conventional methods has shortcomings. The delayed PWM update method, as the name implies, delays the update of PWM outputs until the beginning of next cycle. This delayed update ensures that PWM signals have the full range; however, it causes an update delay in control loops, which degrades the control loops’ response speed. On the other hand, the immediate PWM update method, as the name implies, the update of PWM outputs is executed as soon as the control signals are available to be updated. This immediate update eliminates the update delay, but it loses the full range of PWM signals. The hybrid PWM update method is proposed to combine the delayed and immediate PWM update methods, in which the combination can eliminate the update delay without the loss of the full signal range. The proposed method is quite simple; however, the performance improvements in stability, robustness, and response characteristics are significant. On the other hand, the proposed method can be easily applied to many PWM based digital controls because of its simplicity. The proposed method is implemented on a three-phase voltage source inverter with a permanent magnet synchronous machine, and the feasibility and validity are demonstrated with a deadbeat current control algorithm and a high speed ac drive experiment. In the experiments, a very high quality digital current control is achieved, such as a high closed current loop bandwidth, strong robustness against disturbances, ability to reach a very high fundamental frequency compared to switching frequency, etc.

Master of Science / Department of Electrical and Computer Engineering / Behrooz Mirafzal / In this thesis, a modified version of the phasor pulse width modulation (PPWM) switching method for use in a single-stage three-phase boost inverter is presented. Because of the required narrow pulses in the PPWM method and limitations in controller resolution, e.g. dSPACE, the desired switching pattern for a boost inverter requires a costly processor. A low resolution processor can cause pulse dropping which results in some asymmetric conditions in output waveforms of the boost inverter and therefore, an increase in the THD of the output waveform. In order to solve this problem, a new switching pattern is developed which guarantees symmetric conditions in the switching pattern by discretizing the switching pattern in every switching cycle. This switching pattern has been applied to a boost inverter model developed by SimPowerSystems toolbox of MATLAB/Simulink. The model has been simulated in a wide range of input DC voltage and load. Moreover, a laboratory-scaled three-phase boost inverter has been designed, built, and tested using an identical switching pattern in the same input voltage and load range. Both simulation and experimental results confirm the effectiveness of the new switching pattern.

Made available in DSpace on 2014-06-12T17:40:20Z (GMT). No. of bitstreams: 2 arquivo7011_1.pdf: 2413254 bytes, checksum: 70d29a97538ad63118aee52e1b7c7e23 (MD5) license.txt: 1748 bytes, checksum: 8a4605be74aa9ea9d79846c1fba20a33 (MD5) Previous issue date: 2003 / As perspectivas de um grande número de acessos de turbinas eólicas ao sistema elétrico brasileiro incentivaram estudos sobre os controles desses geradores e os impactos que causarão na rede elétrica. Este trabalho, dividido em duas etapas, contempla o estudo de técnicas de controle de geradores de indução, com rotor tipo gaiola ou bobinado, quando acionados por turbinas eólicas, conectados à rede ou isolados. Na primeira etapa, são desenvolvidos os algoritmos de simulação. São analisadas as conexões à rede de aerogeradores com estator diretamente ligado a ela ou duplamente alimentados, com o uso de rotor bobinado. Também é estudado o uso isolado do gerador com rotor tipo gaiola. Na segunda etapa, são apresentados os ensaios realizados em uma montagem, que simula um conjunto de aerogeração isolada, alimentando uma carga CC. Todo o trabalho busca analisar estratégias para controle instantâneo das potências ativa e reativa geradas pela máquina de indução. Para o acionamento das máquinas, são escolhidas as técnicas de controle vetorial, incluindo orientação pelo fluxo da máquina, usando o método direto e alimentação em corrente. Por fim, são apresentados e analisados os resultados dos casos de simulação com conexão à rede elétrica e comparados os resultados das simulações do uso isolado do gerador com o experimental

In the 2010, targets of National Science and Technology Program - Energy¡¥s project plan had mentioned about the development of power line communication (PLC). This shows the importance of PLC. The data transmission occur burst errors easily by the noise interference from the environment. In order to reduce the error rate, we design a modulation/demodulation chip with error correctable and high error detected ability for power line communication in this thesis. The proposed design consists of Cyclic Redundancy Check (CRC), Pulse Width Modulation (PWM), Frequency Shift Keying (FSK), Forward Error Correction (i.e. binary BCH code), and interleaving techniques. The CRC can detect the errors occurred in the digital communication. The probability of finding error is 99.997%. The BCH code is capable of correcting any combination of 3 or fewer errors in block. The function of PWM is to generate the digital pulses that exhibit the changeable pulse width according to the swing of the input voltage. In the telecommunication, FSK is a frequency modulation scheme such that the digital information can be transmitted through the discrete frequency changes of the carrier. Interleaving can make burst errors look like random errors. The design is implemented TSMC 0.18£gm process. The fabricated chip area is 1.16 millimeter square with 3.3V/1.8V supply voltages. The measured data shows that the proposed design is fully functional and consumes 55.5 £gW.

This thesis focuses on compact brushless DC fan motor, drive circuit structure of motor is proposed, several functions such as output low current limit circuit and low rotation speed limit are added in order to increase robustness of drive circuit. Besides, speed feedback controller is used to solve several problems such as high frequency full speed exciting noise and high power dissipation which occurs in open loop rotation speed control circuit.With regard to BLDC fan motors generally use Hall sensor to detect rotor position, this research proposes sensorless control technology for the purpose of reducing circuit cost and motor size.

This thesis focues on the realization of small size brushless DC fan motor driving circuit, adding the protection circuit of commutation to H bridge, in addition, the function of low current limiter, and slow rotation speed limiter are also implemented to the more stable rotation. With regard to the strategy of rotation speed control, we use speed feedback controller to slove noise problem which occurs in high frequency full speed excited and adopt thermistor accompanied with the voltage divided circuit to achieve speed control with temperature. Finally, for the sake of reducing the cost and shrinking the size of system, the design of sensorless mode is proposed and the rotation speed control system is realized under sensorless mode.

The aim of this work is to familiarize with the design of the thermal test chamber to measuring passive components. Show features and involvement of selected circuits that ensure reliable operation of the device. For the realization of the role are the most important the Peltier cells and temperature sensors. But they can not work without the control unit. The control unit provides the necessary communication with each component and also with user. For this purpose we made a selection of suitable type of microcontroller and communication equipment (matrix keypad, LCD, buttons and LEDs). Subsequently was designed the algorithm to control the thermostat suitable for using in students training. The algorithm was written in the microcontroller in form of a program. There is also implemented a PSD controller in the program, which evaluates the data collected by a sensor. Then set the correct function of Peltier cells. After the thermostat was designed and realized, test measurements were performed and the results were documented and evaluated.