International Telemetering Conference Proceedings / October 18-21, 2004 / Town & Country Resort, San Diego, California / The UMR Solar Car uses a telemetry processor to collect, compute, and transmit data to the driver of the car and a nearby chase vehicle. The original processor had deteriorated from environmental extremes and vibration. There were also problems with electromagnetic interference from the high efficiency electric motor switching electronics, difficulties with the many unplanned additions made to the processor in the field, and the unstructured software that was becoming difficult to maintain. This project consists of creating a replacement telemetry system that is more robust mechanically, and electrically, substantially improving the EMI performance of the device, and reworking the hardware and software to make it easier to maintain and upgrade.

International Telemetering Conference Proceedings / November 04-07, 1991 / Riviera Hotel and Convention Center, Las Vegas, Nevada / The Multi-Stream Data-Driven Telemetry System (MSDDTS) is a new generation system in China developed by Beijing Research Institute of Telemetry (BRIT) for high bit rate, multi-stream data acquisition, processing and display. Features of the MSDDTS include: .Up to 4 data streams; .Data driven architecture; .Multi-processor for parallel processing; .Modular, Configurable, expandable and programmable; .Stand-along capability; .And, external control by host computer. This paper addresses three very important aspects of the MSDDTS. First, the system architecture is discussed. Second, three basic models of the system configuration are described. The third shows the future development of the system.

International Telemetering Conference Proceedings / October 17-20, 1994 / Town & Country Hotel and Conference Center, San Diego, California / This paper discusses the use of DSP technology in the embedded real time ingest and pre-processing of weather satellite data. Specifically, case studies are presented in the use of Texas Instrument TMS 320 processors as front-end handlers of GOES MODE AAA and GOES GVAR data formats.

International Telemetering Conference Proceedings / October 25-28, 1999 / Riviera Hotel and Convention Center, Las Vegas, Nevada / The technology growth in the Aerospace industry, as manifested and embodied in the current fighter technology, presents many challenges in the area of flight test and data processing. Past papers have delineated the concepts brought to bear in the design and implementation of the AFFTC’s latest generation of telemetry data systems in the Advanced Data Acquisition and Processing System (ADAPS) program. The current deployed system incorporates the planned approach of commercial-off-the-shelf (COTS) and government-off-the-shelf (GOTS) elements as basic to the system solution. The state of the program has advanced through full development, delivery and performance testing. The system is currently deployed in support of flight testing at Edwards AFB. This paper will present the status of the program.

Energy efficiency has become one of the most important factors in the development of computer systems. Increasingly power-hungry processors and memory subsystem have reinforced the need for aggressive power management. Dynamic voltage scaling has become a common consideration for designing energy efficient CPUs in systems ranging from portable devices to large-scale systems. As applications become more data centric and put more pressure on memory subsystem, managing energy consumption of main memory is also becoming critical. Subsequently in this dissertation, we address the issues in designing energy efficient CPU and memory for personal computing devices as well as large-scale systems.For large-scale systems, we address memory subsystem dedicated to buffer cache which accounts for the majority of memory usage in server environment. We take advantage of the I/O handling routines in the OS kernel to hide the delay incurred by the memory state transition so that performance degradation is minimized while high energy savings is achieved. We also address interactive workloads, which account for the bulk of the processing demand on modern mobile or desktop systems. We propose Interaction-Aware Dynamic Voltage Scaling (IADVS) for CPU and Interaction-Aware Memory Energy Management (IAMEM) for memory. The IA framework relies on automatic correlation of user-initiated tasks with the demand placed on CPU and memory to accurately predict power states for CPU and memory. Both mechanisms achieve maximal energy savings while minimizing the impact on the application's performance.

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In this thesis we present the holistic query evaluation model. We propose a novel query engine design that exploits the characteristics of modern processors when queries execute inside main memory. The holistic model (a) is based on template-based code generation for each executed query, (b) uses multithreading to adapt to multicore processor architectures and (c) addresses the optimization problem of scheduling multiple threads for intra-query parallelism. Main-memory query execution is a usual operation in modern database servers equipped with tens or hundreds of gigabytes of RAM. In such an execution environment, the query engine needs to adapt to the CPU characteristics to boost performance. For this purpose, holistic query evaluation applies customized code generation to database query evaluation. The idea is to use a collection of highly efficient code templates and dynamically instantiate them to create query- and hardware-specific source code. The source code is compiled and dynamically linked to the database server for processing. Code generation diminishes the bloat of higher-level programming abstractions necessary for implementing generic, interpreted, SQL query engines. At the same time, the generated code is customized for the hardware it will run on. The holistic model supports the most frequently used query processing algorithms, namely sorting, partitioning, join evaluation, and aggregation, thus allowing the efficient evaluation of complex DSS or OLAP queries. Modern CPUs follow multicore designs with multiple threads running in parallel. The dataflow of query engine algorithms needs to be adapted to exploit such designs. We identify memory accesses and thread synchronization as the main bottlenecks in a multicore execution environment. We extend the holistic query evaluation model and propose techniques to mitigate the impact of these bottlenecks on multithreaded query evaluation. We analytically model the expected performance and scalability of the proposed algorithms according to the hardware specifications. The analytical performance expressions can be used by the optimizer to statically estimate the speedup of multithreaded query execution. Finally, we examine the problem of thread scheduling in the context of multithreaded query evaluation on multicore CPUs. The search space for possible operator execution schedules scales fast, thus forbidding the use of exhaustive techniques. We model intra-query parallelism on multicore systems and present scheduling heuristics that result in different degrees of schedule quality and optimization cost. We identify cases where each of our proposed algorithms, or combinations of them, are expected to generate schedules of high quality at an acceptable running cost.

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In antenna array processing it is generally required to enhance the reception or detection of a signal from a particular direction while suppressing noise and interference signals from other directions. An optimisation problem often posed to achieve this result is to minimise the array processor mean output power (or variance) subject to a fixed response in the array look direction. The look direction requirement can be met by imposing a set of linear constraints on the processor weights to yield what is known as the Linearly Constrained Minimum Variance (LCMV) processor. It has been found, however, that LCMV processors are susceptible to errors in the assumed direction of arrival of the desired signal. To achieve robustness against directional mismatch, additional constraints known as derivative constraints can be introduced. These constraints force the first and second order spatial derivatives of the array power response in the look direction to zero. However, constraints corresponding to necessary and sufficient (NS) conditions for these spatial derivatives to be zero are in general quadratic, and the resulting weight vector solution space is non-convex. One approach to this complex problem has been to consider conditions which are only sufficient for the spatial derivatives to be zero. Whilst this results in linear constraints, it exhibits certain anomalous behaviour, for example, dependence on the choice of array phase centre.Recent work in the area of derivative constraints has resulted in a method for efficiently solving the non-convex output power minimisation problem with quadratic derivative constraints. The optimisation problem addressed assumes that the input signal statistics and hence the input signal autocorrelation matrix R are known. In practice, R must be estimated from the receiver data.The main contribution of this thesis is the derivation of a ++ / new adaptive algorithm which implements an adaptive array processor with look direction plus 1st and 2nd order NS derivative constraints. The new algorithm is derived from the well-known Recursive Least Squares (RLS) technique but allows linear and quadratic constraints to be incorporated within the recursive framework. The algorithm offers the high performance characteristics associated with RLS methods, namely, fast convergence and high steady-state accuracy. The work encompasses a study of the characteristics of the algorithm in terms of numerical robustness, convergence properties, tracking and computational complexity.The study of the numerical properties of the algorithm has led to the second important contribution of this thesis: the identification of a parameter which is central to the numerical stability of the algorithm in a practical fixed precision environment. We show that this parameter is bounded during stable operation and can therefore be used to detect the onset of numerical instability within the algorithm. In addition, we show how existing techniques can be used to significantly improve the numerical robustness of the algorithm.Another important contribution of the thesis stems from an investigation into the multimodal nature of the quadratic, equality constrained optimisation problem resulting from the use of second order NS derivative constraints. In particular, we show that for a linear antenna array operating under certain conditions, the complex multimodal optimisation problem can be greatly simplified. This has important implications in both optimum and adaptive array signal processing.